Realization of current mode universal shadow filter

Journal Pre-proofs Regular paper Realization of Current Mode Universal Shadow Filter Divya Singh, Sajal K. Paul PII: DOI: Reference:

S1434-8411(19)32007-2 https://doi.org/10.1016/j.aeue.2020.153088 AEUE 153088

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International Journal of Electronics and Communications

Received Date: Revised Date: Accepted Date:

11 August 2019 1 January 2020 18 January 2020

Please cite this article as: D. Singh, S.K. Paul, Realization of Current Mode Universal Shadow Filter, International Journal of Electronics and Communications (2020), doi: https://doi.org/10.1016/j.aeue. 2020.153088

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Realization of Current Mode Universal Shadow Filter Divya Singh a

Sajal K. Paul b

Dept. of Electronics Engineering Indian Institute of Technology (Indian School of Mines) Dhanbad-826004, India a Email:

[email protected] Mobile: +918258868103 b

Corresponding Author Email: [email protected] Mobile: +919471191520

1

Realization of Current Mode Universal Shadow Filter Divya Singha, Sajal K. Paulb Dept. of Electronics Engineering, IIT (ISM), Dhanbad,826004, India [email protected], [email protected]

Abstract: In this paper, a current-mode universal shadow filter is proposed using a new variant of current differencing transconductance amplifier (CDTA), namely current controlled current differencing cascaded transconductance amplifier (CC-CDCTA) and two capacitors. It realizes three shadow filter functioning; low pass (LPS), high pass (HPS) and band pass (BPS). Furthermore, it is extended to a universal filter by adding one second generation current conveyor (CCII) and CC-CDCTA building blocks. The proposed configuration realizes all the standard responses of a universal shadow filter such as LPS, BPS, HPS, band-reject (BRS), and all pass (APS) simultaneously. It does not use any resistor. The presented shadow filter utilizes the LP and BP outputs of the basic filter in the feedback amplifier to obtain the desired universal shadow filter functionality. The pole frequency (ωos) and quality factor (Qos) of the shadow filter is electronically tunable using the gain of the feedback amplifiers. The ωos and Qos can also be tuned without disturbing each other. It is also found to be suitable for full cascadability. The validation is done using 180 nm technology in Cadence. Experimental verification has also been done using IC AD844, and CA3080 and found satisfactory results. Keywords: CC-CDCTA; universal shadow filter; current mode; CCII 1. Introduction There is an increasing demand for active filters in the field of instrumentation, automatic control, and communication such as radio, radar, space, satellites, television, telephone, and so on [1-4]. In an analog filter, among the various performance parameters, the electronic tuning of pole frequency, quality factor, and bandwidth is very much useful feature. The 2

enhancement of tuning flexibility of a core filter by adding one [5, 6] or two [7] amplifiers in the feedback path of it is called Shadow Filter. The adjustability of the filter parameters is achieved by the gain(s) of the amplifier(s) used. In [5, 6], the pole frequency (fos) and quality factor (Qos) can be tuned by the gain (A) without disturbing bandwidth (BWs); however, fos and Qos cannot be controlled without disturbing each other. In [7], along with the electronic tuning of fos and Qos independent of BWS; the tuning of Qos without disturbing fos has also been achieved. After that some voltage mode (VM) [8-34], as well as current mode (CM) [35-49] filters, have been presented, the majority of which are based on analog current mode building blocks (ABBs). It is noted that [8-15] are VM shadow filters. In [8, 15] shadow filters are comprised of differential difference current conveyor (DDCC) having an excessive number of passive elements with few responses. In [9], op-amps are used, which have gainbandwidth product and slew rate limitations. In [10-12], an excessive number of current feedback operational amplifiers (CFOAs) in the count is used for the implementation of VM shadow filters. Moreover, [11, 12] implement only one kind of filter response. In the structure of [13], three operational transresistance amplifiers (OTRAs) and an excessive number of passive components in the count are used. Moreover, it can implement only low pass shadow (LPS) and band pass shadow (BPS) responses. A recently reported shadow filter in [14] uses three voltage differencing differential-difference amplifiers (VDDDAs). It is the first reported VM universal shadow filter. The topologies [16-34] are non-shadow (NS) VM filters. The operational transconductance amplifier (OTA) based [16, 19] NS filters consist of more number of ABBs and are also not fully cascadable. The non-shadow filters in [17, 21] are second generation current conveyor (CCII) based. Out of which [17] is non-universal and [21] is a universal filter. They require an excessive number of passive elements, do not have full cascadability and also do not have electronic tunability. Filter [18] comprised of differential difference current conveyor transconductance amplifier (DDCCTA) and requires

3

excessive passive elements along with cascadability issue. In [20, 22] universal non-shadow filters are not fully cascadable and require excessive passive components. Filter with only one DDCCTA [23] consists of more number of passive elements with the cascading and matching component constraint issues. The filters in [24-32] use various ABBs such as VDDDA, voltage differencing inverting buffered amplifier (VDIBA), DDCC, DDCCTA for their implementations. However, they are NS types and voltage mode. The structure in [24] uses three VDDDAs and three passive components including one resistor. It does not provide simultaneous responses. The filters in [25, 27, 33] use one VDIBA, DDCC, and DDCCTA respectively but do not provide simultaneous responses along with no electronic tunability, neither full cascadability. Moreover, [27] requires excessive passive components and no independent tuning of frequency (fO) and quality factor (QO) as well. In [26], two VDDDAs are used. It cannot provide all the responses simultaneously and also fO and Q are not tunable independently. The topologies using only one DDCCTA [28] and two voltage differencing differential input buffered amplifiers (VD-DIBAs) [30] do not provide universal filter response. Moreover, they are not fully cascadable. In [29], one DDCCTA, ungrounded passive components with two resistors are used. It does not provide independent tuning and cascadability and also requires matching component constraints. The topology comprised of three DVCCs [31] requires three resistors and two capacitors, whereas neither provides independent and electronic tuning of fO and QO nor possesses full cascadability. The UF topology in [32], uses two DDCCTAs, two resistors, and two capacitors. It does not possess full cascadability and requires component matching constraints. In [34], only one CFTA with excessive passive components is used. Moreover, it is not a universal filter. The topologies in [35-40] are CM shadow filters. The CM topologies in [35-37] use current differencing transconductance amplifiers (CDTAs) as active analog building blocks (ABBs) and implement only one or two filter responses. One of these responses is obtained through a

4

capacitor (C) in each configuration. Moreover, the adjustability of fos and Qos cannot be achieved without disturbing each other. The CM shadow filter [38] based on four operational floating current conveyors (OFCCs) and [39] based on two CDTA can realize only BP response. The topology in [40] comprised of four ECCIIs, requires two resistors along with ungrounded passive components and gives only BP as a response without electronic tuning and full cascadability. The topologies in [41-49] are NS filters. The filter in [41] uses three MOCCIIs and excessive numbers of passive components in the count. It does not provide simultaneous responses, electronic tunability as well as full cascadability. The filter comprised of 5 CCCIIs [42] does not provide simultaneous responses and includes three capacitors. In [43] a BJT based NS current mode UF is presented. The CM filter in [44] is also an NS type. It is comprised of four CCIIs and one buffer and implements only BP response. Universal NS filters in [45, 48, 49] possess an excessive number of passive elements, ungrounded capacitors, and non-cascadability issues. In [46], a VDTA based NS Universal filter is presented. It uses resistors, ungrounded capacitors, and has no-electronic tuning and also cascadability issues. The topology in [47] is also an NS type. It has also almost similar features as that of [46], however, it is fully cascadable. It may be noted that the reported shadow filters [8-49] have one or more of the following shortcomings in terms of number of ABBs in the count, passive components in the count, floating passive components, non-cascadability, use of resistor, electronic tunability of fos and Qos without disturbing each other, and matching component constraints, etc. It is also noted that there is no report on the availability of current mode (CM) universal shadow filter in literature. In this paper, an attempt is made to design a current-mode universal shadow filter with improved performance, using a modified CDTA, namely, current controlled current differencing cascaded transconductance amplifier (CC-CDCTA).

5

The paper is organized into six sections. The introduction is given in Section 1, followed by Section 2, where the CC-CDCTA and CCII building blocks are discussed. In Section 3, the proposed CC-CDCTA based universal shadow filter is presented. The non-ideality analysis is given in Section 4. The comparison is discussed in Section 5. In Section 6, the simulation of the circuit is discussed. The experimental results are given in Section 7 followed by Section 8 where the conclusion is given. 2. Active Building Blocks 2.1 CC-CDCTA The current differencing transconductance amplifier (CDTA) is a well-known current mode building block where signals at the input and output are currents. It has two inputs (p and n) and a terminal Z in which the difference of two input currents flows. The output current is obtained at terminal X by multiplying the Z terminal voltage to transconductance (gm) of the transconductance amplifier (TA). Its input impedance is low, and output impedance is high, which is suitable for cascading. To make CDTA more flexible, the intrinsic resistance at the input terminals is made electronically controllable and named it as current-controlled CDTA (CC-CDTA) [50]. Subsequently, it is further modified to dual-output CCCDTA (DOCCCDTA) by using current mirrors at the output [51]. Li in 2011 [52] presented a further modified CDTA, namely modified current differencing transconductance amplifier (MCDTA). This building block uses Z-copy CDTA and additional transconductance amplifier (TA) in parallel with the existing TA to extend the number of X and Z terminals for functional flexibility. Xu et al. in 2013 [53] reported another variant of CDTA namely current differencing cascaded transconductance amplifier (CDCTA) in which the number of output X ports is extended in the count by cascading the TA stages in series. Li in 2012 [54] presented a modified current controlled current differencing TA (MCCCDTA), which is composed of Z-copy CCCDTA and an extra TA in parallel with the existing TA.

6

In this paper, a new CDTA is proposed, which is composed of a CCCDTA and an additional transconductance amplifier (TA) in cascade to the existing TA. Hence it may be viewed as a CDCTA having a current-controlled intrinsic resistance at the two input ports. Therefore, the new CDTA may be named as a current controlled-CDCTA (CC-CDCTA). It is different from all the existing variants of CDTAs discussed above. The symbol of CC-CDCTA is shown in Fig. 1 while Fig. 2 shows its CMOS based internal structure, which is obtained from [55] by adding one TA in cascade.

Fig. 1. Symbol of CC-CDCTA

Fig. 2. Internal structure of CMOS based CC-CDCTA The port relationships are given as follows :

[][

𝑉𝑝 𝑅𝑝 𝑉𝑛 0 𝐼𝑧 = 1 0 𝐼𝑋1 0 𝐼𝑋2

0 0 𝑅𝑛 0 ―1 0 0 𝑔𝑚1 0 0

0 0 0 0 𝑔𝑚2

][ ]

0 𝐼𝑝 0 𝐼𝑛 0 𝑉𝑧 0 𝑉𝑋1 0 𝑉𝑋2

(1)

where Rp and Rn are the finite intrinsic impedance at the input terminals p and n respectively. The gm1 and gm2 are the transconductances of the first and second transconductance amplifiers (TAs), respectively. 7

By routine analysis the Rn can be obtained as: 𝑅𝑛 =

(

)

𝐼𝐵𝑜 𝑔𝑚9 𝑔𝑚13 1 ― ― 𝑔𝑚12 + 𝑔𝑚13 𝐼𝑛(𝑔𝑚12 + 𝑔𝑚13) 𝑔𝑚8 𝑔𝑚12

(2)

If we consider 𝑔𝑚8 = 𝑔𝑚12 and 𝑔𝑚9 = 𝑔𝑚13 = 𝑔𝑚 Then, we get 𝑅𝑛 =

1 1 = 𝑔𝑚12 + 𝑔𝑚13 2𝑔𝑚

(3)

1

Therefore, 𝑅𝑛 =

(4)

()

𝑊 8µ𝑛𝐶𝑜𝑥 𝐿 𝐼𝐵0 12 ― 15

1

Similarly, 𝑅𝑝 =

(5)

()

𝑊 8µ𝑝𝐶𝑜𝑥 𝐿 𝐼𝐵0 8 ― 11

Whereas, analysis of operational transconductance amplifier gives

()

𝑊 𝑔𝑚1 = µ𝑛𝐶𝑜𝑥 𝐿

𝐼𝐵1 , 26, 27

()

𝑊 𝑔𝑚2 = µ𝑛𝐶𝑜𝑥 𝐿

𝐼𝐵2

(6)

34, 35

It may be seen that Rp, Rn, gm1, and gm2 are controllable by bias currents. Hence Rp and Rn may be maintained low by proper selection of IB0, and other parameters. It has high output impedance at X, and Z terminals and input capacitances are negligible. The routine analysis also results, the output resistance RZ, RX1, and RX2 as: 𝑅𝑍≅

1 1 1 1 , 𝑅𝑋1≅ , 𝑅𝑋2≅ ,and 𝑔𝑜 = ≅𝜆𝐼𝐷 𝑔𝑜21 + 𝑔𝑜7 𝑔𝑜25 + 𝑔𝑜29 𝑔𝑜33 + 𝑔𝑜37 𝑟𝑜

(7)

where go, ro, and λ are the conductance, resistance and channel length modulation coefficient of the respective transistors at the drain-source terminals. The proposed CC-CDCTA is designed in 0.18µm CMOS technology, having an aspect ratio of transistors as given in Table 1.

8

Table 1 Aspect ratio of CC-CDCTA of Fig. 2 MOS Transistors

W (µm)/L(nm)

M1-7

3.6/360

M7a

7.2/360

M8-11

2.88/360

M12-15

1.44/360

M16-21

10.8/360

M21a

21.6/360

M22, 23, 25, 30, 31, 33

3.6/180

M24, 32

3.024/180

M26,27,34, 35

18/180

M28,29,36,37

2.16/180

M38

7.2/180

M39

4.32/180

The basic features of the CC-CDCTA of Fig. 2 are obtained by simulation. Fig. 3 shows the DC characteristics for the Iz, IX1, and IX2 versus Ip and In. It is obvious from Fig. 3 (a) that the Iz almost linearly changes with Ip and In over a wide range of -500 µA to +480 µA before it gets saturated. The responses of IX1 and IX2 in respective to Ip is given in Fig. 3 (b). It is observed that IX1 and IX2 are also almost linear over the range of ± 200µA. Fig. 4 shows the frequency responses of the output impedances at Z, X1, and X2 ports. It is clear that high impedances are obtained at Z, X1, and X2 terminals as 1.74MΩ, 1.04MΩ, and 1.04MΩ respectively over a wide range of frequency. The parasitic capacitances CZ, CX1, and CX2 for the current range of 1 nA to 200 µA for IB0, IB1, and IB2 are found as 17.86 fF to 4.89 fF, 19.45 fF to 2.36 fF, and 22.47 fF to 2.93 fF respectively. Fig. 5 shows the variation of Rp and Rn for IB0 from 1nA to 300µA. It is found that Rp and Rn vary from 34.5 kΩ to 748 Ω (approx). Fig. 6 shows the frequency response of current gains such as Iz/Ip, Iz/In, IX1/Ip, IX1/In, IX2/Ip, and IX2/In. The respective -3dB bandwidths of Iz/Ip and Iz/In are obtained as 2.69GHz and 2.72GHz. While for IX1/Ip, IX1/In, IX2/Ip, and IX2/In, -3dB bandwidths are found 9

as 389, 339, 135 and 123 MHz respectively. Table 2 summarizes the performance parameters of the proposed CC-CDCTA. 100.0µ

500.0µ

Ip IX1, IX2 (Amp)

Iz (Amp)

In

0.0

-500.0µ -500.0µ

0.0 Ip, In (Amp)

500.0µ

IX1 IX2 0.0

-100.0µ -200.0µ

0.0 IP (Amp)

(a)

200.0µ

(b)

Output Impedance (M ohm)

Fig. 3. Plot of (a) IZ versus Ip (In = 0) and In (Ip = 0), (b) IX1, IX2 versus Ip (In = 0). 2.0 1.5 1.0 0.5

Resistance at Z Resistance at X1 Resistance at X2

0.0 10k 100k

1M 10M 100M 1G Frequency (Hz)

10G

Fig. 4. Frequency responses of output impedances at Z, X1, and X2 terminals for IBO = 20 µA and IB1 = IB2 = 44 µA.

10

15 10 5 0

0

(k  )

Rp Rn

4

Parasitic Resistance

Parasitic Resistance (k )

20

3

100

Rp Rn

2 1 0

0

100

IB0 (A)

IB0 (A)

200

300

200

300

Fig. 5. Input parasitic resistance with respect to IB0. 20

Current gain (dB)

Current gain (dB)

20

0

IZ/In IZ/Ip

-20

-40 100k

1M

10M 100M 1G Frequency (Hz)

0

-40 -60 100k

10G

IX1/IP IX1/In

-20

1M

1G 10M 100M Frequency (Hz)

(a)

10G

(b)

Current gain (dB)

20.0 0.0 -20.0 -40.0

IX2/Ip IX2/In

-60.0 -80.0 100k

1M

10M 100M 1G Frequency (Hz)

10G

(c) Fig. 6. Frequency responses of the current gains at (a) Z, (b) X1, and (c) X2 terminals.

11

Table 2. Performance parameters of CC-CDCTA. Parameters

Values

Supply Voltage

±1.25 V

Power Consumption

0.713 mW

Rn and Rp range for bias current (IBO) of 1nA to 300µA

34.5kΩto748 Ω

RZ range for bias current (IBO) of 1nA to 200µA

871MΩ to 32.2 kΩ

CZ range for bias current (IBO) of 1nA to 200µA

17.86 fF to 4.89 fF

RX1 range for bias current IB1of 1nA to 200µA

204 MΩ to 68kΩ

CX1 range for bias current IB1of 1nA to 200µA

19.45fF to 2.36 fF

RX2 range for bias current IB2of 1nA to 200µA

109MΩ to 46kΩ

CX2 range for bias current IB1of 1nA to 200µA

22.47 fF to 2.93 fF

Linear variation of IZ over input current (In, Ip) range of

-500 µA to 480 µA

Linear variation of IX1 and IX2over input current (Ip) range of

-200 µA to 200 µA

Bandwidth of IZ/Ip, and IZ/In

2.96 GHz and 2.72 GHz

Bandwidth of IX1/Ip, and IX1/In

389 MHz and 339 MHz

Bandwidth of IX2/Ip, and IX2/In

135 MHz and 123 MHz

2.2 Second Generation Current Conveyor (CCII) The internal structure of the CCII, used in this work is shown in Fig. 7 (a). The input terminals X and Y offer low and high impedances respectively, whereas the output Z terminal offers high impedance. The simulated input impedance at X terminal of it [56] is given in Fig. 7(b), which shows a value close to zero i.e. 0.073 Ω. Table 3 gives the aspect ratio of MOS transistors of CCII. The port relationship of this active block (CCII) can be defined as: IY =0; IZ = IX; VX = VY

Input Impedance (ohm)

400 300 200 100 0 10k

(a)

100 MHz, 0.073 ohm

100k

1M 10M 100M Frequency (Hz)

1G

(b)

Fig. 7. CMOS based CCII (a) internal structure (b) frequency response of impedance at X. 12

Table 3. Aspect ratios of CCII. MOS Transistors

W (µm)/L(nm)

M1, 2, 5

20/360

M3, 4, 6-8

10/360

M10-13

4/360

3. Proposed Universal Shadow Filter The scheme for the proposed second-order shadow filter in line with [7] is shown in Fig. 8. It consists of a basic filter and two amplifiers A1 and A2, connected in a feedback loop. The shadow filter using CC-CDCTA as an analog building block (ABB) is given in Fig. 9. The CC-CDCTA1 with two grounded capacitors C1 and C2 functions as a basic second-order filter. The CC-CDCTA2 implements the functions of two current amplifiers with gains A1 and A2 along with summation at the ZC terminal. Where, ZC and XC are Z-copy, and X-copy of the corresponding Z and X terminals, respectively. Since two CC-CDCTAs are used in the shadow filter given in Fig. 9, let us define transconductances as gmji, where j=1,2 identifies the CC-CDCTA1 and CC-CDCTA2 respectively, and i=1,2 identifies respectively the first (1) and second (2) transconductances in each CC-CDCTA. As an example, gm1,1 represents the first transconductance of the CC-CDCTA1, and gm2,1 represents the first transconductance of the CC-CDCTA2. Similarly, in Rpj (Rnj), j=1,2 represents the resistances for CC-CDCTA1 and CC-CDCTA2, respectively.

Fig. 8. Block diagram for the shadow filter 13

Fig. 9. Proposed CC-CDCTA based shadow filter The routine analysis of the circuit of Fig. 9 results in the following transfer functions: 𝐼𝐿𝑃𝑆 𝐼𝑖𝑛

𝐼𝐻𝑃𝑆 𝐼𝑖𝑛

𝐼𝐵𝑃𝑆 𝐼𝑖𝑛

=

=

=

𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1 𝑠2𝐶1𝐶2𝑅𝑝1 + 𝑠𝐶2(2 + 1/(𝑔𝑚2,2𝑅𝑛2)) + 𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1(1 + 1/(𝑔𝑚2,1𝑅𝑝2)) 𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1 = 2 𝑠 𝐶1𝐶2𝑅𝑝1 + 𝑠𝐶2(2 + 𝐴2) + 𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1(1 + 𝐴1)

(8)

𝑠2𝐶1𝐶2𝑅𝑝1 𝑠2𝐶1𝐶2𝑅𝑝1 + 𝑠𝐶2(2 + 1/(𝑔𝑚2,2𝑅𝑛2)) + 𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1(1 + 1/(𝑔𝑚2,1𝑅𝑝2)) 𝑠2𝐶1𝐶2𝑅𝑝1 = 2 𝑠 𝐶1𝐶2𝑅𝑝1 + 𝑠𝐶2(2 + 𝐴2) + 𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1(1 + 𝐴1)

(9)

𝑠𝐶2 𝑠2𝐶1𝐶2𝑅𝑝1 + 𝑠𝐶2(2 + 1/(𝑔𝑚2,2𝑅𝑛2)) + 𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1(1 + 1/(𝑔𝑚2,1𝑅𝑝2)) 𝑠𝐶2 = 2 𝑠 𝐶1𝐶2𝑅𝑝1 + 𝑠𝐶2(2 + 𝐴2) + 𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1(1 + 𝐴1)

(10)

Where A1 and A2 are the gains provided by CC-CDCTA2 and expressed as 𝐴1 = 1/𝑔𝑚2,1𝑅𝑝2,

(11)

𝐴2 = 1/𝑔𝑚2,2𝑅𝑛2

It may be observed that the shadow filter of Fig. 9 can realize low pass (LPS) and band pass (BPS) responses at high output impedance; however high pass (HPS) is through capacitor C1. The (8), (9), and (10) also indicate that the band-reject shadow (BRS) filter can be obtained by the summation of LPS and HPS responses. While, the all-pass shadow (APS) response can 14

be formed by the summation of -4IBPS, -2IBPSA2 and Iin2 (= Iin) currents. The circuit of Fig. 9 is accordingly modified to realize all the standard outputs of the universal shadow filter at high output impedance as given in Fig. 10. It may be noted here that a second generation current conveyor (CCII) [43] is used to get IHPS at high output impedance and also to ground one end of C1 [Note: It may be noted that the input impedance at X terminal of CCII is found as practically zero, i.e. 0.073Ω. Hence one end of C1 may be considered as practically grounded.]. The -2IBPSA2 current may be obtained from 2Z terminal of CC-CDCTA3 by making channel width of the output MOS transistors of the current mirrors at 2Z terminal (M21a and M7a) double of the corresponding MOSFETs (M21and M7) and making (A2)CCCDCTA2

= (A1)CC-CDCTA3 by equal bias currents IB1 and IB2. Similarly, -4IBPS will be obtained

from the -4Zc terminal of CC-CDCTA1. Accordingly, the band reject shadow (BRS), and all pass shadow (APS) transfer functions are obtained as follows: 𝐼𝐵𝑅𝑆 𝐼𝑖𝑛

𝐼𝐴𝑃𝑆 𝐼𝑖𝑛

=

=

𝑠2𝐶1𝐶2𝑅𝑝1 + 𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1 𝑠2𝐶1𝐶2𝑅𝑝1 + 𝑠𝐶2(2 + 1/(𝑔𝑚2,2𝑅𝑛2)) + 𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1(1 + 1/(𝑔𝑚2,1𝑅𝑝2)) 𝑠2𝐶1𝐶2𝑅𝑝1 + 𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1 = 2 𝑠 𝐶1𝐶2𝑅𝑝1 + 𝑠𝐶2(2 + 𝐴2) + 𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1(1 + 𝐴1)

(12)

𝑠2𝐶1𝐶2𝑅𝑝1 ― 𝑠𝐶2(2 + 1/(𝑔𝑚2,2𝑅𝑛2)) + 𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1(1 + 1/(𝑔𝑚2,1𝑅𝑝2)) 𝑠2𝐶1𝐶2𝑅𝑝1 + 𝑠𝐶2(2 + 1/(𝑔𝑚2,2𝑅𝑛2)) + 𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1(1 + 1/(𝑔𝑚2,1𝑅𝑝2)) 𝑠2𝐶1𝐶2𝑅𝑝1 ― 𝑠𝐶2(2 + 𝐴2) + 𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1(1 + 𝐴1) = 2 𝑠 𝐶1𝐶2𝑅𝑝1 + 𝑠𝐶2(2 + 𝐴2) + 𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1(1 + 𝐴1)

15

(13)

Fig. 10. Proposed CC-CDCTA based shadow filter including CCII The above transfer functions result in the following gains: 1

𝐴𝐿𝑃𝑆 = 𝐴𝐵𝑅𝑆 = 1 + 𝐴1 =

𝑔𝑚2,1𝑅𝑝2

𝑔𝑚2,1𝑅𝑝2 + 1,

1

𝐴𝐵𝑃𝑆 = 2 + 𝐴2 =

𝑔𝑚2,2𝑅𝑛2

2𝑔𝑚2,2𝑅𝑛2 + 1,

𝐴𝐻𝑃𝑆 = 𝐴𝐴𝑃𝑆 = 1

(14)

The denominator of above transfer functions results in the pole frequency (ωos), quality factor (Qos) and bandwidth (BWS) of shadow universal filter as: 𝑔𝑚1,1𝑔𝑚1,2(1 + 𝐴1)

𝜔𝑜𝑠 =

𝐶1𝐶2 𝑅𝑝1

𝑄𝑜𝑠 = (2 + 𝐴2) 𝐵𝑊𝑆 =

2 + 𝐴2 𝑅𝑝1𝐶1

= 𝜔𝑜 1 + 𝐴1

𝑔𝑚1,1𝑔𝑚1,2𝐶1(1 + 𝐴1) 𝐶2

2

)

2 + 𝐴2

1 + 𝐴1

(15)

2 + 𝐴2

(

= 𝐵𝑊

(

= 𝑄𝑜

2

)

where, ωo, Qo, and BW are the non-shadow parameters given as: 𝑔𝑚1,1𝑔𝑚1,2

𝜔𝑜 = 𝑄𝑜 =

𝐶1𝐶2 𝑅𝑝1 𝑔𝑚1,1𝑔𝑚1,2𝐶1 2

𝐶2

(16)

2

𝐵𝑊 = 𝑅𝑝1𝐶1

16

If gm1,1 = gm1,2 = gm and C1 = C2 = C, the above parameters modify as : 𝜔𝑜𝑠 =

𝑔𝑚 𝐶

1 + 𝐴1 = 𝜔𝑜 1 + 𝐴1=

𝑔𝑚𝑅𝑝1

(

𝑄𝑜𝑠 = 2 + 𝐴2 1 + 𝐴1= 𝑄𝑜 𝐵𝑊𝑠 =

2 + 𝐴2 𝑅𝑃1𝐶

(

= BW

2

)

2 + 𝐴2

2 + 𝐴2 2

𝑔𝑚 𝐶

1

1 + 𝑔𝑚2,1𝑅𝑝2

1 + 𝐴1 =

) = (2 +

𝑔𝑚𝑅𝑝1 2 + (1/𝑔𝑚2,2𝑅𝑛2)

1

1 + 𝑔𝑚2,1𝑅𝑝2

(17)

)

1 1 𝑔𝑚2,2𝑅𝑛2 𝑅𝑝1𝐶

It is observed from (17) that the pole frequency (ωos) and quality factor (Qos) of the shadow filter can be tuned electronically by A1 (i.e. gm2,1) without disturbing BWS. Moreover, Qos can be tuned by A2 (i.e. gm2,2) and/or Rp1without disturbing ωos. Furthermore, ωos can also be tuned independently of Qos by C and/or first changing gm2,1and then gm2,2. 4. Non-ideality Analysis The assessment of the effects of non-ideality of CC-CDCTA and CCII is presented in this section. The two types of non-idealities are: (i) due to non-ideal transfer gains and (ii) parasitics of ABBs. 4.1 Effects of non-ideal transfer gain of CC-CDCTA and CCII Considering the non-idealities of current transfer and transconductance gains of CC-CDCTA and current and voltage transfer gains of CCII the port relationships modify as: For CC-CDCTA: 𝐼𝑍 = 𝛼𝑝𝐼𝑝 ― 𝛼𝑛𝐼𝑛, 𝐼𝑍𝑐 = 𝛼𝑐𝐼𝑍, 𝐼𝑋1 = 𝛶1𝑉𝑍𝑔𝑚1, 𝐼𝑋2 = 𝛶2𝑉𝑥1𝑔𝑚2

(18)

𝐼𝑋1𝑐 = 𝛶1𝑐𝑉𝑍𝑔𝑚1, 𝐼𝑋2𝑐 = 𝛶2𝑐𝑉𝑥1𝑔𝑚2 For CCII: (19) 𝐼𝑌 = 0, 𝑉𝑋 = 𝛽𝑉𝑌, 𝐼𝑍 = 𝛼𝑍𝐼𝑋 where 𝛼𝑝 and 𝛼𝑛 are the current transfer gains between p to z and n to z terminals. The 𝛼𝑐 is the current transfer gain between Z and Zc terminals. Whereas 𝛶1 and 𝛶2 are the transconductance gain factors between Z to X1 and X1 to X2 terminals respectively. Similarly, 𝛶1𝑐 and 𝛶2𝑐 are the transconductance gain factors between Z to X1C and X1 to X2C terminals 17

respectively. For CCII, the 𝛼𝑍 is the current transfer gain between X to Z terminals and β is the voltage transfer gain between Y to X terminals. Ideally, these gains are unity. However, in practice, they deviate slightly from unity. The analysis of the universal filter after considering the non-ideal transfer gains results into: 𝐼𝐿𝑃𝑆 𝐼𝑖𝑛 𝐼𝐻𝑃𝑆 𝐼𝑖𝑛 𝐼𝐵𝑃𝑆 𝐼𝑖𝑛 𝐼𝐵𝑅𝑆 𝐼𝑖𝑛

𝐼𝐴𝑃𝑆 𝐼𝑖𝑛

=

=

=

=

=

𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1𝛼𝑝𝛶1𝛶22

(20)

𝐷(𝑠) 𝑠2𝐶1𝐶2𝑅𝑝1𝛼𝑝𝛶2

(21)

𝐷(𝑠) 𝑠𝐶2𝛶2

(22)

𝐷(𝑠) 𝑠2𝐶1𝐶2𝑅𝑝1𝛼𝑝𝛼𝑍𝛶2 + 𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1𝛼𝑝𝛶1𝛶22 𝐷(𝑠) 𝑠2𝐶1𝐶2𝑅𝑝1𝛼𝑝𝛶2 + 𝑠𝐶2(𝛶2 ― 3𝛶2𝛼𝑐 ― 2𝛶2𝛼𝑐𝐴2 + 𝛼𝑐𝛼𝑛𝐴2) + 𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1𝛼𝑝𝛶22(𝛶1𝛶2𝑐 + 𝛼𝑐𝛼𝑝𝐴1)

(23)

(24)

𝐷(𝑠)

where, 𝐷(𝑠) = 𝑠2𝐶1𝐶2𝑅𝑝1𝛼𝑝𝛶2 + 𝑠𝐶2(𝛶2 + 𝛶2𝛼𝑐 + 𝛼𝑐𝛼𝑛𝐴2) + 𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1 𝛼𝑝𝛶22(𝛶1𝛶2𝑐 + 𝛼𝑐𝛼𝑝𝐴1) From the above equation of denominator, the pole frequency (ωos), and quality factor (Qos) results into: 𝜔𝑜𝑠 =

𝑔𝑚1,1𝑔𝑚1,2𝛶2(𝛶1𝛶2𝑐 + 𝛼𝑐𝛼𝑝𝐴1) 𝐶1𝐶2 𝑅𝑝1𝛼𝑝𝛶2

𝑄𝑜𝑠 = 𝛶2 + 𝛶2𝛼𝑐 + 𝛼𝑐𝛼𝑛𝐴2

𝑔𝑚1,1𝑔𝑚1,2𝐶1𝛶2(𝛶1𝛶2𝑐 + 𝛼𝑐𝛼𝑝𝐴1) 𝐶2

From the above equations, it is noticed that the non-ideal transfer gains affect the results.

18

(25)

4.2 Effects of parasitic components In Fig. 11 the simplified equivalent circuits of CCII and CC-CDCTA are shown. For CCII, the RX is very low valued series resistance at x-terminal, while (CY//RY) and (CZ//RZ) are at Y and Z terminals respectively. The values of RY and RZ are high and that of CY and CZ are low. Similarly for CC-CDCTA, RP and Rn are low resistances at p and n terminals, respectively. Furthermore, (CX1//RX1), (CX2//RX2), and (CZ//RZ) are at the X1, X2, and Z terminals respectively. The values of RX1, RX2, and RZ are high and that of CX1, CX2, and CZ are low.

(a)

(b)

Fig. 11. Simplified non-ideal equivalent circuits of (a) CCII (b) CC-CDCTA

Fig. 12. Non-ideal filter circuit of Fig. 10 with parasitic impedances.

19

The simplified non-ideal circuit of the filter of Fig. 10 is given in Fig. 12. 1

1

Where, 1

impedances are: ZP1 = RX1//𝑠(𝐶2 + 𝐶𝑋1), ZP2 = RX1//RX2//𝑠(𝐶𝑋1 + 𝐶𝑋2) , ZP3 = RX2//RZ//𝑠(𝐶𝑋2 + 𝐶𝑍), ZP4 1

1

1

1

= RZ//𝑠𝐶𝑍, ZP5 = RX1//𝑠𝐶𝑋1, ZP6 = RX1//RZ//𝑠(𝐶𝑋1 + 𝐶𝑍), ZP7 = RZ//𝑠𝐶𝑍, and 𝐶′2 = 𝐶2 + 𝐶𝑋1. The routine analysis of the universal filter after consideration of parasitic impedances results into: 𝐼𝐿𝑃𝑆 𝐼𝑖𝑛

=

𝐼𝐻𝑃𝑆

=

𝐼𝑖𝑛 𝐼𝐵𝑃𝑆

=

𝐼𝑖𝑛

𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1(𝑠𝐶1𝑅𝑋 + 1)

𝑠𝐶1(𝑠𝐶′2 + 1/𝑅𝑋1)𝑅𝑝1

(𝑠𝐶1𝑅𝑋 + 1)(𝑠𝐶′2 + 1/𝑅𝑋1)

(28)

𝐷(𝑠)

(

=

𝐼𝑖𝑛

(

=

)

1 𝑅 𝑅𝑋1 𝑝1

(29)

𝐷(𝑠) 𝑠𝐶1(𝑠𝐶1𝑅𝑋 + 1) 𝑠𝐶′2 +

𝐼𝑖𝑛

(27)

𝐷(𝑠)

𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1(𝑠𝐶1𝑅𝑋 + 1) + 𝑠𝐶1 𝑠𝐶′2 +

𝐼𝐵𝑅𝑆

𝐼𝐴𝑃𝑆

(26)

𝐷(𝑠)

)

(

)

1 1 (2 + 𝐴2) 𝑅 ― (𝑠𝐶1𝑅𝑋 + 1) 𝑠𝐶′2 + 𝑅𝑋1 𝑝1 𝑅𝑋1

+ 𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1(𝑠𝐶1𝑅𝑋 + 1)(1 + 𝐴1) + 𝐹1 ― 𝐹2

(30)

𝐷(𝑠)

where,

(

𝐷(𝑠) = 𝑠𝐶1(𝑠𝐶1𝑅𝑋 + 1) 𝑠𝐶′2 +

)

(

)

1 1 (2 + 𝐴2) 𝑅𝑝1 + (𝑠𝐶1𝑅𝑋 + 1) 𝑠𝐶′2 + 𝑅𝑋1 𝑅𝑋1

(31)

+ 𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1(𝑠𝐶1𝑅𝑋 + 1)(1 + 𝐴1) + 𝐹1 ― 𝐹2

where,

(

(𝑠𝐶1𝑅𝑋 + 1) 𝑠𝐶′2 + 𝐹1 =

𝑍𝑃2

)

1 1 𝑅 𝐴 (𝑠𝐶1𝑅𝑋 + 1)(𝑠𝐶′2 + )𝑅 𝐴 𝑅𝑋1 𝑝1 1 𝑅𝑋1 𝑝1 2 , 𝐹2 = 𝑍𝑃3

Since ZP2 ≅ ZP3, and for A1 = A2, we get F1 ≅ F2. Hence, (30) and (31) can be simplified as:

(

𝐼𝐴𝑃𝑆 𝐼𝑖𝑛

=

)

(

)

1 1 (2 + 𝐴2) 𝑅 ― (𝑠𝐶1𝑅𝑋 + 1) 𝑠𝐶′2 + 𝑅𝑋1 𝑝1 𝑅𝑋1 + 𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1(𝑠𝐶1𝑅𝑋 + 1)(1 + 𝐴1)

𝑠𝐶1(𝑠𝐶1𝑅𝑋 + 1) 𝑠𝐶′2 +

𝐷(𝑠) 20

(32)

and,

(

𝐷(𝑠) = 𝑠𝐶1(𝑠𝐶1𝑅𝑋 + 1) 𝑠𝐶′2 +

)

(

)

1 1 (2 + 𝐴2) 𝑅𝑝1 + (𝑠𝐶1𝑅𝑋 + 1) 𝑠𝐶′2 + 𝑅𝑋1 𝑅𝑋1

(33)

+ 𝑔𝑚1,1𝑔𝑚1,2𝑅𝑝1(𝑠𝐶1𝑅𝑋 + 1)(1 + 𝐴1)

Inspections of (26)-(31) indicate that there is a low frequency limitation due to the term

(𝑠𝐶′2 + ). Thus low frequency range of operations is obtained as 1 𝑅𝑋1

𝑓𝐿 ≥

1

(34)

2𝜋𝐶′2𝑅𝑋1

where 𝐶′2 = 𝐶2 + 𝐶𝑋1 Similarly, the high frequency limitations due to the term (𝑠𝐶1𝑅𝑋 + 1) are 𝑓𝐻 ≤

1 2𝜋𝐶1𝑅𝑋

(35)

where RX is the low parasitic resistance at x-terminal of CCII. It is clear from (34) and (35) that the lowest frequency of operation will be decreased by increasing product term of 𝐶′2𝑅𝑋1 while the highest frequency of operation will increase with the decrease of product term C1RX. It is also pertinent to mention that the parasitics at each of the five outputs will also limit the high frequency range of operation by load resistor (say, RL) and parallel parasitic resistor (RX2, RZ) and capacitor (CX2, CZ). In practical circuits RL << (RX2, RZ). Hence, high frequency limitations may be obtained as 𝑓𝐻𝑖 ≤

1 2𝜋𝑅𝐿𝐶𝑃𝑖

(36)

where, i=1,2,..,5 and CPi is the parasitic capacitance at the ith output terminal. It may be concluded that the effects of non-ideality may be ignored when the operating frequency (f) is in the range as follows [57]:

21

10 × 𝑓𝐿 < 𝑓 < 0.1 × minimum of [𝑓𝐻, 𝑓𝐻1, 𝑓𝐻2, ….𝑓𝐻5]

(37)

For example, if C1 = 1 pF, C2 = 100 pF, RX1 = 50MΩ, and RX = 0.07Ω. Then, 𝑓𝐿 ≥ 31.8 Hz and 𝑓𝐻 ≤ 2.27 × 1012 Hz 5. Comparative study of the existing shadow filters Table 4 gives a comparison of the proposed shadow filter with the existing ones. It is found that among the shadow filters only [14] in VM and proposed one (Fig. 10) in CM are universal filters. More than 2 passive components are used in all the shadow and non-shadow filters except a few [16, 19, 26, 30, 35, 39, 43] and this work. Moreover, [9-13, 17, 21, 23, 25, 27, 29, 33, 34, 36, 40, 44, 48 and this work (Fig. 10)] contain one or more of the floating components. The filters in [9, 10, 16, 19, 24-27, 33, 41, 42, 45-49] require additional circuits to obtain simultaneously, all the possible filter functions. All the standard filter functions of a universal filter (UF) cannot be realized by the circuits in [8-13, 15, 17, 28, 30, 34-40, 44 and this work (Fig. 9)]. In [12, 13, 26-31], the tuning of fo and Qo without disturbing each other is not possible. Furthermore, electronic tunability is not found in [8, 10-13, 17, 21, 22, 25, 27, 31, 33, 36, 38, 40, 41, 45-49]. It is found that the filter functions are not fully cascadable for all responses in [8, 9, 12-23, 25, 27-37, 40, 41, 44-46, 48, 49, and this work (Fig. 9)]. Only the works in [10, 11, 24, 26, 38, 39, 42, 47, and this work (Fig. 10)] are fully cascadable. Among the reported works, the power consumption (P.C.) is found lesser in only [18, 19, 23, 28, 29, 33, 48, 49] than this work. The filters in [13, 20, 21, 23, 27, 29, 32, 33, 48] require component matching condition(s). The structures in [8, 9, 13, 15, 17, 18, 22, 25, 27-29, 3137, 39-41, 44-47, 49] are not verified experimentally. The work in [14] is closely comparable to this work (Fig. 10). Although the present work uses one ABB more in the count over that of [14], the present work (Fig. 10) is resistorless and uses one passive component less in the count. It is also observed that the work in [14] is not fully cascadable for all the filter responses in contrast to full cascadability in the present one (Fig. 10). Moreover, the present 22

work is in CM, whereas [14] is in VM. Furthermore, if we compare the proposed work in its own category, i.e. in current mode shadow filter (CMSF), it is observed that none of the available CMSF [35-39] is a universal type, besides other shortcomings discussed above. Table 4. Comparative study of existing filters Ref.

No., and type of ABB

[8]

4, DDCC

No. of passive elements (R/C), All grounded 5/2, Yes

[9]

2, op-amp

2/2 , No

[10]

6, CFOA

10/2, No

[11]

5, CFOA

[12]

Independent tuning of fos and Qos Yes

Electronic tuning of fos, Qos, and BWs

Fully Cascadable for all responses

P.C. (mW)

Matching comp. required

Mode

Exp. results

No

Shadow (S) /Nonshadow (NS) Filter S

No

No

NA

VM

No

NA

NA

No

NA

No

S

VM

No

Yes

No

9/2, No

LP, BP, HP, BR/ No BP/ Yes

Yes

NA

No

S

VM

Yes

Yes

No

Yes

NA

No

S

VM

Yes

4, CFOA

7/2, No

HP/ Yes

No

No

No

NA

No

S

VM

Yes

[13]

3, OTRA

11/4, No

LP, BP/ Yes

No

No

No

NA

Yes

S

VM

No

[14]

3, VDDDA

1/2, Yes

UF/ Yes

Yes

Yes

No

NA

No

S

VM

Yes

[15]

2/2, Yes

BP/ Yes

Yes

Yes

No

NA

No

S

VM

No

[16]

2, DDCC 1, amp 6, OTA

0/2, Yes

UF/ No

Yes

Yes

No

NA

No

NS

VM

Yes

[17]

3, CCII

3/2, No

BR/ Yes

Yes

No

No

NA

No

NS

VM

No

[18]

2, DDCCTA 5, OTA

3/2, Yes

UF/ Yes

Yes

Yes

No

1.62

No

NS

VM

No

0/2, Yes

UF/No

Yes

Yes

No

0.86

No

NS

VM

Yes

1/2, Yes

UF/ Yes

Yes

Yes

No

NA

Yes

NS

VM

Yes

[21]

3, VDDDA 4, CCII

5/2, No

UF/ Yes

Yes

No

No

NA

Yes

NS

VM

Yes

[22]

3, DDCC

2/2, Yes

UF/ Yes

Yes

No

No

2.62

No

NS

VM

No

[23]

1, DDCCTA

3/2, No

UF/ Yes

Yes

Yes

No

0.389

Yes

NS

VM

Yes

[24]

3, VDDDA

1/2, Yes

UF/ No

Yes

Yes

Yes

NA

No

NS

VM

Yes

[25]

1, VDIBA

1/2, No

UF/No

Yes

No

No

10.5

No

NS

VM

No

[26]

2, VDDDA

0/2, Yes

UF/No

No

Yes

Yes

NA

No

NS

VM

Yes

[27]

1, DDCC

3/2, No

UF/No

No

No

No

NA

Yes

NS

VM

No

[28]

1, DDCCTA 1, DDCCTA 2, VD-DIBA 3, DVCC

1/2, Yes

LP, HP, BP/ Yes UF/ Yes

No

Yes

No

0.83

No

NS

VM

No

No

Yes

No

1.86

Yes

NS

VM

No

No

Yes

No

NA

No

NS

VM

Yes

3/2, Yes

LP, HP, BP/ Yes UF/ Yes

No

No

No

3.47

No

NS

VM

No

2, DDCCTA

2/2, Yes

UF/ Yes

Yes

Yes

No

NA

Yes

NS

VM

No

[19] [20]

[29] [30] [31] [32]

2/2, No 0/2, Yes

Filter Functions/ Simultaneous Responses LP, HP, BP/ Yes LP, HP, BP, BR/ No

23

[33]

1, DDCCTA

2/2, No

UF/ No

Yes

No*

No

1.86

Yes

NS

VM

No

[34]

1, CFTA

1/3, No

Yes

Yes

No

6.38

No

NS

1/2, Yes

Yes

Yes

No

21.2

No

S

VM, CM CM

No

[35]

2, CDTA, 1,TA 2, VDTA

LP, HP, BP/ Yes LP (R), BP/ Yes

0/2, Yes

LP, BP (C)/ Yes

Yes

Yes

No

17.4

No

S

CM

No

[36]

2, CDTA

2/2, No

BP (C)/ Yes

Yes

No*

No

7.79

No

S

CM

No

[37]

3, CDTA

1/2, Yes

Yes

Yes

No

5.9

No

S

CM

No

[38]

4, OFCC

5/2, Yes

HP(C), BP(C), LP/ Yes BP/ Yes

Yes

No

Yes

NA

No

S

CM

Yes

[39]

2, CDTA, 1, CA 4, ECCII

0/2, Yes

BP/ Yes

Yes

Yes

Yes

NA

No

S

CM

No

2/2, No

BP/ Yes

Yes

No

No

NA

No

S

CM

No

3/2, Yes

UF/ No*

Yes

No

No

NA

No

NS

CM

No

[42]

3, MOCCII (Fig. 5) 5, CCCII

0/3, Yes

UF/No

Yes

Yes

Yes

5.48

No

NS

CM

Yes

[43]

BJT based

0/2, Yes

UF/ Yes

NA

NA

NA

4.93

NA

NS

CM

Yes

[44]

1/2, No

BP/ Yes

Yes

Yes

No

17.5

No

NS

CM

No

[45]

4 CCII, 1 Buffer 3, OFCC

2/2, Yes

UF/ No

Yes

No

No

NA

No

NS

CM

No

[46]

1, VDTA

1/2, Yes

UF/ No

Yes

No*

No

NA

No

NS

CM

No

[47]

1/2, Yes

UF/ No

Yes

No*

Yes

NA

No

NS

CM

No

[48]

2, OTA, 1, CCIII 2, DVCC

3/2, No

UF/ No

Yes

No

No

0.81

Yes

NS

CM

Yes

[49]

3, ICCII

4/2, Yes

UF/ No

Yes

No

No

0.674

No

NS

CM

No

2, CCCDCTA (Fig. 9)

0/2, Yes

LP, BP, HP(C)/ Yes

Yes

Yes

No

1.5

3, CCCDCTA, 1,CCII (Fig. 10)

0/2, No

UF/ Yes

Yes

Yes

Yes

2.23

No

S

CM

Yes

[40] [41]

This work

PC: Power Consumption; UF: Universal Filter; LP(R): Response through resistor; BP(C), HP(C): Response through capacitor; *Electronic tuning of BW not possible

6. Simulated results and discussion The functionality of the proposed circuit is verified through Cadence Virtuoso Spectre in gpdk180 nm CMOS technology parameters. The layout of the shadow filter of Fig. 10 is simulated and shown in Fig. 13. It occupies an area of 101.97µm x 168.085µm. The supply voltages for CC-CDCTA are taken as ±1.25 V, and bias currents are IB0 = 240µA and IB1=IB2= 44µA. The aspect ratios of MOS transistors as in Table 1 are used. Supply voltages for CCII are also taken as ±1.25. While Table 3 gives the aspect ratios of MOS transistors of 24

No

CCII. To simulate the proposed shadow filter the values of the capacitors are taken as C1= C2= 1pF for a calculated frequency of 79.8MHz and quality factor of 3.51, whereas the simulated quality factor is obtained as 3.6 with a deviation of 2.5%. The simulated frequency responses for both the pre-layout and post-layout of low pass (LPS), band pass (BPS), high pass (HPS), and band-reject (BRS) filters of Fig. 10 are shown in Fig. 14. The gain and phase responses of the all-pass (APS) filter are shown in Fig. 15. The pole frequency of the universal filter (UF) is obtained as 81.2MHz in pre-layout simulation with a deviation of 1.7% whereas post-layout gave about 80.14MHz which is a little deviated from the pre-layout value. It may be due to parasitic capacitances. The above results are summarised in Table 5. Table 5. Calculated and simulated parameters of BP filter using Fig. 14. Parameters

Simulated

Calculated

Frequency (fOS)

81.2 MHz

79.8 MHz

Quality Factor (QOS)

3.6

3.51

Bandpass Bandwidth (BWs) 23.25 MHz 23.12 MHz

Fig. 13. Layout of the proposed filter (Fig. 10).

25

40

Gain (dB)

0

BPS BPS

-40

BRS LPS

HPS

-80

-120 100k

Pre-layout Post-layout 1M

100M 10M Frequency (Hz)

1G

Fig. 14. Simulated results of CM shadow filter 0

100 Phase

Gain (dB)

Gain

-200

0 -50

-100 10k

-100

Phase (degree)

50

Pre-layout Post-layout

100k

1M 10M 100M Frequency (Hz)

-300 -400 1G

Fig. 15. Simulated results of gain and phase responses of CM shadow AP filter The tunability of the pole frequency (fos) and quality factor (Qos) with A1 (i.e. gm2,1) as per (17) is verified in Fig. 16 for the bandpass filter responses. It is obtained by varying A1 (i.e. gm2,1) with IB1 = 200µA, 400µA, and 600µA of CC-CDCTA2. The corresponding simulated frequency and quality factor are obtained, respectively as fos = 85.11MHz, 77.6MHz, and 46.7MHz and Qos = 3.18, 2.9, and 1.74, while calculated frequencies are obtained as 83.64MHz, 74.88MHz, and 49.377MHz with a deviation of 1.7%, 3.6%, and 5.4% respectively and calculated quality factor, are 3.14, 2.81, 1.85 with a deviation of 1.27%, 26

3.2%, and 5.9% respectively from simulated values. Bandwidths are obtained such as 26.71MHz, 26.721MHz, and 26.783MHz for IB1 = 200µA, 400µA, and 600µA respectively while calculated bandwidths are 26.64MHz, 26.64MHz, and 26.64MHz with a deviation of 0.26%, 0.3%, and 0.53% respectively. The above results are summarised in Table 6. Table 6. Calculated and simulated parameters for Fig. 16. Parameters

Simulated

Calculated

IB1 = 200 µA 400 µA 600 µA IB1 = 200 µA 400 µA 600 µA Frequency (fOS) (MHz)

85.11

77.6

46.7

83.64

74.88

49.377

Quality factor (QOS)

3.18

2.9

1.74

3.14

2.81

1.85

26.721

26.783

26.64

26.64

26.64

Bandwidth (BWs) (MHz) 26.71

20

Gain (dB)

0 -20 -40 -60 -80 10M

IB1 = 200 A IB1 = 400 A IB1 = 600 A 100M Frequency (Hz)

1G

Fig. 16. Simulated results of tuning of fos and Qos of band pass shadow filter by varying A1 (i.e. gm2,1) with IB1 of CC-CDCTA2.

27

0

2

4

6

8

10

10

Gain (dB)

0 -10

0

2

4

10

10 10

8

8 8

6

8

10

6

6 6

4

4 4

-20 IB2 = 1 A

-30 0

-40 -50 10M

IB22 = 50

4

IB2 = 100 100M Frequency (Hz)

6

8

10

2

2 2

0

0 0

1G

Fig. 17. Simulated results of tuning of Qos without disturbing fos of band pass shadow filter by varying A2 (i.e. gm2,2) with IB2 of CC-CDCTA2. The tuning of Qos without disturbing fos by varying A2 (i.e. gm2,2) with IB2 = 1µA, 50µA, 100µA of CC-CDCTA2 is achieved, as shown in Fig. 17. It is found that the simulated Qos = 3.31, 4.86, and 5.42 are obtained with a calculated quality factors of 3.19, 4.92, and 5.56 with a deviation of 3.7%, 1.2%, and 2.5% respectively at a fixed simulated frequency of fo = 81.2MHz at a calculated frequency of 79.8 with a deviation of 1.7%. While bandwidths are obtained as 24.53MHz, 16.71MHz, and 14.98MHz and the calculated bandwidths are 25.01MHz, 16.21MHz, and 14.35MHz with a deviation of 1.91%, 3.08%, and 4.4% respectively. These results are summarised in Table 7. The gain of responses also changes in line with (14). Moreover, it is also noted in (17) that one can get tuning of Qos with Rp1 without disturbing fos and gain. The Rp1 values are tuned by varying IB0 of CC-CDCTA1. The simulated responses, as shown in Fig. 18, for the IB0 = 50µA, 150µA, 250µA result in the corresponding Qo = 7.42, 4.35, and 3.31 respectively for the calculated quality factor of 7.21, 4.16, and 3.23 with a deviation of 2.9%, 4.5%, and 2.4% respectively at a fixed gain, and frequency of fos= 84.6MHz whereas the calculated frequency is obtained as 83.24MHz with a deviation of 1.6%. The corresponding simulated bandwidths (BWs) are found as 11.46MHz, 28

19.44MHz, and 25.55MHz respectively while calculated BWs are 11.54MHz, 20.01MHz, and 25.77MHz with a deviation of 1.2%, 2.84%, and 0.85% respectively. These results are summarised in Table 8. 20

Gain (dB)

0 -20 IB0 = 50 A

-40 -60 10M

IB0 = 150 A IB0 = 250 A 100M Frequency (Hz)

1G

Fig. 18. Simulated results of tuning of Qos of band pass shadow filter by varying Rp1 with IB0 of CC-CDCTA1. Table 7. Calculated and simulated parameters for Fig. 17. Parameters

Simulated

Calculated

IB2 = 1 µA 50 µA 100 µA IB2 = 1 µA 50 µA 100 µA Frequency (fOS) (MHz)

81.2

81.2

81.2

79.8

79.8

79.8

Quality factor (QOS)

3.31

4.86

5.42

3.19

4.92

5.56

16.71

14.98

25.01

16.21

14.35

Bandwidth (BWs) (MHz) 24.53

Table 8. Calculated and simulated parameters for Fig. 18. Parameters

Simulated

Calculated

IB0 = 50 µA 150 µA 250 µA IB0 = 50 µA 150 µA 250 µA Frequency (fOS) (MHz)

84.6

84.6

84.6

83.24

83.24

83.24

Quality factor (QOS)

7.42

4.35

3.31

7.21

4.16

3.23

19.44

25.55

11.54

20.01

25.77

Bandwidth (BWs) (MHz) 11.40

29

Furthermore, it is also found in (17) that fos can be tuned independent of Qos by varying capacitance C. The simulated results of the same are obtained as given in Fig. 19 for C = 5pf, 10pf, and 15pf. The corresponding pole frequencies are obtained as fos = 16.8MHz, 8.1MHz, and 5.81MHz for the calculated frequencies of 15.96MHz, 7.98MHz, and 5.32MHz with a deviation of 5.2%, 1.5%, and 9.2% at a fixed simulated Qos = 4.69 and a calculated value of 4.4 with a 4.54% deviation. Whereas, simulated bandwidths are obtained for the value of the respective capacitors are 3.58MHz, 1.84MHz, and 1.23MHz while the calculated values are 3.62MHz, 1.81MHz, and 1.2MHz with a deviation of 1.1%, 1.6%, and 2.51% respectively. The above results are summarised in Table 9. Table 9. Calculated and simulated parameters for Fig. 19. Parameters

Simulated

Calculated

C = 5 pF 10 pF 15 pF C = 5 pF 10 pF 15 pF Frequency (fOS) (MHz)

16.8

8.1

5.81

15.96

7.98

5.32

Quality factor (QOS)

4.69

4.69

4.69

4.4

4.4

4.4

Bandwidth (BWs) (MHz) 3.58

1.84

1.23

3.62

1.81

1.2

20

Gain (dB)

0 -20 -40 C = 5 pf C = 10 pf C = 15 pf

-60 -80 100k

1M

10M 100M Frequency (Hz)

1G

Fig. 19. Simulated result of tuning of fos without disturbing Qos of band pass shadow filter by varying capacitance value, C. The fabrication process and mismatch deviation also affect the performance of the circuit. The study of the same is done for BP filter. Monte-Carlo (MC) simulation for 200 runs is 30

performed by considering the deviation of standard parameters of MOSs as given in Table 10. Fig. 20 shows the MC results for the frequency response of band pass gain. Fig. 21 (a) and (b) show the histogram plot of the distribution of samples for bandwidth (BW) and gainbandwidth (GBW) product, respectively. From these statistical results standard deviations are obtained as 2.6MHz and 25.33MHz for BW and GBW product, respectively. 20

Gain (dB)

0 -20 -40 -60 1M

10M 100M Frequency (Hz)

1G

Fig. 20. Monte-Carlo simulation for 200 runs for BP frequency response. 100 Number = 200

50

Mean = 28.758MHz

40

Std. Dev. = 2.6MHz

No. of Samples

No. of Samples

60

30 20 10 0 20

25 30 35 Bandwidth (MHz)

Number = 200 Mean = 216.493MHz 80 Std. Dev. = 25.3351MHz

60 40 20 0 100

40

(a)

150 200 250 GainBandwidth (MHz)

300

(b)

Fig. 21. Statistical results of Monte-Carlo simulation for BP response (a) BW (b) GBW.

31

Table 10. Deviation values for process and mismatch Parameters (Unit) tox(m)

Process deviation 0.2e-9

Mismatch deviation 0.02e-9

Process and Mismatch deviation 0.22e-9

Standard Value 4e-9

Vth (V)

0.04

0.004

0.044

0.48

L (m)

2e-9

0.2e-9

2.2e-9

0.2e-9

W (m)

2e-9

0.2e-9

2.2e-9

0.2e-9

Cj (F/m2)

0.00015

0.000015

0.000165

0.0010

Cjsw(F/m)

0.3e-10

0.03e-10

0.33e-10

2e-10

Cjswg (F/m)

0.5e-10

0.05e-10

0.55e-10

3.3e-10

Cgo(F/m)

0.6e-10

0.06e-10

0.66e-10

3.7e-10

hdif (m)

2e-8

0.2e-8

2.2e-8

2e-7

The PVT analysis has also been done for the Fast Fast (FF), nominal, and Slow Slow (SS) corners. Voltage has been varied in the range of 1.25V±10%. Whereas, temperatures have been taken as -40oC, 27oC, and 125oC for the FF, nominal, and SS corners respectively. Table 11 shows the deviated values of PMOS, and NMOS parameters in the FF, nominal, and SS corners. Table 12 shows the BW and GBW parameters obtained for BP responses in the defined corners. Moreover, the BP responses have been shown in Fig. 22 for all the three corners which result in the centre frequencies of 93.7MHz, 85.11MHz, and 70.7MHz in the FF, nominal, and SS corners respectively. Table 11. Deviation values for the fast, nominal, and slow corners. Parameters (Unit) tox(m) Vth(V) L (m) W (m) Cj(F/m2) Cjsw(F/m2) Cjswg(F/m) Cgo(F/m) hdif(m)

Fast Fast (FF) PMOS NMOS 3.9e-9 3.9e-9 0.07 -0.1 -1.3e-8 -1.3e-8 -8 1.5e 1.5e-8 0.0011 0.0009 2.4e-10 1.9e-10 4.0e-10 3.2e-10 -10 3.4e 3.8e-10 -7 2e 2e-7

Nominal PMOS 4.0e-9 0 0 0 0.0011 2.5e-10 4.2e-10 3.3e-10 2e-7

32

NMOS 4.0e-9 0 0 0 0.0010 2.0e-10 3.3e-10 3.7e-10 2e-7

Slow Slow (SS) PMOS NMOS 4.2e-9 4.2e-9 -0.07 0.1 1.3e-8 1.3e-8 -8 -1.5e -1.5e-8 0.0012 0.0011 2.6e-10 2.1e-10 4.4e-10 3.5e-10 -10 3.1e 3.5e-10 -7 2e 2e-7

Table 12. Obtained parameters in the defined corners. Parameter

Process Corner FastFast (FF) Nominal SlowSlow (SS) Centre frequency (MHz) 93.7 85.11 70.7 Bandwidth (MHz) 33.29 28.65 21.83 GainBandwidth (MHz) 249.3 222.1 186.9

20

Gain (dB)

0 -20 -40 -60 -80 1M

FF Nominal SS 10M 100M 1G Frequency (Hz)

10G

Fig. 22. Simulated frequency responses of BP filter in fast, nominal, and slow corners. Fig. 23 shows the % total harmonic distortion (%THD) for the high pass filter as well as low pass filter as a function of the input signal. It is found that %THD is low. The intermodulation distortion (IMD) results for band pass filters are given in Table 13 for the sinusoidal input signal of 100µA at 10MHz with a parasitic signal of 10µA for the respective frequencies. To study the output noise of filter, shown in Fig. 9, the noise of basic filter as well shadow filter is measured separately. At the frequency of 1MHz, output noise has been found as 9.256 pA/ 𝐻𝑧, and 0.172 pA/ 𝐻𝑧 in the basic filter and shadow filter respectively as shown in Fig. 24. Bandpass response versus input as obtained at terminal Z of CCCDCTA1 is shown in Fig. 25 which makes it visible that the output of the proposed filter is linear for a wide range of input. To calculate the dynamic range the maximum linear swing of the output is obtained from Fig. 25 with 1% non-linearity as 400.53µA. The total noise is

33

computed using the graphical integration of Fig. 24 and therefore a fairly good dynamic range is obtained as 64.11dB. Table 13. IMD result for the band pass filter Frequency for the parasitic signal (MHz) % THD

1

5

8

10

1.054

1.71

0.912 1.22

12

15

18

20

1.362

1.62

1.261

1.652

1.5 Signal frequency = 10 MHz

% THD

1.0

HP LP

0.5

0.0

0.1 100

200

300 400 Iin (A)

500

600

6.0n Basic filter Shadow filter 40p

4.0n

Output Noise (A/ sqrt(Hz))

Output Noise (A/sqrt(Hz))

Fig. 23. % THD variation of high pass and low pass filters.

2.0n

0.0 10

1k

20p Basic filter Shadow filter 0 100k

1M

10M 100M Frequency (Hz)

100k 10M Frequency (Hz)

1G

1G

Fig. 24. Output noise for the bandpass basic-filter and shadow-filter.

34

600

IBPS (A)

400

200

0

0

200

400 Iin (A)

600

800

Fig. 25. Bandpass response versus input signal. 7. Experimental Verification Monolithic IC for CC-CDCTA is not available. However, it can be implemented with the commercially available CFOA IC AD844 and OTA IC 3080. Although with this exact verification is not possible, however, the nature of the functionality can be verified at low frequency. Fig. 26 (a) shows the circuit of CC-CDCTA based on available commercial ICs, whereas Fig. 26 (b) shows the circuit of Fig. 9 for bandpass filter. To verify the tuning of fOS without disturbing QOS of bandpass shadow filter by varying capacitance (C1 = C2 = C), the components are chosen as C1 = C2 = C = 1nf and 4nf, Rp = Rn = 2kΩ. The supply voltage is taken as ± 5V. Fig. 27 (a) shows the prototype for the assembled circuit using AD844 and CA3080, and Fig. 27 (b) shows the experimental setup. The input current is set to 416µA. The experimental results along with simulated results are shown in Fig. 28. It is found that the experimental cut-off frequencies (fOS) of 89kHz and 24.9kHz are obtained for C = 1nf and C = 4nf respectively with a constant quality factor (QOS) of 4.6. Fig. 29 shows the experimental transfer linearity test with C1 = C2 = C = 1nf for input current range up to 600µA. It verifies that the experimental results are in line with simulated results.

35

(a)

(b) Fig. 26. Schematic diagram based on available ICs (a) CC-CDCTA (b) filter (Fig. 9) 36

(a)

(b)

Fig. 27. Prototype for (a) assembled circuit (b) setup. 20

Simulated Experimental

Gain (dB)

0

C = 1nf

C = 4nf

-20 -40 -60 -80 1k

10k 100k Frequency (Hz)

1M

Fig. 28. Tuning of bandpass shadow filter fOS without disturbing QOS by varying C1=C2=C

IBPS (A)

600

400

200

0

0

200

Iin (A)

400

600

Fig. 29. Transfer linearity test of bandpass shadow filter for C1=C2=C=1nf. 37

8. Conclusion In this paper, CC-CDCTA, a slightly new variant of CDTA, has been presented and used to propose a current-mode universal shadow filter. The proposed shadow filter can simultaneously provide LP, BP, HP as well as BR and AP after the addition of CCII. Full cascadibility is possible owing to the proper impedance at both the input and output terminals of the filter. The availability of orthogonal tunability of pole frequency and quality factor is a very useful feature. Moreover, electronic tuning of various parameters is possible by bias currents of CC-CDCTAs. Power consumption and output noise have also been obtained and found satisfactory. The dynamic range is found to be good. The non-ideality study indicates a suitable range of operating frequency. The circuit is validated by simulation in 180 nm CMOS technology. Moreover, experimental verification has been done using commercially available ICs AD844 and CA3080. References: [1] Safari L, Yuce E, Minaei S. A new ICCII based resistor-less current-mode first-order universal filter with electronic tuning capability. Microelectron J 2017; 67:101-10. [2] Supavarasuwat P, Kumngern M, Sangyaem S. Jaikla W, Khateb F. Cascadable independently and electronically tunable voltage-mode universal filter with grounded passive components. AEU-Int J Electron Commun 2018;84:290-99. [3] Metin B, Cicekoglu O, Ozoguz S. A class of MOSFET-C multifunction filters. Analog Integr Circ Sig Process 2018;97:5-13. [4] Ozenli D, Alaybeyoglu E, Kuntman H, Cicekoglu O. MOSFET-Only filter design automation based on polynomial regression with exemplary circuits. AEU-Int J Electron Commun2018;84:342-54. [5] Lakys Y, Fabre A. Shadow filters – new family of second-order filters. Electron Lett2010;46(4):276–7.

38

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