- Email: [email protected]
Reliability investigation on CdTe solar cells submitted to short-term thermal stress
Microelectronics Reliability 100–101 (2019) 113490
Contents lists available at ScienceDirect
Microelectronics Reliability journal homepage: www.elsevier.com/locate/microrel
Reliability investigation on CdTe solar cells submitted to short-term thermal stress ⁎
T
⁎
Matteo Bertoncelloa, , Marco Barbatoa, Matteo Meneghinia, , Elisa Artegianib, Alessandro Romeob, Gaudenzio Meneghessoa a
Department of Information Engineering, University of Padova, Via Gradenigo 6/B, 35131 Padova, Italy LAPS- Laboratory for Photovoltaics and Solid State Physics, Department of Computer Science, University of Verona, Ca' Vignal 1, Strada Le Grazie 15, 37134 Verona, Italy
b
A B S T R A C T
In this paper, we investigate the effect of short-term thermal stresses in CdTe thin film solar cells. The CdTe solar cells under test are manufactured with physical vapour deposition on soda lime glass in superstrate configuration. Different characterization techniques were used to study the reliability of the solar cells. In particular, external quantum efficiency (EQE) and electroluminescence (EL) measurement were applied in order to investigate the physical processes responsible for degradation. Through this analysis, we give a broad overview of degradation effects using both electrical and optical measurement and correlating the results. We show that (i) during short-term thermal stresses a soft degradation occurs, (ii) the series resistance of the cells increases and (iii) degradation is preliminarily ascribed to the generation of crystal defects due to the diffusion of copper or oxygen atoms in the CdTe solar cells.
1. Introduction Nowadays, the development of renewable photovoltaic technologies is aimed at lowering the levelized cost of energy (LCOE) and the energy payback time of the plants. In this sense CdTe solar cells are the great alternative to conventional silicon photovoltaics. In fact, CdTe is a material with interesting properties such as a high absorption coefficients and energy band gap of 1.5 eV. These characteristics allow CdTe cells to absorb the majority of the solar radiation and maximize the efficiency [10]. Other interesting properties are the smaller carbon footprint, lower water use during production and shorter energy payback time on a life cycle [5,7,12]. In the last decade, many laboratories have tried to produce high efficiency CdTe solar cells using simple fabrication methods, in order to lower costs. Over the years, CdTe fabrication process has been optimized and improved obtaining efficiencies above 22% [16,19]. In general, these studies are focused on finding the best materials configuration in order to obtain high efficiency at low cost, but they do not analyze reliability and durability of the solar cells. Different issues can affect the reliability of CdTe solar cells: thermal changes [9], potential induced degradation, light induced degradation [6] and humidity [11]. In particular, thermal effects are an important problem for solar
⁎
cells; they are one of main causes of degradation of modules installed on the roofs. In fact, solar cells illuminated by the sun can reach high temperatures. This phenomenon can cause hard stress for the cells structure and can activate chemical reactions that can compromise the integrity of the cells, especially if high current densities flow through the junction. This study wants to investigate these issues and understand the thermally-driven degradation process of CdTe solar cells. To do this, we submitted different CdTe solar cell samples [20], to accelerate stress test that emulates a short-term use of the device. During the stress, we monitored the main solar cells parameters (open circuit voltage Vov, short circuit current Isc, fill factor FF, series resistance Rs, shunt resistance Rsh) by performing dark and light currentvoltage measurements in order to analyze the degradation of solar cells. 2. Device description CdTe devices have been fabricated on a soda lime glass in superstrate configuration. A 400 nm thick ITO layer followed by a 100 nm thick ZnO layer have been deposited by radio-frequency sputtering. These layers constitute the front contact of the cell. Then a 150 nm thick CdS layer followed by a 6 μm thick CdTe layer have been deposited by vacuum evaporation. These layers form the p/n junction. In order to recrystallize the CdTe layer and to favor the formation of a CdSxTe1−x
Corresponding authors. E-mail addresses: [email protected] (M. Bertoncello), [email protected] (M. Meneghini).
https://doi.org/10.1016/j.microrel.2019.113490 Received 14 May 2019; Received in revised form 1 August 2019; Accepted 4 August 2019 Available online 23 September 2019 0026-2714/ © 2019 Elsevier Ltd. All rights reserved.
Microelectronics Reliability 100–101 (2019) 113490
M. Bertoncello, et al.
glass
Keithley 2651A and a LEDs solar simulator with a software that normalized the characteristic with AM 1.5G spectrum, all controlled by Labview. Finally, the PVD was performed by using the oscilloscope Tektronix DPO 7354 and a pulse LEDs light. This stress wanted to emulate the thermal changes that may occur in short term operation. It is carried out in a climatic chamber (MPM instrument M400-VF) containing air with controlled heating and cooling steps. The chamber was left to stabilize between one step and the next, before inserting the sample. The duration of cooling remained constant for every step, whereas duration of heating was varied by varying the step, as shown in the Fig. 2. For all heating steps, the temperature was 80 °C, whereas the temperature was 25 °C for all step of cooling. At the end of each step, we performed the following measurement: EQE, dark IV, light IV and PVD. At the end of accelerated stress, we made further analysis, in particular electroluminescence (EL) in order to investigate any structure variations or formation of defects. Similar thermal stress test was usually applied in silicon solar cells [2].
3mm
ITO
400nm
ZnO CdS
100nm N layer 150nm
CdTe
6µm P layer
Cu Au
0.1nm 30nm
Fig. 1. Schematic representation of CdTe cell. The cell support is made of soda lime glass. ITO and ZnO constitute the transparent conductive oxide layer. CdS (n layer) and CdTe (p layer) form p/n junction of cell and Cu and Au are the electrical contact.
4. Results
compound which reduces the lattice mismatch between CdS and CdTe, an activation treatment is needed. For this reason a CdCl2 solution in methanol is applied by wet deposition and subsequently the stack is annealed in air at 400 °C. To remove the CdCl2 residuals and create a Te-rich layer, an etching in Br-methanol solution is performed. After that a 0.1 nm thick Cu layer and a 30 nm thick Au layer are deposited by vacuum evaporation. These layers are the back contact of the cell. In order to reach good efficiencies, two final annealing in air are needed: the first at 200 °C and the second at 300 °C for 30 min for copper diffusion (Fig. 1).
Fig. 3 shows the evolution of the EQE during the accelerated stress test.
3. Stress procedure description Fig. 2 shows a schematic representation of the accelerated thermal stress. During the entire procedure, the stress test was cyclically interrupted in order to characterize the device. To do this, we perform optical and electrical measurements on the sample. The following measurements were performed: external quantum efficiency (EQE), current voltage measurement in dark conditions (dark IV) and current voltage measurements under light illumination (light IV), photo voltage decay (PVD). EQE was performed by using the LOANA system (PV TOOLS). Dark IV were performed by using the source meter Keithley 2651A controlled by Labview. Light IV were performed by using the source meter
a)
90 80
1h
2h
4h
7h
41h
25h
17h
Temperature °C
70 60 50
b)
40
30 20 10
24h
24h 24h 24h first mesuarement mesuarement
24h
24h
24h
Fig. 3. a) EQE chart extracted from temperature stress. The grey circle denotes degradation of EQE due to the defects in active region introduced by Cu and O2. Black circle denotes degradation of EQE due to the defect in the CdS layer or in the CdS/ZnO interface; blue circle denotes degradation due to defects in CdS layer or in the in CdTe/CdS interface. In both cases the defects are introduced by Cu. b) Ratio of the EQE curves with the EQE curve at 0 h to appreciate the shift of the curves than initial condition (violet line). (For interpretation of the references to color in this figure legend, the reader is referred to the web version of this article.)
0
Fig. 2. Accelerated stress test. It allowed emulating the short-term operating conditions of solar cells. It was carried out with controlled heating and cooling steps. Measurements were made at the end of each step (green cross). (For interpretation of the references to color in this figure legend, the reader is referred to the web version of this article.) 2
Microelectronics Reliability 100–101 (2019) 113490
M. Bertoncello, et al.
Fig. 4. Dark IV chart measured during the temperature stress. The grey circle denotes degradation of diode of PV model, whereas black circle denotes degradation of series resistance of PV model.
EQE is defined as ratio between impinging on the cell and electrons generated by photovoltaic effect. After the accelerated stress, EQE charts (see Fig. 3) showed significant changes in three regions: between 400 nm and 500 nm, between 500 nm and 600 nm and between 600 nm and 750 nm. The first region (see black circle in Fig. 3) is determined by the photon caught by CdS layer or CdS/ZnO interface of the cell; the second region (see blue circle in Fig. 3) is determined by the photon caught by CdS or CdS/CdTe interface; finally the third region (see grey circle in Fig. 3) is determined by the photons reaching the absorber [2,3]. In all cases, the relative value of EQE has dropped, probably due to defects that originate from the diffusion of Cu and/or oxidation of back contact [8,18]. The dark IV characterization (Fig. 4) shows a chanced of characteristic in two zones, highlighted by cycles in Fig. 4. The grey circle represents the curve section influenced by second diode of a double diode mathematic model [4], whereas the black circle represents the curve section influenced by series resistance [1]. The series resistance models the potential drop caused by the contacts, the diode model is affected by the junction properties and by the secondary junction (CdTe/back contact) [1–3]. We note that after stress series resistance is increased and the second diode is turned on. Electroluminescence (EL) is an optical and electrical phenomenon in which a material emits light in response to the passage of an electric current or to a strong electric field. The EL characterization (see Fig. 5) was carried out to understand the results presented in Figs. 3 and 4; in particular if the degradation of EQE and dark IV curves are due to conductive paths generated by the thermal stress. The results indicate that the accelerated stress has not created any visible shunts in the material. In fact, in condition of diode off [4], the lower number of counts shows that there is no current flux in the structure. This proves that conductive paths are not created during stress and the diode structure is maintained intact. The thermal changes cause a lower production of power. The efficiency of cells is decreasing. Taking into account the results of previous measurement and the studies present in literature [8,18], we suppose that the degradation of CdTe solar cells is caused by migration of copper ions present in the contact and oxygen ions present in the air into internal and superficial region of the cell. In particular, we think that there are two different mechanisms, one
Fig. 5. EL imagine extracted at the end of temperature stress. Notice that most of area is blue. This means that the most of cell structure is intact. In fact, this measurement is extracted when the diodes are off. A lower number of counts mean that there is no current flux in the structure. This proves that conductive paths are not created during stress (red area was already present before the stress treatment). (For interpretation of the references to color in this figure legend, the reader is referred to the web version of this article.)
for copper and one for oxygen. Regarding copper, we presume that the high temperature has activated the following chemical reaction (1):
Cu2 Te → CuTe + Cu++ + 2e−
(1)
Cu2Te is a good conductor that is generated at the Cu/CdTe interface when copper is deposited on the Te-rich layer given by the Brmethanol etching and annealed. Whereas CuTe is a bad conductor that is generated at Cu/CdTe interface by the degradation of Cu2Te occurred during the stress [8]. This justifies the increasing of series resistance and the activation of second diode showed in dark IV chart. The copper ions created by the degradation process can move easily into crystal lattice of CdTe/CdS. They can arrive up to the CdS layer [17]. This explains the degradation of EQE chart for short wavelengths. We believe that oxygen ions in the atmosphere tend to oxidize the back contact. Due to the thermal energy during stress test they bind with the Te atoms forming tellurium oxide on the surface. This increases the back contact barrier height, with a consequent increment in series resistance in the dark IV characteristic and arises of roll over [18]. CuTe compounds have been already detected by grazing incidence X-ray diffraction analysis on CdTe surface in similar samples fabricated in the same laboratory. Moreover micro-Raman measurements pointed out the presence of a tellurium rich layer on CdTe surface due to BrMeOH etching [15]. Light IV measurement (Fig. 6) shows a decrease of power and it underlines a decrease of efficiency in agreement with the other electrical measurement. Lastly, we consider the PVD chart (see Fig. 7). This is a measurement technique which consists of generating a voltage drop in solar cell through a pulsed light and measuring it by an oscilloscope [13]. For CdTe solar cells the time-voltage curve (see Fig. 7) can be fitted by triple exponential [14]: 3
Microelectronics Reliability 100–101 (2019) 113490
M. Bertoncello, et al.
Fig. 7. a) PVD chart extracted from temperature stress; b) τ1-stress time plot elaborated from data extracted by PVD. PVD in a CdTe cell is fitted by a triple exponential. According our model, the first-time parameter (τ1) represents lifetime, whereas other constants parameter are influenced by capacitive effects.
defect generation within the junction. The PVD transients could be fitted only by using a triple exponential function, indicating the existence of more than one lifetime-limiting process (see Fig. 7). The anomalous behaviour of the last curve plotted in Fig. 7a (scarlet red curve) can be explain with the creation of a low shunt resistance (Rsh) induced by the stress. Probably, the stress created small conductive paths that influence only PVD measurement (comparison with 41 h light IV curve in Fig. 6a). 5. Conclusions This study wanted to offer a broad overview about degradation mechanism of CdTe solar cells. Specifically, we adopted several analytical techniques to study and identify the main degradation modes and mechanisms induced by short-term thermal stress. The results indicate a decrease in cell efficiency, a drop in carrier lifetime and a change in the electrical parameters. The results are interpreted by considering a diffusion of Cu (from the contact) or O2 (from the air) towards the active region of device. These defects influence both optical and electric characteristics.
Fig. 6. a) IV light chart extracted from temperature stress; b) power-stress time plot elaborated from data extracted by light IV; c) fill factor-stress time plot elaborated from data extracted by light IV; d) efficiency-stress time plot elaborated from data extracted by light IV.
V = a·e−(t/τ1) + b·e−(t/τ2) + c·e−(t/τ3) + v0
(2)
where τ1, τ2, τ3 are the temporal decay coefficients of the curve. In the Fig. 7b we extrapolated τ1, because according to our hypothesis, this parameter is an indirect indicator of carrier lifetime (the information is deduced from the trend of the curve and not from a quantitative measure, for this reason we used a normalized time scale for parameter τ1). After stress, we deduced a significant decrease in carrier lifetime from the trend of PVD curves, which is consistent with the hypothesis of
Declaration of competing interest All authors have participated in (a) conception and design, or analysis and interpretation of the data; (b) drafting the article or revising it critically for important intellectual content; and (c) approval of 4
Microelectronics Reliability 100–101 (2019) 113490
M. Bertoncello, et al.
the final version. This manuscript has not been submitted to, nor is under review at, another journal or other publishing venue. The authors have no affiliation with any organization with a direct or indirect financial interest in the subject matter discussed in the manuscript.
Photovoltaic Specialists Conference, 2000, pp. 535–538. [9] G. Korcsmáros, P. Moravec, R. Grill, A. Musiienko, K. Mašek, Thermal stability of bulck p CdTe, J. Alloys Compd. 680 (2016) 8–13. [10] B.E. McCandless, J.R. Sites, Handbook of Photovoltaic Science and Engineering, John Wiley & Sons, 2003. [11] R. Mendoza Pérez, J. Sastre Hernández, G. Contreras Puente, O. Vigil Galán, CdTe solar cell degradation studies with the use of CdSas the window material, Sol. Energy Mater. Sol. Cells (2009) 79–84. [12] J. Peng, L. Lu, H. Yang, Review on life cycle assessment of energy payback and greenhouse gas emission of solar photovoltaic systems, Renew. Sust. Energ. Rev. 19 (2013) 255–274. [13] T. Pisarkiewicz, Photodecay method in investigation on material and photovoltaic structure, Opt. Rev. 12 (2004) 33–40. [14] K. Price, C. Lacy, D.P. Hunley, Photovoltage decay in CdTe/CdS solar cells, 2006 IEEE 4th World Conference on Photovoltaic Energy Conference, 2006, pp. 436–437. [15] I. Rimmaudo, A. Salavei, E. Artegiani, D. Menossi, M. Giarola, G. Mariotto, A. Gasparotto, A. Romeo, Improved stability of CdTe solar cells by absorber surface etching, Sol. Energy Mater. Sol. Cells 162 (1 April 2017) 127–133. [16] N. Romeo, A. Bosio, A. Romeo, An innovative process suitable to produce highefficiency CdTe/CdS thin-film modules, Sol. Energy Mater. Sol. Cells 94 (2010) 2–7. [17] B. Tetali, V. Viswanathan, D.L. Morel, C.S. Ferekides, Effects of thermal stressing on CdTe/CdS solar cells, Conference Record of the Twenty-Ninth IEEE Photovoltaic Specialists Conference, 2002., New Orleans, LA, USA, 2002, pp. 600–603. [18] I. Visoly-Fisher, K.D. Dobson, J. Nair, E. Bezalel, G. Hodes, D. Cahen, Factors affecting the stability of CdTe/CdS solar cells deduced from stress tests at elevated temperature, Adv. Funct. Mater. 13 (4) (2003) 289–299. [19] E. Artegiani, Celle solari a film sottile in CdTe: gli effetti del contatto frontale, Master thesis Università degli studi di Parma, 2014. [20] N. Romeo, A. Bosio, A. Romeo, Preparazione di un Ossido Trasparente e Conduttore (TCO) Adatto alla Produzione su Larga Scala di Celle Solari a Film Sottili Tipo CdTeUCdSO. Domanda n° LU2001A000012, Brevetto n° 0001330048, Solar Systems & Equipment S.r.l, 2001.
References [1] M. Barbato, M. Meneghini, A. Cester, C. Mura, E. Zanoni, G. Meneghesso, Influence of shunt resistance on the performance of an illuminated string of solar cells: theory, simulation, and experimental analysis, IEEE Trans. Device Mater. Reliab. 14 (4) (2014) 942–950. [2] M. Barbato, A. Barbato, M. Meneghini, G. Tavernaro, M. Rossetto, G. Meneghesso, Potential induced degradation of N-type bifacial silicon solar cells: an investigation based on electrical and optical measurements: theory, simulation, and experimental analysis, Sol. Energy Mater. Sol. Cells 168 (2017) 51–61. [3] D.L. Bätzner, M. Öszan, D. Bonnet, K. Bücher, Device analysis methods for physical cell parameters of CdTe/Cds solar cells, Thin Solid Films 361–362 (2000) 288–292. [4] V.J. Chin, Z. Zainal Salam, K. Ishaque, An accurate modelling of the two-diode model of PV module using a hybrid solution based on differential evolution, Energy Convers. Manag. (2016) 42–50. [5] M. De Wild-Scholten, Energy payback time and carbon footprint of commercial photovoltaic systems, Sol. Energy Mater. Sol. Cells 119 (2013) 296–305. [6] X. Fang, Ren, C. Li, C. Li, G. Chen, H. Lai, J. Zhang, Wu, Investigation of recombination mechanisms of CdTe solar cells with different buffer layers, Sol. Energy Mater. Sol. Cells 188 (2018) 93–98. [7] V. Fthenakis, H.C. Kim, Life-cycle uses of water in U.S. electricity generation, Renew. Sust. Energ. Rev. 14 (7) (2010) 2039–2049. [8] S.S. Hegedus, B.E. McCandless, R.W. Birkmire, Analysis of stress induced degradation in CdS/CdTe solar cells, Conference Record of the Twenty-eighth IEEE
5
Contents lists available at ScienceDirect
Microelectronics Reliability journal homepage: www.elsevier.com/locate/microrel
Reliability investigation on CdTe solar cells submitted to short-term thermal stress ⁎
T
⁎
Matteo Bertoncelloa, , Marco Barbatoa, Matteo Meneghinia, , Elisa Artegianib, Alessandro Romeob, Gaudenzio Meneghessoa a
Department of Information Engineering, University of Padova, Via Gradenigo 6/B, 35131 Padova, Italy LAPS- Laboratory for Photovoltaics and Solid State Physics, Department of Computer Science, University of Verona, Ca' Vignal 1, Strada Le Grazie 15, 37134 Verona, Italy
b
A B S T R A C T
In this paper, we investigate the effect of short-term thermal stresses in CdTe thin film solar cells. The CdTe solar cells under test are manufactured with physical vapour deposition on soda lime glass in superstrate configuration. Different characterization techniques were used to study the reliability of the solar cells. In particular, external quantum efficiency (EQE) and electroluminescence (EL) measurement were applied in order to investigate the physical processes responsible for degradation. Through this analysis, we give a broad overview of degradation effects using both electrical and optical measurement and correlating the results. We show that (i) during short-term thermal stresses a soft degradation occurs, (ii) the series resistance of the cells increases and (iii) degradation is preliminarily ascribed to the generation of crystal defects due to the diffusion of copper or oxygen atoms in the CdTe solar cells.
1. Introduction Nowadays, the development of renewable photovoltaic technologies is aimed at lowering the levelized cost of energy (LCOE) and the energy payback time of the plants. In this sense CdTe solar cells are the great alternative to conventional silicon photovoltaics. In fact, CdTe is a material with interesting properties such as a high absorption coefficients and energy band gap of 1.5 eV. These characteristics allow CdTe cells to absorb the majority of the solar radiation and maximize the efficiency [10]. Other interesting properties are the smaller carbon footprint, lower water use during production and shorter energy payback time on a life cycle [5,7,12]. In the last decade, many laboratories have tried to produce high efficiency CdTe solar cells using simple fabrication methods, in order to lower costs. Over the years, CdTe fabrication process has been optimized and improved obtaining efficiencies above 22% [16,19]. In general, these studies are focused on finding the best materials configuration in order to obtain high efficiency at low cost, but they do not analyze reliability and durability of the solar cells. Different issues can affect the reliability of CdTe solar cells: thermal changes [9], potential induced degradation, light induced degradation [6] and humidity [11]. In particular, thermal effects are an important problem for solar
⁎
cells; they are one of main causes of degradation of modules installed on the roofs. In fact, solar cells illuminated by the sun can reach high temperatures. This phenomenon can cause hard stress for the cells structure and can activate chemical reactions that can compromise the integrity of the cells, especially if high current densities flow through the junction. This study wants to investigate these issues and understand the thermally-driven degradation process of CdTe solar cells. To do this, we submitted different CdTe solar cell samples [20], to accelerate stress test that emulates a short-term use of the device. During the stress, we monitored the main solar cells parameters (open circuit voltage Vov, short circuit current Isc, fill factor FF, series resistance Rs, shunt resistance Rsh) by performing dark and light currentvoltage measurements in order to analyze the degradation of solar cells. 2. Device description CdTe devices have been fabricated on a soda lime glass in superstrate configuration. A 400 nm thick ITO layer followed by a 100 nm thick ZnO layer have been deposited by radio-frequency sputtering. These layers constitute the front contact of the cell. Then a 150 nm thick CdS layer followed by a 6 μm thick CdTe layer have been deposited by vacuum evaporation. These layers form the p/n junction. In order to recrystallize the CdTe layer and to favor the formation of a CdSxTe1−x
Corresponding authors. E-mail addresses: [email protected] (M. Bertoncello), [email protected] (M. Meneghini).
https://doi.org/10.1016/j.microrel.2019.113490 Received 14 May 2019; Received in revised form 1 August 2019; Accepted 4 August 2019 Available online 23 September 2019 0026-2714/ © 2019 Elsevier Ltd. All rights reserved.
Microelectronics Reliability 100–101 (2019) 113490
M. Bertoncello, et al.
glass
Keithley 2651A and a LEDs solar simulator with a software that normalized the characteristic with AM 1.5G spectrum, all controlled by Labview. Finally, the PVD was performed by using the oscilloscope Tektronix DPO 7354 and a pulse LEDs light. This stress wanted to emulate the thermal changes that may occur in short term operation. It is carried out in a climatic chamber (MPM instrument M400-VF) containing air with controlled heating and cooling steps. The chamber was left to stabilize between one step and the next, before inserting the sample. The duration of cooling remained constant for every step, whereas duration of heating was varied by varying the step, as shown in the Fig. 2. For all heating steps, the temperature was 80 °C, whereas the temperature was 25 °C for all step of cooling. At the end of each step, we performed the following measurement: EQE, dark IV, light IV and PVD. At the end of accelerated stress, we made further analysis, in particular electroluminescence (EL) in order to investigate any structure variations or formation of defects. Similar thermal stress test was usually applied in silicon solar cells [2].
3mm
ITO
400nm
ZnO CdS
100nm N layer 150nm
CdTe
6µm P layer
Cu Au
0.1nm 30nm
Fig. 1. Schematic representation of CdTe cell. The cell support is made of soda lime glass. ITO and ZnO constitute the transparent conductive oxide layer. CdS (n layer) and CdTe (p layer) form p/n junction of cell and Cu and Au are the electrical contact.
4. Results
compound which reduces the lattice mismatch between CdS and CdTe, an activation treatment is needed. For this reason a CdCl2 solution in methanol is applied by wet deposition and subsequently the stack is annealed in air at 400 °C. To remove the CdCl2 residuals and create a Te-rich layer, an etching in Br-methanol solution is performed. After that a 0.1 nm thick Cu layer and a 30 nm thick Au layer are deposited by vacuum evaporation. These layers are the back contact of the cell. In order to reach good efficiencies, two final annealing in air are needed: the first at 200 °C and the second at 300 °C for 30 min for copper diffusion (Fig. 1).
Fig. 3 shows the evolution of the EQE during the accelerated stress test.
3. Stress procedure description Fig. 2 shows a schematic representation of the accelerated thermal stress. During the entire procedure, the stress test was cyclically interrupted in order to characterize the device. To do this, we perform optical and electrical measurements on the sample. The following measurements were performed: external quantum efficiency (EQE), current voltage measurement in dark conditions (dark IV) and current voltage measurements under light illumination (light IV), photo voltage decay (PVD). EQE was performed by using the LOANA system (PV TOOLS). Dark IV were performed by using the source meter Keithley 2651A controlled by Labview. Light IV were performed by using the source meter
a)
90 80
1h
2h
4h
7h
41h
25h
17h
Temperature °C
70 60 50
b)
40
30 20 10
24h
24h 24h 24h first mesuarement mesuarement
24h
24h
24h
Fig. 3. a) EQE chart extracted from temperature stress. The grey circle denotes degradation of EQE due to the defects in active region introduced by Cu and O2. Black circle denotes degradation of EQE due to the defect in the CdS layer or in the CdS/ZnO interface; blue circle denotes degradation due to defects in CdS layer or in the in CdTe/CdS interface. In both cases the defects are introduced by Cu. b) Ratio of the EQE curves with the EQE curve at 0 h to appreciate the shift of the curves than initial condition (violet line). (For interpretation of the references to color in this figure legend, the reader is referred to the web version of this article.)
0
Fig. 2. Accelerated stress test. It allowed emulating the short-term operating conditions of solar cells. It was carried out with controlled heating and cooling steps. Measurements were made at the end of each step (green cross). (For interpretation of the references to color in this figure legend, the reader is referred to the web version of this article.) 2
Microelectronics Reliability 100–101 (2019) 113490
M. Bertoncello, et al.
Fig. 4. Dark IV chart measured during the temperature stress. The grey circle denotes degradation of diode of PV model, whereas black circle denotes degradation of series resistance of PV model.
EQE is defined as ratio between impinging on the cell and electrons generated by photovoltaic effect. After the accelerated stress, EQE charts (see Fig. 3) showed significant changes in three regions: between 400 nm and 500 nm, between 500 nm and 600 nm and between 600 nm and 750 nm. The first region (see black circle in Fig. 3) is determined by the photon caught by CdS layer or CdS/ZnO interface of the cell; the second region (see blue circle in Fig. 3) is determined by the photon caught by CdS or CdS/CdTe interface; finally the third region (see grey circle in Fig. 3) is determined by the photons reaching the absorber [2,3]. In all cases, the relative value of EQE has dropped, probably due to defects that originate from the diffusion of Cu and/or oxidation of back contact [8,18]. The dark IV characterization (Fig. 4) shows a chanced of characteristic in two zones, highlighted by cycles in Fig. 4. The grey circle represents the curve section influenced by second diode of a double diode mathematic model [4], whereas the black circle represents the curve section influenced by series resistance [1]. The series resistance models the potential drop caused by the contacts, the diode model is affected by the junction properties and by the secondary junction (CdTe/back contact) [1–3]. We note that after stress series resistance is increased and the second diode is turned on. Electroluminescence (EL) is an optical and electrical phenomenon in which a material emits light in response to the passage of an electric current or to a strong electric field. The EL characterization (see Fig. 5) was carried out to understand the results presented in Figs. 3 and 4; in particular if the degradation of EQE and dark IV curves are due to conductive paths generated by the thermal stress. The results indicate that the accelerated stress has not created any visible shunts in the material. In fact, in condition of diode off [4], the lower number of counts shows that there is no current flux in the structure. This proves that conductive paths are not created during stress and the diode structure is maintained intact. The thermal changes cause a lower production of power. The efficiency of cells is decreasing. Taking into account the results of previous measurement and the studies present in literature [8,18], we suppose that the degradation of CdTe solar cells is caused by migration of copper ions present in the contact and oxygen ions present in the air into internal and superficial region of the cell. In particular, we think that there are two different mechanisms, one
Fig. 5. EL imagine extracted at the end of temperature stress. Notice that most of area is blue. This means that the most of cell structure is intact. In fact, this measurement is extracted when the diodes are off. A lower number of counts mean that there is no current flux in the structure. This proves that conductive paths are not created during stress (red area was already present before the stress treatment). (For interpretation of the references to color in this figure legend, the reader is referred to the web version of this article.)
for copper and one for oxygen. Regarding copper, we presume that the high temperature has activated the following chemical reaction (1):
Cu2 Te → CuTe + Cu++ + 2e−
(1)
Cu2Te is a good conductor that is generated at the Cu/CdTe interface when copper is deposited on the Te-rich layer given by the Brmethanol etching and annealed. Whereas CuTe is a bad conductor that is generated at Cu/CdTe interface by the degradation of Cu2Te occurred during the stress [8]. This justifies the increasing of series resistance and the activation of second diode showed in dark IV chart. The copper ions created by the degradation process can move easily into crystal lattice of CdTe/CdS. They can arrive up to the CdS layer [17]. This explains the degradation of EQE chart for short wavelengths. We believe that oxygen ions in the atmosphere tend to oxidize the back contact. Due to the thermal energy during stress test they bind with the Te atoms forming tellurium oxide on the surface. This increases the back contact barrier height, with a consequent increment in series resistance in the dark IV characteristic and arises of roll over [18]. CuTe compounds have been already detected by grazing incidence X-ray diffraction analysis on CdTe surface in similar samples fabricated in the same laboratory. Moreover micro-Raman measurements pointed out the presence of a tellurium rich layer on CdTe surface due to BrMeOH etching [15]. Light IV measurement (Fig. 6) shows a decrease of power and it underlines a decrease of efficiency in agreement with the other electrical measurement. Lastly, we consider the PVD chart (see Fig. 7). This is a measurement technique which consists of generating a voltage drop in solar cell through a pulsed light and measuring it by an oscilloscope [13]. For CdTe solar cells the time-voltage curve (see Fig. 7) can be fitted by triple exponential [14]: 3
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Fig. 7. a) PVD chart extracted from temperature stress; b) τ1-stress time plot elaborated from data extracted by PVD. PVD in a CdTe cell is fitted by a triple exponential. According our model, the first-time parameter (τ1) represents lifetime, whereas other constants parameter are influenced by capacitive effects.
defect generation within the junction. The PVD transients could be fitted only by using a triple exponential function, indicating the existence of more than one lifetime-limiting process (see Fig. 7). The anomalous behaviour of the last curve plotted in Fig. 7a (scarlet red curve) can be explain with the creation of a low shunt resistance (Rsh) induced by the stress. Probably, the stress created small conductive paths that influence only PVD measurement (comparison with 41 h light IV curve in Fig. 6a). 5. Conclusions This study wanted to offer a broad overview about degradation mechanism of CdTe solar cells. Specifically, we adopted several analytical techniques to study and identify the main degradation modes and mechanisms induced by short-term thermal stress. The results indicate a decrease in cell efficiency, a drop in carrier lifetime and a change in the electrical parameters. The results are interpreted by considering a diffusion of Cu (from the contact) or O2 (from the air) towards the active region of device. These defects influence both optical and electric characteristics.
Fig. 6. a) IV light chart extracted from temperature stress; b) power-stress time plot elaborated from data extracted by light IV; c) fill factor-stress time plot elaborated from data extracted by light IV; d) efficiency-stress time plot elaborated from data extracted by light IV.
V = a·e−(t/τ1) + b·e−(t/τ2) + c·e−(t/τ3) + v0
(2)
where τ1, τ2, τ3 are the temporal decay coefficients of the curve. In the Fig. 7b we extrapolated τ1, because according to our hypothesis, this parameter is an indirect indicator of carrier lifetime (the information is deduced from the trend of the curve and not from a quantitative measure, for this reason we used a normalized time scale for parameter τ1). After stress, we deduced a significant decrease in carrier lifetime from the trend of PVD curves, which is consistent with the hypothesis of
Declaration of competing interest All authors have participated in (a) conception and design, or analysis and interpretation of the data; (b) drafting the article or revising it critically for important intellectual content; and (c) approval of 4
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the final version. This manuscript has not been submitted to, nor is under review at, another journal or other publishing venue. The authors have no affiliation with any organization with a direct or indirect financial interest in the subject matter discussed in the manuscript.
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