Chapter 29
Silicon Direct Bonding Kimmo Henttinen1 and Tommi Suni2 1
Okmetic Oyj, Vantaa, Finland, 2VTT Technical Research Centre of Finland LTD, Espoo, Finland; currently at Picosun Ltd, Espoo, Finland
Direct bonding generally means joining of two pieces together without an intermediate layer or external force. If the surfaces are flat, clean and smooth, they can stick together when brought into contact and form a weak bond based on physical forces at room temperature. The physical forces can be van der Waals type of forces, hydrogen bonding, capillary forces or electrostatic forces [1]. Without subsequent annealing the bonding between the wafers is reversible. After wafer contacting the physical forces can be converted to chemical bonds by annealing. This may increase the adhesion between the surfaces up to the cohesive strength of the material in concern. The type of the bonding is determined by the chemical species on the surfaces. In the case of silicon the direct bonding falls into two main categories depending on the surface chemistry: Hydrophilic bonding, in which the surface has silicon oxide with silanol groups (Si OH) on the top and hydrophobic bonding, in which the surface is basically bare silicon.
29.1 HYDROPHILIC HIGH-TEMPERATURE WAFER BONDING Hydrophilic bonding is used commercially for example to produce SOI-wafers and microelectromechanical structures. In a typical case one of the silicon wafers is thermally oxidized while the other has a thin native or chemical oxide on top. TEM image of the bonded interface between thermal oxide and hydrophilic silicon surface is presented in Figure 29.1. Also, it is possible to use chemical vapor deposited (CVD) oxides or sputtered oxides, if the requirements for cleanliness, smoothness and flatness are met. One of the problems associated with wafer bonding is unbonded areas called interface bubbles or voids. Voids can form during the room-temperature contacting of the wafers or they can also be induced during the subsequent
annealing steps. During wafer contacting each wafer has to deform elastically in order to achieve the conformity of the two surfaces. In practice, the flatness variation of 1 5 µm over 150 mm silicon wafers poses no problems for wafer contacting, because wafers can accommodate this scale of surface waviness. Bow and warp of 150 mm wafers up to several tens of micrometers or even 100 µm are also tolerable. However, particles that are trapped between the wafers cause unbonded areas. During roomtemperature bonding the wafers have to deform around the particles, leaving typically circular unbonded areas (Figure 29.2). Particle induced voids can be relatively large, for example, a 1 µm particle may cause a void with a diameter of few millimeters. The size of the void due to a certain particle is a strong function of the wafer thickness. Thin wafers can more easily deform around particles and other surface non-idealities. Cleanliness is very important in wafer bonding because surface contamination has direct influence on both the structural and electrical properties of the bonded interface. For example, boron contamination in a form of B2O3 from clean room air may chemically adsorb on the wafer surfaces leading to boron rich layers near the bonded interface. Boron contamination can be minimized with proper clean room construction and flushing the wafer surfaces with DI-water just prior to wafer contacting. Microroughness of the wafer surface is a local parameter that is also very crucial in wafer bonding, because the physical forces that keep the wafers together at room temperature are short range forces. Microroughness is normally measured with atomic force microscopy (AFM) or scanning tunneling microscopy (STM) and quantified with parameters like root mean square (RMS) or average roughness (Ra). Practice has shown that surface roughness ˚ (RMS on 3 µm 3 3 µm area) is adequate less than 3 5 A for direct bonding of hydrophilic silicon wafer surfaces. In theory, two wafers of almost any material can be bonded together if their surfaces are sufficiently flat and
Handbook of Silicon Based MEMS Materials and Technologies. DOI: http://dx.doi.org/10.1016/B978-0-323-29965-7.00029-4 © 2015 Elsevier Inc. All rights reserved.
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Thermal oxide
Silicon
100 nm
FIGURE 29.1 Cross-sectional TEM image of bonded interface between thermal oxide and silicon.
steps based on hydrogen peroxide (RCA 1 and RCA 2 cleans) yield hydrophilic surfaces and they also remove particles and metallic contamination from silicon and silicon oxide surfaces. The hydrophilic silicon wafer surface contains Si O Si and Si OH bonds. The surface hydroxyl groups ( OH) are polarized and therefore very reactive to water. As two hydrophilic silicon surfaces are contacted in the initial state, the two surfaces form the bond via water molecules (Figure 29.3(a)). During annealing these water molecules diffuse out from the interface, dissolve into the surrounding material or react with surfaces forming more silanol groups (Si OH). Once these water molecules are removed, a bond is formed between silanol groups (Figure 29.3(b)). During further annealing, opposing silanol groups react according to reaction 29.1: Si 2 OH 1 Si 2 OH 5 Si 2 O 2 Si 1 H2 O
(29.1)
During this reaction more water molecules are released and Si O Si bonding is formed (Figures 29.3 (c) and Figure 29.4). The water molecules from the bonded interface diffuse into the silicon dioxide on the surfaces. If the water reaches the silicon, it reacts with it to form silicon dioxide and hydrogen according to the reaction: Si 1 2H2 O 5 SiO2 1 2H2
(29.2)
The remaining hydrogen does not react with silicon and may cause problems in the form of trapped gas, which is detectable with an IR camera or scanning acoustic microscopy as voids (Figure 29.5). However, hydrogen has a high solubility into SiO2 and by having an oxide layer of thickness .50 nm on at least one wafer surface, hydrogen-induced voids can be avoided. The required amount of oxide on the surfaces for completely dissolving the hydrogen depends on the amount of water present at the interface. The water content can be tuned by changing the hydrophilicity of the surfaces and by using different bonding atmospheres, for example, vacuum bonding. FIGURE 29.2 Scanning acoustic microscopy image of a wafer pair bonded without sufficient cleaning. The voids (represented in the image as white areas) are induced by particles and/or other contamination on the wafer surfaces.
clean so that the surface molecules can get close together and interact with physical van der Waals type of forces. However, it is not always possible to obtain “optically smooth” materials with polishing. Therefore, it is important to activate the bonding surfaces in order to alleviate the surface smoothness requirements. One possible way to activate the bonding surfaces is wet chemical cleaning. Standard wet chemistries used in semiconductor industry are fully applicable to wafer bonding. The basic cleaning
29.2 HYDROPHOBIC HIGH-TEMPERATURE BONDING OF SILICON In hydrophobic Si bonding, silicon is directly joined to another silicon wafer without an intermediate oxide layer, that is, not even native oxide. It has been suggested that this bonding method could replace epitaxial growth in some applications. For example, bonding of two lightly doped silicon wafers can produce abrupt and lightly doped p-n junctions that are not possible to obtain by other techniques. Hydrophobic bonding may also be used to fabricate compliant substrates for high quality heteroepitaxial
Silicon Direct Bonding Chapter | 29
(a)
(b) o o o
o o o
Si o H H o H H H o o H H H o
Si o Bonding interface
FIGURE 29.3 The reactions at the bonded interface between two hydrophilic silicon surfaces are (a) bonding via intermediate water molecules, (b) bonding between two OH groups by van der Waals forces, and (c) formation of Si O Si bonds [1]. The evolution of the bond strength as a function of the bond annealing temperature is depicted in Figure 29.4.
Si o o
Si o o
Bonding interface
H H o
593
o
(c) o o o o
o o o
Si o H o H
Si o H o H Si
Si o o o
o o
o
Surface energy (mJ/m2)
High temperature bonding 3000 2500 2000 1500 1000 500 0 0
200
400
600
800
1000
Annealing temperature (°C) FIGURE 29.4 Evolution of the bond strength as a function of annealing temperature for high-temperature bonding. The wafers were cleaned with SC1-clean prior to wafer contacting. Bond annealing time was 2 h.
growth by twist bonding. In this method a thin layer of material is transferred to a host material of the same material, by introducing a large twist angle between them [2]. As the native oxide on the silicon surface is removed by HF acid etching the free silicon surface is terminated by Si H and Si F groups. In water Si F bonds are replaced by Si OH but the majority of the surface is still covered by Si H rendering a hydrophobic surface. The hydrophobic surface is quickly contaminated with hydrocarbons; therefore, the wafers should be quickly contacted or stored in a vacuum after removal of the silicon dioxide layer [3]. Hydrophobic bonding is also more sensitive to surface roughness than the hydrophilic bonding, since there are no water molecules between the surfaces. The bonding mechanism for hydrophobic silicon surfaces that are contacted after a dilute HF dip is presented in
FIGURE 29.5 Scanning acoustic microscopy image of a wafer pair with hydrogen induced voids at the bonded interface. Both wafer surfaces had only B2 nm thick native oxide, which cannot accommodate all of the hydrogen formed during the process.
Figure 29.6. At first the HF molecules form a bridge between two silicon surfaces. At temperatures from 150 300 C, the HF molecules are rearranged and additional bonds are formed. During annealing at 300 700 C, hydrogen desorbs from the surfaces and Si Si bonds are formed according to reaction 29.3 [1]: Si 2 H 1 Si 2 H 5 Si 2 Si 1 H2
(29.3)
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(a)
(b)
Si
Si
H F F H F H
H
H
F Si Si
F H F
Si
Si
Si
2500 2000
O2-plasma, 45s RCA1 Ar-plasma, DIW rinse
1500
No activation, DIW rinse
1000 500 0
(c)
100
Si Si
Surface energy (mJ/m2)
Si Si Si
Si
Si
3000
Si Si Si Si Si Si Si Si
FIGURE 29.6 Bonding of hydrophobic silicon wafer contains three main phases that are (a) bonding via HF molecules, (b) bonding via H and F atoms with van der Waals forces, and (c) formation of Si Si bonds during high temperature annealing.
During annealing at .700 C, surface diffusion of silicon takes place and closes the microgaps between the surfaces [1]. Hydrogen formed during the bonding process may cause voids at the bonded interface if no escape route for the hydrogen gas exists.
29.3 LOW-TEMPERATURE DIRECT BONDING OF SILICON Direct wafer bonding of silicon wafers is a robust and simple method to fuse two wafers together, but it is not suitable for every application. A low-temperature bonding process may be needed if the wafers are pre-processed, contain temperature-sensitive materials or components, or have different thermal expansion coefficients. The most common methods used for low-temperature hydrophilic direct wafer bonding are based on plasma. In these methods the wafer surface or surfaces is/are activated with a short plasma treatment prior to the wafer contacting. Numerous plasma processes have been reported for bond strengthening. The most often reported plasma gases are argon, nitrogen, and oxygen. Sometimes it is advantageous to have a short wet cleaning step between activation and bonding [4]. After this, a strong bonding is achieved at low temperatures (Figure 29.7); even roomtemperature processes have been reported [5,6]. Low-temperature bonding is also possible by using surface activation methods other than plasma. Takagi et al.
200
300
400
Annealing temperature (°C) FIGURE 29.7 Bond strength as a function of annealing temperature for different bonding processes. Plasma activation time was 30 s, bonding was done in air and annealing time was set to 2 h.
[7], have reported strong bonding between silicon wafers at room temperature after surface activation with Ar ion beam. Different chemical activation methods have also been published [8], but their effectiveness is not as good as plasma activation. As the number of applications requiring low temperature bonding has increased, wafer bonder manufacturers have started to offer bonding tools that have low temperature bonding possibilities. Wafer bonding tools with integrated plasma activation are available from EVG and tools with integrated surface activation beam are sold by Mitsubishi Heavy Industries and Bondtech. Low-temperature hydrophobic wafer bonding is mainly done using ultra-high vacuum (UHV) bonding [9,10]. Other reported methods involve fabrication of an amorphous silicon layer by arsenic implantation, B2H6 or argon plasma treatment or sputter deposition [11].
29.3.1 Plasma Activation Based LowTemperature Bonding The bond-strengthening influence of short plasma activation is clear and has been reported in numerous articles. However, the mechanism behind this effect is still unclear. The final answer may not be just one effect of the plasma but a combination of many. During plasma treatment, many processes take place simultaneously. The plasma contains charged and neutral particles. The charged particles can be ionized atoms or molecules and electrons. These particles can react chemically with the wafer surface. During plasma processes a bias voltage is usually applied. This induces bombardment of the particles on the wafer surface, creating a sputtering effect. During plasma processes, UV radiation is also formed and it can have an effect on the chemistry of the wafer surface by breaking Si O and Si H bonds [12].
Silicon Direct Bonding Chapter | 29
It has been reported by Farrens et al., that the oxide layer thickness on a silicon wafer increases by 1 1.5 nm during oxygen plasma exposure. They believe that this oxide layer contains free radical ions from the plasma, which enhance the bond strength at low temperatures by increasing the atomic mobility of reacting species at the interface [6]. The plasma has also been found to create highly hydrophilic surfaces. Reiche et al. [13], have measured contact angles of below 2 between water droplet and wafer surfaces after plasma exposure. This behavior has been found to last for several days [13]. The influence of plasma exposure on the surface roughness has been reported by many research groups [4,13 15]. The data are controversial because some results show roughening [4,13] and some smoothing [14,15] of the surface. Charging of the wafer surface is also said to be the reason for higher bond energies for plasma-activated samples [6]. During plasma exposure the surface becomes charged due to implantation of the ions, ionization of the oxide and breakage of the bonds on the wafer surface, creating dangling bonds [16]. Charging of the oxide leads to electric fields, which may affect the general chemical properties of the oxide and also the ion transport [17]. The intermediate water at the bonded interface has to be removed before SiOH groups can react and form Si O Si bonds (Figure 29.3(c)). This is assumed to take place by oxygen reacting with silicon while hydrogen dissolves into the oxide. If one of the oxides is thin, the water can reach the silicon and form silicon dioxide, even at low temperature. With thick oxides, the diffusion length for water to reach the silicon is longer, which is assumed to be the reason for weaker bond strength between SiO2 SiO2 surfaces than between Si SiO2 surfaces [4]. It is suggested that the plasma increases the kinetics of water removal from the bonded interface [4,15,18]. This is considered to take place due to a porous oxide layer formed by the plasma [4,15,18]. The porosity of the layer is suggested by the increased oxide etch rate in SC-1 solution [4,15], by a higher etch rate during buried oxide etching with HF [19] and by X-ray reflectivity at the bonded interface [15]. Bond strengths as a function of annealing temperature for wafer pairs bonded with and without plasma activation are depicted in Figure 29.7.
29.3.2 UHV Low-Temperature Hydrophobic Bonding UHV bonding has also been reported as a method for making room-temperature hydrophobic bonding [9,10]. First the wafer pair is bonded in the same way as in
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hydrophobic bonding (SC-1, HF dip, wafer contacting) but no annealing is done after wafer contacting. The bonding is done at this state only to protect the surfaces during transportation to the UHV chamber. After the wafers are placed in the UHV chamber and the base pressure is pumped down to 10210 mbar, the wafers are separated. By using an elevated temperature of 450 C the hydrogen termination is removed leading to a surface with reactive dangling bonds. The wafers are cooled to room temperature and subsequently contacted in the UHV atmosphere. The measured bonding energy is close to the bond strength of the bulk silicon [9].
29.3.3 Argon Beam Activation Based Room Temperature Bonding Takagi et al. [7] have reported room temperature bonding of silicon surfaces by using argon beam activation. Wafer surfaces are bombarded with ion or neutralized argon beam that sputter-etches the surface. The activation removes contaminants and absorbed molecules from the surface, leaving dangling bonds to the topmost atoms. In Takagi’s experiments, such surfaces form a strong bond with bond strength close to the bulk strength of silicon even at room temperature.
29.3.4 Reconstruction of Silicon Surfaces by Hydrogen Treatment for Low Temperature Hydrophobic Bonding C. Rauer et al. [20] have reported hydrophobic bonding, where the silicon surfaces have been treated with high temperature hydrogen processes to form Si(100) 2 2 3 1: H reconstructed surface. Hydrogen treatment prior to the wafer contacting, resulted in significantly higher bond strength than when a hydrophobic surface is made by using hydrofluoric acid. In their research they have first removed native oxide with HF and then have grown thin oxide to the wafer surface by using ozone. After this the wafers go through the first H2 annealing at 1100 C, where a thin layer of silicon is then deposited on the surface, and this layer is then reconstructed by carrying out a second H2 annealing step at 950 C. The reconstructioning process was carried out in a reduced pressure chemical vapor deposition (RPCVD) chamber. The wafers are bonded at room temperature. Samples that were not annealed had 15 times higher bond strength than reference samples made with HF dip. Bond strength of 1 J/m2 was reached after annealing at 300 C for 2 h, whereas HF terminated sample required 600 C to reach the same bond strength [20].
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29.3.5 Hydrophilic Silicon Direct Bonding with Ultraviolet Ozone Activation J. Fan et al. [21] have reported low temperature bonding by activating surfaces using ultraviolet light in combination with ozone. This treatment efficiently removes hydrocarbons from the wafer surface and an ultra clean wafer surface is formed. The activation process resulted ˚ RMS to 1 1.5 A ˚ in surface smoothening from 2.5 A RMS. The hydrophilicity of the surface is also increased, as contact angles ,7 have been measured. After bonding and annealing the wafer pairs at 200 C for 3 h, surface energies above 2500 mJ/m2 were measured for activated samples, compared with a surface energy of 135 mJ/m2 measured for a non-activated wafer pair [21].
29.4 DIRECT BONDING OF CVD OXIDES Thermally grown oxides on prime polished silicon wafer surface can be bonded without further treatments. However, it is possible to use CVD oxides to replace the thermal oxide. This is usually done to avoid the high temperatures needed for thermal oxidation ( . 800 C). The deposition temperatures for CVD oxides vary from 150 C to 500 C and therefore the process may be used on wafers containing temperature sensitive devices. Also, the deposition rate is fast compared to thermal oxidation and the process is not self-limiting. CVD SiO2 can also be grown on non-silicon materials and used as an intermediate bonding layer between different wafer materials. However, the CVD oxides also have some drawbacks compared to thermally grown oxide. The thickness uniformity is not in the same level with thermal oxide and the as-deposited oxide surface is usually too rough for direct (a)
bonding and requires a pre-bonding polishing step (Figure 29.8). Electrical and physical properties are also inferior to thermal oxides. In MEMS applications the CVD oxides can be used to planarize the surface before bonding. The steps on the surface of a MEMS wafer can be filled with CVD oxide and then CMP can be used to planarize and polish the surface for bonding [22]. The CVD oxides do not have the stoichiometric composition like thermal oxide and they contain impurities like Si H and Si OH [1]. These impurities have a tendency to outgas from the oxide when the deposition temperature is exceeded (Figure 29.9). Therefore, the bond annealing has to be lower than the deposition temperature or the CVD oxide needs to be heat treated before bonding to avoid bubble formation at the bonding interface (Figure 29.10).
29.5 DIRECT BONDING OF CVD SILICON CVD polysilicon layers are commonly used in MEMS applications. If polysilicon forms the surface layer on the silicon wafer, the encapsulation (bonding to glass) is usually carried out by anodic bonding, which is not as sensitive to surface roughness as direct bonding. However, in some applications, it would be desirable to use direct bonding of polysilicon. After deposition the surface of the CVD polysilicon layer is too rough for direct bonding. The surface roughness depends on the used deposition method and the thickness of the polysilicon film, for example, with thick atmospheric pressure chemical vapor deposited (APCVD) films the roughness peak to peak value can be a couple of microns [23]. These layers require CMP processes with high removal to achieve a bondable surface. Usually the CMP
(b)
Image statistics Img. Z range Img. Mean Img. Raw mean Img. Rms (Rq) Img. Ra
Image statistics Img. Z range Img. Mean Img. Raw mean Img. Rms (Rq) Img. Ra
26.533 nm 0.000001 nm 21.323 nm 3.323 nm 2.649 nm
1.294 nm –0.000003 nm 0.453 nm 0.126 nm 0.099 nm
1
1
2
2
X 1.000 µm/div µM
Z 20.000 nm/div
X 1.000 µm/div µM
FIGURE 29.8 (a) AFM image of as-grown LPCVD oxide; and (b) AFM image of polished LPCVD oxide surface.
Z 20.000 nm/div
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FIGURE 29.9 Scanning acoustic microscope image of silicon to PECVD oxide wafer pair after annealing at (a) 400 C and (b) 600 C for 2 h.
FIGURE 29.10 Scanning acoustic microscope image of Si to PECVD oxide wafer pair after annealing at 1100 C for 2 h. PECVD oxide was pre-annealed before bonding at 1000 C for 2 h.
process has two steps, one step to “planarize” the surface and a second one to smooth it. With the two step process ˚ the polysilicon surface can be smoothed to a level of 3 A RMS [23]. There is also the possibility to bond deposited silicon layer when it is in a near amorphous state and then crystallize it with high-temperature annealing after bonding. Amorphous CVD silicon has a much lower surface roughness (1 2 nm RMS) than polycrystalline silicon and it is
FIGURE 29.11 Scanning acoustic microscope image of polysilicon to thermal oxide wafer pair made by bonding the silicon film in amorphous state and then crystallizing it during bond annealing at 1100 C for 2 h.
much easier to polish. With CMP removal of only ˚ B50 nm the surface roughness can be reduced to B1 A RMS. The amorphous silicon layer can then be bonded to an oxidized silicon wafer and during high-temperature bond annealing at 1100 C the amorphous silicon layer crystallizes into polycrystalline form. The crystallization does not cause voids to the bonded interface (Figure 29.11). The problem is the low deposition rate of amorphous films (only some nm/min).
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