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Silicon on an insulator produced by helium implantation and oxidation
Nuclear
2s
Instruments
and Methods
in Physics Research
B 106 (1995) 415-418 k!lW
%$B
Beam Interactions with Materials&Atoms
!!kI ELSEVIER
Silicon on an insulator produced by helium implantation and oxidation Vito Raineri a, Salvatore Ugo Camp&an0 b-* ‘CNR-IMETEM, Stradale Prirnosole 50, l-95121 Catania, Italy bDipartimento di Fisica, Corso Italia 57, I-95129 Catania, Italy
Abstract A method to produce high-quality low-cost silicon on an insulator is presented. It is based on high-dose helium implantation to form bubbles which evolve by thermal processes in a continuous buried void layer. This layer is therefore oxidised in dry 0, while oxygen flows in the network through trenches etched deeper than the void layer. By this method defect-free silicon single crystal layers have been obtained. The criteria to produce a void network are discussed considering the helium-implanted ion dose, energy and the subsequent thermal processes. Oxidation in dry 0, at different temperatures and for different times has been investigated and transmission electron microscopy on cross sectional samples has been used to characterise the quality of the buried oxide layers.
1. Introduction The fabrication of semiconductor devices onto thin layers of insulating material is an attractive goal since it allows a better radiation resistance and a lesser power dissipation of an equivalent device built onto a bulk wafer. Many efforts have been made to obtain thin silicon single crystal layers on insulating substrates: some of them resulted in the production of materials already commercially available while some of them are still at a laboratory stage. Among the materials commercially available, silicon on sapphire (SOS), bonded wafers and wafers prepared by the SIMOX (separation by implanted oxide) method are very well known [l]. However, SOS suffers from the high cost of the sapphire single crystal substrates and SIMOX wafers are still far from the purity and crystalline perfection requirements of VLSI technology. Bonded wafers seem the most promising approach. However, the’uniformity of the bonding on large area wafers is still one of the major problems 121. Among the methods still at a laboratory stage it is worth mentioning laser induced graphoepitaxy of strips deposited onto patterned oxide and growth of thin silicon layers onto porous silicon surfaces and subsequent oxidation of the resulting buried porous silicon layer [3]. In this paper we will show that it is possible to obtain high-quality thin single crystal layers on silicon
dioxide by high-dose helium implantation at room temperature, trench formation and oxidation. We will demonstrate that the proposed method is simple, reliable and, due to its simplicity, of reduced cost.
2. Experimental Silicon wafers, 12.5 cm in diameter, have been implanted by helium ions of 40 or 300 keV energy and up to fluences of 10” ions/cm’. The orientation and doping of the wafer do not influence the processes shown here and different results will not be discriminated. After implantation a trench structure was produced on the wafer surface by a suitable mask deposition and reactive ion etching. The depth of the obtained trench must be larger than the ion projected range. The wafers were then introduced in an oxidation furnace and oxygen gas was allowed to flow for more than 10 min before attempting any thermal process. Oxidation was obtained by raising the temperature to 1000°C for a time up to 5 min. Transmission electron microscopy (IEM) has been extensively used to determine the microstructure of the helium implanted region, the thickness and uniformity of the oxide and the quality of the crystalline silicon surface layer.
3. Results and discussion l
Corresponding author. Tel. + 39 95 591912, fax + 39 95
7139154. 0168-583X/95/%09.50
0 1995 Elsevier
SSDI 0168-583X(95)00743-1
Science
B.V. All rights
High-dose ion implantation of insoluble atoms in silicon causes the formation of small bubbles due to reserved
IV. SEMICONDUCTOR PROCESSING
416
V. Raineri. S.U. Campisano / Nucl. Instr. and Meth. in Phys. Res. B 106 (1995) 415-418
interaction of the implanted species with defects [4]. In the case of helium it has been shown that a minimum concentration of 3.5 x 10’” cmm3 is required to form these bubbles [5]. Thermal processing at temperatures of the order of 7Oo”C-1000°C causes helium out-diffusion and the evolution of these bubbles into empty cavities [6]. The size of these cavities and their depth distribution has been detailed. In any case thermal processing at temperatures in the range 800°C1200°C produces a band of cavities located at a depth centred around the ion projected range and whose width depends on the annealing temperature [5]. An example of such a layer is reported in Fig. 1 where the TFM micrograph of a cross sectioned sample, implanted by 40 keV He to a fluence of 5 x 10’” cm-’ and annealed for 15 min at lOOo”C, is shown. As it appears the processing produces a well-defined band of cavities while the overlaying single crystal layer is practically free of defects, even when observed under higher magnification. The reported structure resembles very much that obtained after the formation of a porous silicon (PS) layer and a chemical vapour deposition (CVD) of a single crystal layer. This similarity has suggested us to verify the possibility to obtain a silicon on insulator structure. It must be remarked that there are some significant differences between the present method and
the porous silicon followed by the CVD deposition method. First of all in our process there is no use of wet chemicals, therefore a much cleaner material is obtained. Second the CVD growth over the small protuberances of the porous layer causes the formation of defects at the coalescence of portions growing on different islands of the PS structure. Helium being a light ion, very few defects are generated in the near-surface region and these defects are mainly point defects, a moderate temperature annealing will cause the recombination of the few defects and a near-perfect crystal is left in the surface region. In order to form a buried oxide layer at the depth of the cavities layer we have to allow oxygen atoms to reach this depth. For this reason we realised a trench structure by photolithographically engraving a surface pattern, protecting part of the surface by deposited oxide and using reactive ion etching. Care was paid to the fact that the depth of the trench has to be larger than the depth of the cavities layer in order to allow oxygen to reach it. At present we have investigated the process for silicon islands of 2 pm width and with no limitation in length. Further work is in progress to ascertain if there is any width limitation. The wafer was then placed in a rapid thermal oxidation system and letting oxygen flowing for several minutes before the temperature ramps up. The process, if
Fig. 1. TEM cross section analyses of a sample implanted with 40 keV He at a dose of 1 X 10”/cmL and annealed at 1000°Cfor 1 h.
V. Ruineri, S. U. Campisano / Nucl. Insir. and Meth. in Phys. Res. B 106 (I 995) 415- 418
Fig. 2. A trench structure used to form the buried oxide layer. After a He implantation at 40 keV 1 x 10”/cmZ a thermal Pr’xess at 10007Z for 5 min was performed, followed by oxidation at 1100°C for 15 min in 0, which forms the buried oxide layer. done under the correct conditions, produces high-quality structures as shown by the TEM micrographs reported in Fig. 2. As it appears, the silicon single crystal layer at the surface is practically defect free and the buried oxide layer is continuous and no defects have been detected. Several results such as that reported in Fig. 2 have been obtained as it concerns uniformity of the buried oxide layer; however, the quality of the oxide layer is strongly dependent on the microstructure of the cavities layer. We have found that the optimum condition for the formation of a continuous buried oxide layer corresponds to a cavity layer on which about 30% of the volume is empty. The volume fraction occupied by cavities in the layer is a function of the helium ion dose and of the processing temperature and time. It was calculated by considering the void density and diameter as obtained by cross sections and plan view TEM analyses on implanted and annealed samples. In Fig. 3 the empty volume fraction is reported in percent as a function of the annealing temperature for two different implanted energies. The empty volume changes because of the variation of the density and the void diameter [Sl. During annealing at temperatures higher than 1000°C voids move and, as a result of inelastic interactions, they coalesce. A consequence is that their density decreases while their diameter increases in such a way that the percentage of empty volume changes as reported in Fig. 3.
4. Conclusions High-quality low-cost silicon on an insulator can be produced by oxidation of buried layers of a void network produced by ion implantation of helium ions. The process presented here is simple and does not intro-
duce contamination in silicon because helium evaporates, thus leaving only empty void in silicon. Oxygen can flow through the void network if the trenches are realised deeper than the void layer and if their density is such that they superimpose. We have been able to determine the empty volume fraction for different im-
I
.
I
.
I
I
Q
D 40 keV 1x10i7/cm2 b
300
-
I
l
keV 2x10’7/cm2 a
A A A
800
900
1999
:1100
1299
Temperature (OC) Fig. 3. The empty volume in percent calculated near the projected range region. Here it is reported for different implant conditions as a function of the thermal process. IV. SEMICONDUCTOR
PROCESSING
418
V. Raineri, S. U. Campisano / Nucl. Instr. and Meth. in Phys. Rex 3 106 (1995) 415- 118
plantation and annealing conditions, observing that only when it reaches at least the 30% value a continuous oxide layer can be formed. The empty volume is related to the thermal processes performed on the sample which determine the void evolution and in particular the void density and diameter.
[2] T. Hiramoto,
[3]
[4] [5]
References [6] [l] B. Jayant Baliga ted.), Epitaxial (Academic, London, 1986).
Silicon Technology,
N. Tamba, M. Yoshida, T. Hashimoto, T. Fujiwara, K. Watanabe, M. Odaka, M. Usami and T. Ikeda, Proc. IEDM (1992) pp. 39-42. E.1. Givargizov, Artificial epitaxy (graphoepitaxy), in: Thin Films and Epitaxy, ed. D.T.J. Hurle (Elsevier, Amsterdam, 1994) p. 941. J. Kelly and R. Car, Phys. Rev. B 45 (1992) 6543. V. Raineri, P.G. Fallica, G. Percolla, A. Battaglia, M. Barbagallo and S.U. Campisano, Gettering of metals by voids in silicon, J. Appl. Phys., submitted. A. Alatolo, M.J. Puska and R.M. Nieminem, Phys. Rev. B 46 (1992) 12806.
2s
Instruments
and Methods
in Physics Research
B 106 (1995) 415-418 k!lW
%$B
Beam Interactions with Materials&Atoms
!!kI ELSEVIER
Silicon on an insulator produced by helium implantation and oxidation Vito Raineri a, Salvatore Ugo Camp&an0 b-* ‘CNR-IMETEM, Stradale Prirnosole 50, l-95121 Catania, Italy bDipartimento di Fisica, Corso Italia 57, I-95129 Catania, Italy
Abstract A method to produce high-quality low-cost silicon on an insulator is presented. It is based on high-dose helium implantation to form bubbles which evolve by thermal processes in a continuous buried void layer. This layer is therefore oxidised in dry 0, while oxygen flows in the network through trenches etched deeper than the void layer. By this method defect-free silicon single crystal layers have been obtained. The criteria to produce a void network are discussed considering the helium-implanted ion dose, energy and the subsequent thermal processes. Oxidation in dry 0, at different temperatures and for different times has been investigated and transmission electron microscopy on cross sectional samples has been used to characterise the quality of the buried oxide layers.
1. Introduction The fabrication of semiconductor devices onto thin layers of insulating material is an attractive goal since it allows a better radiation resistance and a lesser power dissipation of an equivalent device built onto a bulk wafer. Many efforts have been made to obtain thin silicon single crystal layers on insulating substrates: some of them resulted in the production of materials already commercially available while some of them are still at a laboratory stage. Among the materials commercially available, silicon on sapphire (SOS), bonded wafers and wafers prepared by the SIMOX (separation by implanted oxide) method are very well known [l]. However, SOS suffers from the high cost of the sapphire single crystal substrates and SIMOX wafers are still far from the purity and crystalline perfection requirements of VLSI technology. Bonded wafers seem the most promising approach. However, the’uniformity of the bonding on large area wafers is still one of the major problems 121. Among the methods still at a laboratory stage it is worth mentioning laser induced graphoepitaxy of strips deposited onto patterned oxide and growth of thin silicon layers onto porous silicon surfaces and subsequent oxidation of the resulting buried porous silicon layer [3]. In this paper we will show that it is possible to obtain high-quality thin single crystal layers on silicon
dioxide by high-dose helium implantation at room temperature, trench formation and oxidation. We will demonstrate that the proposed method is simple, reliable and, due to its simplicity, of reduced cost.
2. Experimental Silicon wafers, 12.5 cm in diameter, have been implanted by helium ions of 40 or 300 keV energy and up to fluences of 10” ions/cm’. The orientation and doping of the wafer do not influence the processes shown here and different results will not be discriminated. After implantation a trench structure was produced on the wafer surface by a suitable mask deposition and reactive ion etching. The depth of the obtained trench must be larger than the ion projected range. The wafers were then introduced in an oxidation furnace and oxygen gas was allowed to flow for more than 10 min before attempting any thermal process. Oxidation was obtained by raising the temperature to 1000°C for a time up to 5 min. Transmission electron microscopy (IEM) has been extensively used to determine the microstructure of the helium implanted region, the thickness and uniformity of the oxide and the quality of the crystalline silicon surface layer.
3. Results and discussion l
Corresponding author. Tel. + 39 95 591912, fax + 39 95
7139154. 0168-583X/95/%09.50
0 1995 Elsevier
SSDI 0168-583X(95)00743-1
Science
B.V. All rights
High-dose ion implantation of insoluble atoms in silicon causes the formation of small bubbles due to reserved
IV. SEMICONDUCTOR PROCESSING
416
V. Raineri. S.U. Campisano / Nucl. Instr. and Meth. in Phys. Res. B 106 (1995) 415-418
interaction of the implanted species with defects [4]. In the case of helium it has been shown that a minimum concentration of 3.5 x 10’” cmm3 is required to form these bubbles [5]. Thermal processing at temperatures of the order of 7Oo”C-1000°C causes helium out-diffusion and the evolution of these bubbles into empty cavities [6]. The size of these cavities and their depth distribution has been detailed. In any case thermal processing at temperatures in the range 800°C1200°C produces a band of cavities located at a depth centred around the ion projected range and whose width depends on the annealing temperature [5]. An example of such a layer is reported in Fig. 1 where the TFM micrograph of a cross sectioned sample, implanted by 40 keV He to a fluence of 5 x 10’” cm-’ and annealed for 15 min at lOOo”C, is shown. As it appears the processing produces a well-defined band of cavities while the overlaying single crystal layer is practically free of defects, even when observed under higher magnification. The reported structure resembles very much that obtained after the formation of a porous silicon (PS) layer and a chemical vapour deposition (CVD) of a single crystal layer. This similarity has suggested us to verify the possibility to obtain a silicon on insulator structure. It must be remarked that there are some significant differences between the present method and
the porous silicon followed by the CVD deposition method. First of all in our process there is no use of wet chemicals, therefore a much cleaner material is obtained. Second the CVD growth over the small protuberances of the porous layer causes the formation of defects at the coalescence of portions growing on different islands of the PS structure. Helium being a light ion, very few defects are generated in the near-surface region and these defects are mainly point defects, a moderate temperature annealing will cause the recombination of the few defects and a near-perfect crystal is left in the surface region. In order to form a buried oxide layer at the depth of the cavities layer we have to allow oxygen atoms to reach this depth. For this reason we realised a trench structure by photolithographically engraving a surface pattern, protecting part of the surface by deposited oxide and using reactive ion etching. Care was paid to the fact that the depth of the trench has to be larger than the depth of the cavities layer in order to allow oxygen to reach it. At present we have investigated the process for silicon islands of 2 pm width and with no limitation in length. Further work is in progress to ascertain if there is any width limitation. The wafer was then placed in a rapid thermal oxidation system and letting oxygen flowing for several minutes before the temperature ramps up. The process, if
Fig. 1. TEM cross section analyses of a sample implanted with 40 keV He at a dose of 1 X 10”/cmL and annealed at 1000°Cfor 1 h.
V. Ruineri, S. U. Campisano / Nucl. Insir. and Meth. in Phys. Res. B 106 (I 995) 415- 418
Fig. 2. A trench structure used to form the buried oxide layer. After a He implantation at 40 keV 1 x 10”/cmZ a thermal Pr’xess at 10007Z for 5 min was performed, followed by oxidation at 1100°C for 15 min in 0, which forms the buried oxide layer. done under the correct conditions, produces high-quality structures as shown by the TEM micrographs reported in Fig. 2. As it appears, the silicon single crystal layer at the surface is practically defect free and the buried oxide layer is continuous and no defects have been detected. Several results such as that reported in Fig. 2 have been obtained as it concerns uniformity of the buried oxide layer; however, the quality of the oxide layer is strongly dependent on the microstructure of the cavities layer. We have found that the optimum condition for the formation of a continuous buried oxide layer corresponds to a cavity layer on which about 30% of the volume is empty. The volume fraction occupied by cavities in the layer is a function of the helium ion dose and of the processing temperature and time. It was calculated by considering the void density and diameter as obtained by cross sections and plan view TEM analyses on implanted and annealed samples. In Fig. 3 the empty volume fraction is reported in percent as a function of the annealing temperature for two different implanted energies. The empty volume changes because of the variation of the density and the void diameter [Sl. During annealing at temperatures higher than 1000°C voids move and, as a result of inelastic interactions, they coalesce. A consequence is that their density decreases while their diameter increases in such a way that the percentage of empty volume changes as reported in Fig. 3.
4. Conclusions High-quality low-cost silicon on an insulator can be produced by oxidation of buried layers of a void network produced by ion implantation of helium ions. The process presented here is simple and does not intro-
duce contamination in silicon because helium evaporates, thus leaving only empty void in silicon. Oxygen can flow through the void network if the trenches are realised deeper than the void layer and if their density is such that they superimpose. We have been able to determine the empty volume fraction for different im-
I
.
I
.
I
I
Q
D 40 keV 1x10i7/cm2 b
300
-
I
l
keV 2x10’7/cm2 a
A A A
800
900
1999
:1100
1299
Temperature (OC) Fig. 3. The empty volume in percent calculated near the projected range region. Here it is reported for different implant conditions as a function of the thermal process. IV. SEMICONDUCTOR
PROCESSING
418
V. Raineri, S. U. Campisano / Nucl. Instr. and Meth. in Phys. Rex 3 106 (1995) 415- 118
plantation and annealing conditions, observing that only when it reaches at least the 30% value a continuous oxide layer can be formed. The empty volume is related to the thermal processes performed on the sample which determine the void evolution and in particular the void density and diameter.
[2] T. Hiramoto,
[3]
[4] [5]
References [6] [l] B. Jayant Baliga ted.), Epitaxial (Academic, London, 1986).
Silicon Technology,
N. Tamba, M. Yoshida, T. Hashimoto, T. Fujiwara, K. Watanabe, M. Odaka, M. Usami and T. Ikeda, Proc. IEDM (1992) pp. 39-42. E.1. Givargizov, Artificial epitaxy (graphoepitaxy), in: Thin Films and Epitaxy, ed. D.T.J. Hurle (Elsevier, Amsterdam, 1994) p. 941. J. Kelly and R. Car, Phys. Rev. B 45 (1992) 6543. V. Raineri, P.G. Fallica, G. Percolla, A. Battaglia, M. Barbagallo and S.U. Campisano, Gettering of metals by voids in silicon, J. Appl. Phys., submitted. A. Alatolo, M.J. Puska and R.M. Nieminem, Phys. Rev. B 46 (1992) 12806.