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Simple fabrication process of high-density field emission arrays
surface science ELSEVIER
Applied Surface Science 111 (1997) 224-227
Simple fabrication process of high-density field emission arrays Z. Borkowicz *, W. Czarczynski Institute of Electron Technology, Technical University, ul. Zygmunta Janiszewskiego 11/17, 50-372 Wroclaw, Poland Received 10 June 1996; revised 28 July 1996; accepted 23 August 1996
Abstract A simple method using a lithography process for the manufacturing of arrays of high density field emitters is described. SiO 2 is formed on the Si suhstrate, and covered with a metal layer and resist film. The lithography of the ring-shaped patterns and etching them in the metal layer is followed by the electrochemical process in order to increase the metal layer thickness. The insulated dots in the centre of the exposed and the etched rings remain not thickened. This procedure together with ion etching leads to the formation of emitter tips in the Si substrate. The RIE etching allows for precise control of the cone tip radius. Silicon emitters with density of 104 tips/mm 2 have already been obtained. This production method may be used for production of metal emitters as well.
1. Introduction Gated field-emission structures are the promising new electron sources and their development started the new field of technology - the vacuum microelectronics [1,2]. Since Spindt has developed his elegant method of the metal field emitter array manufacturing [3], a number of papers on this subject appeared, some of them concerning silicon as emitter material [4-7]. Many perspective applications require the coupling of the field emitting devices with IC circuitry and the use of silicon technology for the fabrication of these devices has the advantage of compatibility with the microelectronic manufacturing [8]. Therefore, numerous works are devoted to the search for a good manufacturing process. In this work an idea is presented of a simple production technique of the gated silicon field-emis-
* Corresponding author. Tel.: +48-71-202572; fax: +48-71213504.
sion cathode arrays for vacuum microelectronics and electron beam applications.
2. Fabrication procedure The p-silicon substrate with 5 1~ cm resistivity was covered with a thermally grown 1 p~m thick silicon dioxide. A ! /zm thick copper layer was magnetron sputter deposited on the oxide. This metal layer was covered with the AZ1350J photoresist (Fig. la). A set of arrays of ring-shaped patterns was UV exposed and developed in the resist layer (Fig. lb). The mask for the UV was made using the electron lithography. The uncovered metal layer was etched by ion milling and the resist was then removed (Fig. l c). The metal layer was electrochemically covered with Ni to 1.2 # m . The metal spots inside the etched rings were electrically insulated and did not take part in this electrochemical process. There was a substantial difference in the etch rates
0169-4332/97/$17.00 Copyright © 1997 Published by Elsevier Science B.V. All rights reserved. PII S 0 1 6 9 - 4 3 3 2 ( 9 6 ) 0 0 7 2 0 - 9
225
Z. Borkowicz, W. Czarczynski /Applied Surface Science 111 (1997) 224-227
~ o)
resusi~ C
Si02 Si
e)
.
.
.
.
1o~,,m
_
_
.j
Fig. 2. Dimensions of the emitter mask.
o) emitter mask are shown in Fig. 2. The S E M micrographs of the array and tips are shown in Fig. 3. These fine tips caused some trouble w h e n observed in the scanning electron microscope. They were Fig. 1. Process sequence for silicon field-emission gated array; (a) silicon substrate covered with SiO, layer, Cu film and photoresist; (b) mask pattern is exposed and developed; (c) mask pattern is transferred to Cu layer by ion milling; (d) resist is removed and the Ni layer is electrochemically deposited on Cu; the inner metal spot does not take part in the deposition being electrically insulated; (e) metal layer is now used as the mask in RIE etching; (f), (h) subsequent steps of emitter shaping; the inner metal dot and the SiO~ underneath define the emitter tip and disappear.
between the central spots and the rest of metal layer (Fig. ld). Now the metal pattern was used as the mask in the emitter tip formation using anisotropic RIE etching in S F 6 / A r plasma. The etching was carried out on the graphite electrode. The inner metal disc and the silicon dioxide layer underneath constituted a m a s k suitable for the emitter tip formation leaving a clear and sharp emitter (Fig. l e - h ) . The metal mask was etched together with the rest of the surface but due to its higher etch rate disappeared as well as the silicon dioxide, whereas the Ni covered metal layer was still of substantial thickness.
3. Experimental
results
The emitter array d i m e n s i o n s were 1 × 2 m m and the packing density was 1 X 10 4 t i p s / r a m z. The array pitch was 10 /~m. The d i m e n s i o n s of single
Fig. 3. SEM micrographs of the emitter array manufactured according to Fig. 1: (a) array of emitters; (b) single tip with curvature radius 15 nm.
Z. Borkowicz, W. Czarczynski / Applied Surface Science 111 (1997) 224-227
226
of average single tip current. The starting voltage was 30 V approximately. The I - V characteristic of the array is shown in Fig. 4 and the FowlerNordheim plot is revealed in Fig. 5. A relatively low starting voltage is probably due to the very fine emitter tip curvature radii of about 15 nm because the gate (or extracting electrode) diameter openings were about 5 /~m. The tested samples were destroyed during the electrical tests due to the overheating of emitters and the current reported here was the largest stable one.
I 0 -'~
10-' /,,,A
10-~ 10 -~ 10 -7
1 0 -a
4. Conclusions
10 -9 i
,
,
i
i
o
i
50
i
,
f
V~, v
,
~oo
Fig. 4. Measured collector current versus gate (extracting electrode) voltage. The collector voltage is 200 V.
melted and evaporated when examined without proper care. The tested structures were placed in a vacuum vessel pumped with a standard oil diffusion pump providing the pressure 1.3 × 10 -4 Pa. No bakeout prior to the voltage application was made, as recommended by some authors [9,10]. The distance between gate and collector was 2 mm. The emittercollector voltage was 200 V. The maximum stable emission current measured from a 2 mm 2 array was 1 mA. This means a 50 nA
-7 -8
)og[~
A simple and relatively inexpensive method of field emitter array has been developed and tested. Some of the here described procedures were forced by the available equipment and materials. The basic idea of the emitter array manufacturing is the use of electrochemical process to obtain different etch rates for the specified parts of the etched pattern. The manufactured array described here consisted of the round silicon emitting tips. However, there is no reason, why the same techniques could not be applied to the knife-edge emitters.
Acknowledgements The authors would like to thank Dr. Ivo Rangelow of the Kassel University for the SEM micrographs and Dr. Peter Hudek of the Slovak Academy of Sciences for the mask preparation. The work was supported by the Scientific Research Committee under grant No. 8 S 501 014 06.
-9
References
-10 -11 -12 '
I
.
.
.
.
2 5 x 1 0 -~
I
5 0 x 1 0 -~
1/'Ve, v"' Fig. 5. Fowler- - Nordheim plot of the array.
[1] T. Utsumi, IEEE Trans. Electron Dev. 38 (1991) 2276. [2] K. Yokoo, Proc. XXV European Microwave Conf. EUMC'95, 1995, p. 1275. [3] C.A. Spindt, 1. Brodie, L. Humphrey and E.R. Westerberg, J. Appl. Phys. 47 (1976) 5248. [4] J.T. Trujillo and C.E. Hunt, J. Vac. Sci. Technol. B 11 (1993) 437. [5] J.P. Spallas, J.H. Das and N.C. MacDonald, J. Vac. Sci. Technol. B 11 (1993) 454.
Z. Borkowicz, W. Czarczynski / Applied Surface Science 111 (1997) 224-227 [6] Bo Lee, E.F. Barrasch, T. Mazumdar, P.M. Mclntyre, Y. Pang and H.J. Trost. Appl. Surf. Sci. 67 (1993) 66. [7] G.N.A. van Veen, B. Theunissen, K. van de Heuvel, R. Home and A.L.L Burgmans, J. Vac. Sci. Technol. B 13 (1995) 478. [8] K. Yokoo, M. Arai, M. Mori, J. Bae and S. Ono, J. Vac. Sci. Technol. B 13 (1995) 491.
227
[9] J.D. Levine, R. Meyer, R. Baptist, T.E. Felter and A.A. Talin, J. Vac. Sci. Technol. B 13 (1995) 474. [10] H.H. Busta, B.J. Zimmerman, M.C. Tringides and C.A. Spindt, IEEE Trans. Electron Dev. 38 (1991) 2558.
Applied Surface Science 111 (1997) 224-227
Simple fabrication process of high-density field emission arrays Z. Borkowicz *, W. Czarczynski Institute of Electron Technology, Technical University, ul. Zygmunta Janiszewskiego 11/17, 50-372 Wroclaw, Poland Received 10 June 1996; revised 28 July 1996; accepted 23 August 1996
Abstract A simple method using a lithography process for the manufacturing of arrays of high density field emitters is described. SiO 2 is formed on the Si suhstrate, and covered with a metal layer and resist film. The lithography of the ring-shaped patterns and etching them in the metal layer is followed by the electrochemical process in order to increase the metal layer thickness. The insulated dots in the centre of the exposed and the etched rings remain not thickened. This procedure together with ion etching leads to the formation of emitter tips in the Si substrate. The RIE etching allows for precise control of the cone tip radius. Silicon emitters with density of 104 tips/mm 2 have already been obtained. This production method may be used for production of metal emitters as well.
1. Introduction Gated field-emission structures are the promising new electron sources and their development started the new field of technology - the vacuum microelectronics [1,2]. Since Spindt has developed his elegant method of the metal field emitter array manufacturing [3], a number of papers on this subject appeared, some of them concerning silicon as emitter material [4-7]. Many perspective applications require the coupling of the field emitting devices with IC circuitry and the use of silicon technology for the fabrication of these devices has the advantage of compatibility with the microelectronic manufacturing [8]. Therefore, numerous works are devoted to the search for a good manufacturing process. In this work an idea is presented of a simple production technique of the gated silicon field-emis-
* Corresponding author. Tel.: +48-71-202572; fax: +48-71213504.
sion cathode arrays for vacuum microelectronics and electron beam applications.
2. Fabrication procedure The p-silicon substrate with 5 1~ cm resistivity was covered with a thermally grown 1 p~m thick silicon dioxide. A ! /zm thick copper layer was magnetron sputter deposited on the oxide. This metal layer was covered with the AZ1350J photoresist (Fig. la). A set of arrays of ring-shaped patterns was UV exposed and developed in the resist layer (Fig. lb). The mask for the UV was made using the electron lithography. The uncovered metal layer was etched by ion milling and the resist was then removed (Fig. l c). The metal layer was electrochemically covered with Ni to 1.2 # m . The metal spots inside the etched rings were electrically insulated and did not take part in this electrochemical process. There was a substantial difference in the etch rates
0169-4332/97/$17.00 Copyright © 1997 Published by Elsevier Science B.V. All rights reserved. PII S 0 1 6 9 - 4 3 3 2 ( 9 6 ) 0 0 7 2 0 - 9
225
Z. Borkowicz, W. Czarczynski /Applied Surface Science 111 (1997) 224-227
~ o)
resusi~ C
Si02 Si
e)
.
.
.
.
1o~,,m
_
_
.j
Fig. 2. Dimensions of the emitter mask.
o) emitter mask are shown in Fig. 2. The S E M micrographs of the array and tips are shown in Fig. 3. These fine tips caused some trouble w h e n observed in the scanning electron microscope. They were Fig. 1. Process sequence for silicon field-emission gated array; (a) silicon substrate covered with SiO, layer, Cu film and photoresist; (b) mask pattern is exposed and developed; (c) mask pattern is transferred to Cu layer by ion milling; (d) resist is removed and the Ni layer is electrochemically deposited on Cu; the inner metal spot does not take part in the deposition being electrically insulated; (e) metal layer is now used as the mask in RIE etching; (f), (h) subsequent steps of emitter shaping; the inner metal dot and the SiO~ underneath define the emitter tip and disappear.
between the central spots and the rest of metal layer (Fig. ld). Now the metal pattern was used as the mask in the emitter tip formation using anisotropic RIE etching in S F 6 / A r plasma. The etching was carried out on the graphite electrode. The inner metal disc and the silicon dioxide layer underneath constituted a m a s k suitable for the emitter tip formation leaving a clear and sharp emitter (Fig. l e - h ) . The metal mask was etched together with the rest of the surface but due to its higher etch rate disappeared as well as the silicon dioxide, whereas the Ni covered metal layer was still of substantial thickness.
3. Experimental
results
The emitter array d i m e n s i o n s were 1 × 2 m m and the packing density was 1 X 10 4 t i p s / r a m z. The array pitch was 10 /~m. The d i m e n s i o n s of single
Fig. 3. SEM micrographs of the emitter array manufactured according to Fig. 1: (a) array of emitters; (b) single tip with curvature radius 15 nm.
Z. Borkowicz, W. Czarczynski / Applied Surface Science 111 (1997) 224-227
226
of average single tip current. The starting voltage was 30 V approximately. The I - V characteristic of the array is shown in Fig. 4 and the FowlerNordheim plot is revealed in Fig. 5. A relatively low starting voltage is probably due to the very fine emitter tip curvature radii of about 15 nm because the gate (or extracting electrode) diameter openings were about 5 /~m. The tested samples were destroyed during the electrical tests due to the overheating of emitters and the current reported here was the largest stable one.
I 0 -'~
10-' /,,,A
10-~ 10 -~ 10 -7
1 0 -a
4. Conclusions
10 -9 i
,
,
i
i
o
i
50
i
,
f
V~, v
,
~oo
Fig. 4. Measured collector current versus gate (extracting electrode) voltage. The collector voltage is 200 V.
melted and evaporated when examined without proper care. The tested structures were placed in a vacuum vessel pumped with a standard oil diffusion pump providing the pressure 1.3 × 10 -4 Pa. No bakeout prior to the voltage application was made, as recommended by some authors [9,10]. The distance between gate and collector was 2 mm. The emittercollector voltage was 200 V. The maximum stable emission current measured from a 2 mm 2 array was 1 mA. This means a 50 nA
-7 -8
)og[~
A simple and relatively inexpensive method of field emitter array has been developed and tested. Some of the here described procedures were forced by the available equipment and materials. The basic idea of the emitter array manufacturing is the use of electrochemical process to obtain different etch rates for the specified parts of the etched pattern. The manufactured array described here consisted of the round silicon emitting tips. However, there is no reason, why the same techniques could not be applied to the knife-edge emitters.
Acknowledgements The authors would like to thank Dr. Ivo Rangelow of the Kassel University for the SEM micrographs and Dr. Peter Hudek of the Slovak Academy of Sciences for the mask preparation. The work was supported by the Scientific Research Committee under grant No. 8 S 501 014 06.
-9
References
-10 -11 -12 '
I
.
.
.
.
2 5 x 1 0 -~
I
5 0 x 1 0 -~
1/'Ve, v"' Fig. 5. Fowler- - Nordheim plot of the array.
[1] T. Utsumi, IEEE Trans. Electron Dev. 38 (1991) 2276. [2] K. Yokoo, Proc. XXV European Microwave Conf. EUMC'95, 1995, p. 1275. [3] C.A. Spindt, 1. Brodie, L. Humphrey and E.R. Westerberg, J. Appl. Phys. 47 (1976) 5248. [4] J.T. Trujillo and C.E. Hunt, J. Vac. Sci. Technol. B 11 (1993) 437. [5] J.P. Spallas, J.H. Das and N.C. MacDonald, J. Vac. Sci. Technol. B 11 (1993) 454.
Z. Borkowicz, W. Czarczynski / Applied Surface Science 111 (1997) 224-227 [6] Bo Lee, E.F. Barrasch, T. Mazumdar, P.M. Mclntyre, Y. Pang and H.J. Trost. Appl. Surf. Sci. 67 (1993) 66. [7] G.N.A. van Veen, B. Theunissen, K. van de Heuvel, R. Home and A.L.L Burgmans, J. Vac. Sci. Technol. B 13 (1995) 478. [8] K. Yokoo, M. Arai, M. Mori, J. Bae and S. Ono, J. Vac. Sci. Technol. B 13 (1995) 491.
227
[9] J.D. Levine, R. Meyer, R. Baptist, T.E. Felter and A.A. Talin, J. Vac. Sci. Technol. B 13 (1995) 474. [10] H.H. Busta, B.J. Zimmerman, M.C. Tringides and C.A. Spindt, IEEE Trans. Electron Dev. 38 (1991) 2558.