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Simple techniques for making patterns of tin-oxide films
World Abstracts continued from page 39
CVD films for interlayer dielectrics B R A D MATTSON Solid-State TechnoL p. 60 (January 1980). Finer device geometries dictate improved interlayer dielectrics in multilevel devices. Chemical Vapour Deposition (CVD) techniques, including plasma enhanced CVD, offer a wide variety of film properties to meet the challenge of the new devices. A recently developed film, plasma oxide, offers the optimum choice for new interlayer dielectrics. Applications of auger and photoelectron spectroscopy in characterising IC materials R. K. LOWRY and A. W. H O G R E F E Solid-State Technol. p. 71 (January 1980). Modern surface analysis equipment is well suited to characterising the thin-film structures of microelectronic devices. In-situ microbeam examination of films and interfaces of devices has become a valuable R & D and problem solving tool for the manufacturer of integrated circuits. Several relatively simple thin-film analyses which helped improve IC production processing are discussed. Topics include wire bonded interfaces, effect of plasma processing on surfaces, metallisation adherence, etching of metal films, diffusion damage, and surface characterisation of silicon materials. Positron annihilation in boron-implanted N-typo silicon M I N G - C H E N G HUNG, J U H TZENG LUE and CHING-KAI YEH Solid-State Comms. 32, 1169 (1979). The ion damaged effect and subsequent isothermal annealing in boron-implanted Si was studied by positron annihilation lifetime measurements. The mean positron lifetime in preimplanted n-type Si is 243 psee. The variation of mean lifetime is detectable when the implanted boron dose is greater than 1.0+1015/cm2. The saturated mean positron lifetime (247 psec) occurs when the implantation dose reaches 2.5'I015/cm2. The mean electronm density of the positron sensitive defects is estimated to be about 85% less than that in the perfect parts of the crystal. Isothermal annealing was held in every 5-minute step at 1000°C. In the first step, the positron lifetime in the implanted sample increases slightly and then decreases completely to its initial state in the 3rd step. Sheet resistance of the sample monitored by 4-point probe method has been found closely related to the positron lifetime. Charge neutrality and the internal electric field produced by impurity diffusion R. S H R I V A S T A V A and A. H. MARSHAK Solid-State Electron. 23, 73 (1980). The assumption of local charge neutrality is an important approximation in diffusion theory and has been widely used in the calculation of impurity profiles. A good overview of field-aided diffusion can be found in [1]. Charge neutrality is used in the calculation of free energy which is used in the theory of diffusion via a vacancy mechanism [2]. It is also used in the calculation of the Fermi level [3], which affects the impurity motion through the effective diffusivity and the calculation of activity coefficients. A consistency argument [4] using an assumed impurity profile indicates that charge neutrality is a reasonably good approximation. On the other hand, a numerical study of field-aided diffusion using the general transport equations implied that charge neutrality was a poor assumption [5]. Further work 16] indicated that this study had significant numerical error; thus the conclusions are open to question. Discrepancies in the results were due to insufficient convergence of the iteration scheme used to solve the transport equations. The purpose of this note is to re-examine the question of charge neutrality. We show that charge neutrality is an excellent approximation under typical diffusion conditions and is consistent with first principles.
7.
Production and Processing
Sputtering system has high yield JOHN GOSCH Electronics p. 153 (17 January 1980). Plant uses up to six high-rate cathodes, two vacuum chambers and a vertical transport system to keep both throughput and reliability high. 40
Xe + ion beam cratering of Cu-A! thin-film multistructure MARCEL JANDA, ALOIS KUBOVY" and DUSAN STULIK TESLA Electron. (4) 117 (1979). A thin-film Cu-Ai multistructure was prepared by vacuum vapour evaporation of four Cu- and four AI-films on glass substrate. The thickness of each film was 40 nm. This multistructure was etched by an Xe ÷ ion beam of 2.5 keV energy. The profile of the crater was investigated by electron scanning and optical microscopy and by the stylus method. The effects of different Cu and AI sputtering rates on the crater profile are illustrated. Introduction to chamical vapour deposition M. L. HAMMOND Solid-State Technol. p. 61 (December 1979). Chemical Vapour Deposition (CVD) has developed into one of the fundamental technologies of the semiconductor industry. The key to understanding the CVD process is the Boundary Layer Theory (BLT), which explains how the CVD reaction takes place. With a broad understanding of BLT, the process engineer can make intelligent adjustments to a complex process. An understanding of BLT becomes essential for the semiconductor engineer as he looks into new CVD techniques in epitaxial, mid-temperature, low temperature, and plasma-enhanced deposition.
Survey of computer-alded electrical analysis of integrated circuit interconnections A. E. RUEHLI IBM J. Res. Develop. 23, (6)626 (1979). In the last decade an important shift has taken place in the design of hardware with the advent of smaller and denser integrated circuits and packages. Analysis techniques are required to ensure the proper electrical functioning of this hardware. In this paper we give a coherent survey of the modeling and computer-aided design techniques applicable to solving these problems. Methods are considered for the computation of resistances, capacitances, and inductances. Also, an extensive list of references is given. Simple techniques for making patterns of tin-oxide films W.C. SIU, Y. C. LEE and Y. W. LAM Solid-State Technol. p. 117 (October 1979). Two simple methods are described for producing SnO2 patterns having a resolution limited only by the photolithographic technique used. These methods are applicable to SnO2 films formed by CVD or by direct evaporation. Investigations into the most favourable application of projection lithography R. HESSE and E. WEILAND Jena Review p. 78, 2/1979. Compared to contact lithography, the advantages of projection lithography may be summarised as follows: no wear of the masks; use of almost perfect masks considerably increases the yield of semiconductor components. highly productive manufacture of integrated circuits with feature widths reaching to the submicron range. These advantages have been fully made use of only after having optimised the exposure and developing process and after having improved evenness of the photoresist later.
Radial distortion in cambered wafers L. S. GOLDMANN Solid-State Technol. 74 (June 1979). As the electronics industry moves to larger wafers and higher-density circuits, problems arise which had previously been of little concern. One of these problems is mechanical distortion of the wafer surface from thin-film bowing after the wafer has been pressed flat. The result is possible misregistration between points on the surface during manufacturing operations. This phenomenon is treated theoretically by basic stress analysis techniques with simple equations derived for the misregistralion or radial distortion as functions of wafer and film properties. Thin films on one or both sides, and partial as well as complete mechanical flattening, are considered. Numerical illustrations are presented.
CVD films for interlayer dielectrics B R A D MATTSON Solid-State TechnoL p. 60 (January 1980). Finer device geometries dictate improved interlayer dielectrics in multilevel devices. Chemical Vapour Deposition (CVD) techniques, including plasma enhanced CVD, offer a wide variety of film properties to meet the challenge of the new devices. A recently developed film, plasma oxide, offers the optimum choice for new interlayer dielectrics. Applications of auger and photoelectron spectroscopy in characterising IC materials R. K. LOWRY and A. W. H O G R E F E Solid-State Technol. p. 71 (January 1980). Modern surface analysis equipment is well suited to characterising the thin-film structures of microelectronic devices. In-situ microbeam examination of films and interfaces of devices has become a valuable R & D and problem solving tool for the manufacturer of integrated circuits. Several relatively simple thin-film analyses which helped improve IC production processing are discussed. Topics include wire bonded interfaces, effect of plasma processing on surfaces, metallisation adherence, etching of metal films, diffusion damage, and surface characterisation of silicon materials. Positron annihilation in boron-implanted N-typo silicon M I N G - C H E N G HUNG, J U H TZENG LUE and CHING-KAI YEH Solid-State Comms. 32, 1169 (1979). The ion damaged effect and subsequent isothermal annealing in boron-implanted Si was studied by positron annihilation lifetime measurements. The mean positron lifetime in preimplanted n-type Si is 243 psee. The variation of mean lifetime is detectable when the implanted boron dose is greater than 1.0+1015/cm2. The saturated mean positron lifetime (247 psec) occurs when the implantation dose reaches 2.5'I015/cm2. The mean electronm density of the positron sensitive defects is estimated to be about 85% less than that in the perfect parts of the crystal. Isothermal annealing was held in every 5-minute step at 1000°C. In the first step, the positron lifetime in the implanted sample increases slightly and then decreases completely to its initial state in the 3rd step. Sheet resistance of the sample monitored by 4-point probe method has been found closely related to the positron lifetime. Charge neutrality and the internal electric field produced by impurity diffusion R. S H R I V A S T A V A and A. H. MARSHAK Solid-State Electron. 23, 73 (1980). The assumption of local charge neutrality is an important approximation in diffusion theory and has been widely used in the calculation of impurity profiles. A good overview of field-aided diffusion can be found in [1]. Charge neutrality is used in the calculation of free energy which is used in the theory of diffusion via a vacancy mechanism [2]. It is also used in the calculation of the Fermi level [3], which affects the impurity motion through the effective diffusivity and the calculation of activity coefficients. A consistency argument [4] using an assumed impurity profile indicates that charge neutrality is a reasonably good approximation. On the other hand, a numerical study of field-aided diffusion using the general transport equations implied that charge neutrality was a poor assumption [5]. Further work 16] indicated that this study had significant numerical error; thus the conclusions are open to question. Discrepancies in the results were due to insufficient convergence of the iteration scheme used to solve the transport equations. The purpose of this note is to re-examine the question of charge neutrality. We show that charge neutrality is an excellent approximation under typical diffusion conditions and is consistent with first principles.
7.
Production and Processing
Sputtering system has high yield JOHN GOSCH Electronics p. 153 (17 January 1980). Plant uses up to six high-rate cathodes, two vacuum chambers and a vertical transport system to keep both throughput and reliability high. 40
Xe + ion beam cratering of Cu-A! thin-film multistructure MARCEL JANDA, ALOIS KUBOVY" and DUSAN STULIK TESLA Electron. (4) 117 (1979). A thin-film Cu-Ai multistructure was prepared by vacuum vapour evaporation of four Cu- and four AI-films on glass substrate. The thickness of each film was 40 nm. This multistructure was etched by an Xe ÷ ion beam of 2.5 keV energy. The profile of the crater was investigated by electron scanning and optical microscopy and by the stylus method. The effects of different Cu and AI sputtering rates on the crater profile are illustrated. Introduction to chamical vapour deposition M. L. HAMMOND Solid-State Technol. p. 61 (December 1979). Chemical Vapour Deposition (CVD) has developed into one of the fundamental technologies of the semiconductor industry. The key to understanding the CVD process is the Boundary Layer Theory (BLT), which explains how the CVD reaction takes place. With a broad understanding of BLT, the process engineer can make intelligent adjustments to a complex process. An understanding of BLT becomes essential for the semiconductor engineer as he looks into new CVD techniques in epitaxial, mid-temperature, low temperature, and plasma-enhanced deposition.
Survey of computer-alded electrical analysis of integrated circuit interconnections A. E. RUEHLI IBM J. Res. Develop. 23, (6)626 (1979). In the last decade an important shift has taken place in the design of hardware with the advent of smaller and denser integrated circuits and packages. Analysis techniques are required to ensure the proper electrical functioning of this hardware. In this paper we give a coherent survey of the modeling and computer-aided design techniques applicable to solving these problems. Methods are considered for the computation of resistances, capacitances, and inductances. Also, an extensive list of references is given. Simple techniques for making patterns of tin-oxide films W.C. SIU, Y. C. LEE and Y. W. LAM Solid-State Technol. p. 117 (October 1979). Two simple methods are described for producing SnO2 patterns having a resolution limited only by the photolithographic technique used. These methods are applicable to SnO2 films formed by CVD or by direct evaporation. Investigations into the most favourable application of projection lithography R. HESSE and E. WEILAND Jena Review p. 78, 2/1979. Compared to contact lithography, the advantages of projection lithography may be summarised as follows: no wear of the masks; use of almost perfect masks considerably increases the yield of semiconductor components. highly productive manufacture of integrated circuits with feature widths reaching to the submicron range. These advantages have been fully made use of only after having optimised the exposure and developing process and after having improved evenness of the photoresist later.
Radial distortion in cambered wafers L. S. GOLDMANN Solid-State Technol. 74 (June 1979). As the electronics industry moves to larger wafers and higher-density circuits, problems arise which had previously been of little concern. One of these problems is mechanical distortion of the wafer surface from thin-film bowing after the wafer has been pressed flat. The result is possible misregistration between points on the surface during manufacturing operations. This phenomenon is treated theoretically by basic stress analysis techniques with simple equations derived for the misregistralion or radial distortion as functions of wafer and film properties. Thin films on one or both sides, and partial as well as complete mechanical flattening, are considered. Numerical illustrations are presented.