Nuclear Instruments and Methods in Physics Research A 729 (2013) 474–483
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Nuclear Instruments and Methods in Physics Research A journal homepage: www.elsevier.com/locate/nima
Simplified two-fluid current–voltage relation for superconductor transition-edge sensors Tian-Shun Wang a,n, Jun-Kang Chen a, Qing-Ya Zhang b, Tie-Fu Li b, Jian-She Liu b, Wei Chen b, Xingxiang Zhou a a b
Department of Optics and Optical Engineering, University of Science and Technology of China, Hefei City, Anhui Province 230026, China Institute of Microelectronics, Tsinghua University, Beijing 100084, China
art ic l e i nf o
a b s t r a c t
Article history: Received 11 February 2013 Received in revised form 10 June 2013 Accepted 23 July 2013 Available online 2 August 2013
We propose a simplified current–voltage (IV) relation for the analysis and simulation of superconductor transition-edge sensor (TES) circuits. Compared to the conventional approach based on the effective TES resistance, our expression describes the device behavior more thoroughly covering the superconducting, transitional, and normal-state for TES currents in both directions. We show how to use our IV relation to perform small-signal analysis and derive the device's temperature and current sensitivities based on its physical parameters. We further demonstrate that we can use our IV relation to greatly simplify TES device modeling and make SPICE simulation of TES circuits easily accessible. We present some interesting results as examples of valuable simulations enabled by our IV relation. & 2013 Elsevier B.V. All rights reserved.
Keywords: Superconductor transition-edge sensor Current–voltage relation Device modeling SPICE
1. Introduction After about two decades' development, the superconductor transition-edge sensor technology has become mature and reliable enough to allow the deployment of mid-scale TES detector arrays with tens to hundreds of pixels in state-of-the-art scientific instruments [1,2]. In contrast, the simulation and design techniques for TES circuits remain less advanced, relying primarily on the small-signal model [3] developed in the early age of TES research. The small-signal model is very important in revealing the small-signal circuit response and stability conditions. However, it also has its limitations in supporting circuit analysis and simulation. The temperature and current sensitivity α and β lie in the heart of the small-signal formalism, yet the small-signal model itself cannot relate these vital characteristics to the device's physical parameters. Because of this, simulation model based on the small-signal formalism must contain not only the device's physical parameters but also α and β which in principle should be determined by the physical parameters. Simulations based on such model cannot help in selecting the device's physical parameters to optimize the circuit performance and meet the design requirement [4]. Also, being a small-signal model in nature, it cannot support studies that are not limited to small signals, notably DC
n
Corresponding author. Tel.: +86 55163601068. E-mail addresses:
[email protected] (W. Chen),
[email protected] (X. Zhou). 0168-9002/$ - see front matter & 2013 Elsevier B.V. All rights reserved. http://dx.doi.org/10.1016/j.nima.2013.07.074
analysis which is indispensable for determining the circuit's bias values and working conditions, and analysis of AC-biased TES circuits which experience large current and voltage swings. What is more, semi-manual analysis based on the analytical solution of the small-signal model fails to take advantage of the extremely powerful, robust, and efficient computer-based electronic design automation (EDA) tools for large-scale integrated circuit design that have been developed in the past few decades. Such tools can not only dramatically enhance design efficiency and reduce human error but help to gain deep insight into the system behavior, and thus they have become indispensable in modern electronic circuit design and research. As the scale and complexity of the TES circuits grows [5], it is our belief that TES circuit design and simulation will increasingly benefit from leveraging the power of proven practices in modern integrated circuit design and relying on sophisticated EDA tools that are already available. For doing so, it is necessary to develop accurate and reliable TES device models that can be integrated in modern circuit simulators. In Ref. [6], we reported the modeling techniques for building a two-fluid TES device model. Our method was based on the conceptually simple and elegant approach of using polynomial controlled sources only, and the resulting device model can be used in many circuit simulators. However, it has the disadvantage of being complicated because some clever and unusual techniques must be used. This makes the model and simulations based on it less accessible, especially to non-experts in device modeling. In this work, we try to overcome the limitations of the smallsignal model by suggesting a two-fluid IV relation for the TES that
T.-S. Wang et al. / Nuclear Instruments and Methods in Physics Research A 729 (2013) 474–483
is more generally applicable. By using the IV relation to perform analysis and simulation of TES circuits, we derive how the temperature and current sensitivities of the TES depend on its physical parameters. We also show how we can dramatically simplify device modeling for SPICE simulation by taking advantage of advanced behavioral modeling features available in modern circuit simulators. To demonstrate the validity of the IV relation and its usefulness in supporting TES circuit simulation and research, we present some interesting results and discuss their implications for circuit operation. For the readers' benefit, we include all device model and SPICE simulation files in the appendix. They are tested and directly usable. Thanks to the drastic simplification in our device modeling, the resulting model and simulation files are easily accessible to a general audience not specialized in device modeling. Therefore, our techniques and results can be readily adopted by a wide community of TES researchers to help to modernize TES circuit simulation and design.
2. IV relation based on the two-fluid theory 2.1. Limitation of the effective-resistance approach Accurate modeling of the IV characteristic of the TES is essential for correctly understanding and describing its behavior. In our previous work [6], we followed the conventional method to model the TES as an effective resistance. Assuming a two-fluid physical model and considering both the supercurrent and normal current, we can express the effective TES resistance as Rtes ¼
I c0 1TTc
V tes ; 3=2 þ V tes =ðC R Rn Þ
ð1Þ
where Vtes is the voltage across the TES, T and Tc are the temperature and critical temperature of the TES, Ic0 is the 0-temperature critical current, Rn is the normal-state resistance, and CR is the ratio of the TES normal current resistance in the transition regime to Rn. The dependence of the critical current Ic on the temperature has been modeled by the simple BCS relation I c ¼ I c0 ð1T=T c Þ
3=2
:
ð2Þ
The effective resistance in Eq. (1) correctly models the TES in the transition regime when the TES current is greater than the critical current (and thus the total TES current consists of both a supercurrent and a normal current). This is the working regime for a DC-biased TES under small-signal perturbation. In this case, a small-signal analysis based on the sensitivity of Rtes with respect to the TES temperature and current, α and β, works very well. However, if we are interested in studying the TES in a wider range of working conditions, Eq. (1) becomes inadequate. For instance, in AC-biased TES circuits (see Section 4.2.4), the TES current experiences large swings in both directions, and the TES enters and exits the superconducting state in each period of the oscillation (see Fig. 7(b)). Such AC-biased TES circuits cannot be studied by perturbative expansion of the effective resistance in Eq. (1) around some constant DC value. As one more example, in high-energy radiation (such as X and γ ray) detectors, the large input signal can saturate the TES and drive it to the normal-state where Eq. (1) does not apply (since it is only valid for T o T c ). Aside from these fundamental issues, there are also practical problems in using Eq. (1) to build a generic device model for TES. If we assign a positive value to the 0-temperature critical current Ic0, then Eq. (1) can only describe the IV relation of the TES in one direction of the current flow, which causes difficulty for simulating AC-biased TES with alternating current. Also, in our circuit simulation work [6], we
475
found that modeling the TES using Eq. (1) can sometimes cause the circuit simulator to give a false superconducting solution of the circuit (notice Rtes ¼ 0 and V tes ¼ 0 always satisfy Eq. (1) because of its form, even for T 4 T c ). 2.2. Expressing the IV relation with step functions In order to build a device model that can be used to analyze and simulate TES circuits under all possible working conditions of interest, we consider different combination of the TES temperature and current and model the behavior of the TES under each condition separately. We can divide our discussion into the following:
The TES temperature is greater than the critical temperature, i.
e., T 4 T c . In this case, the TES can be modeled as a resistance Rn, and its IV relation is given by V tes ¼ IRn , for TES current I in both directions (i.e. both positive and negative I). The TES temperature is below the critical temperature, i.e., T o T c . In this case, a supercurrent whose magnitude does not exceed the critical current Ic (positive by definition) given in Eq. (2) can flow through the TES. The TES voltage Vtes depends on both the magnitude and direction of the TES current I. Specifically, ○ I 4 0, two possibilities. – I o I c . All current is supercurrent, and V tes ¼ 0. – I 4 I c . Ic of the total current is supercurrent, the rest is normal current. V tes ¼ ðII c ÞC R Rn . ○ I o 0, also two possibilities. – I 4 I c , or jIj oI c . All current is supercurrent, and V tes ¼ 0. – I o I c , or jIj 4 I c . I c of the total current is supercurrent, the rest is normal current. V tes ¼ ðI þ I c ÞC R Rn .
Summarizing all the cases discussed, we can express the IV relation of the TES as V tes ¼ θðTT c ÞIRn þθðT c TÞθðII c ÞðII c ÞC R Rn þθðT c TÞθðII c ÞðI þ I c ÞC R Rn ;
ð3Þ
where θ is the step function, and the temperature-dependent Ic(T) is given by Eq. (2). We can rewrite Eq. (3) in the following slightly more concise form: ! T 3=2 V tes ¼ θðT c T Þθ absðI ÞI c0 1 C R Rn Tc 3=2 ! T IsgnðI ÞI c0 1 ð4Þ þ θðTT c ÞRn I; Tc where abs and sgn are the absolute-value function and sign function respectively. The IV relation in Eqs. (3) and (4) looks unfamiliar and cumbersome. However, as is evident from its derivation, it covers all working conditions of the TES and incorporates the effective resistance relation in Eq. (1) as a special case. As we will demonstrate in Section 4, it allows us to easily build robust device models suitable for accurate and reliable SPICE-based simulations of TES circuits. Perhaps surprisingly, it is also convenient for theoretical analysis of the TES circuits (see Section 3), in spite of its intimidating appearance. 2.3. Thermal equation written with the IV relation The thermal process must be considered for a complete description of the TES physics. Using Eq. (3) or Eq. (4) for the IV relation of the TES, we can express the Joule power in the TES as IVtes. Thus, if we model the device as an absorber-TES-substrate
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structure [6] and assume the power law for heat conduction between them, we can easily write the thermal equation for the TES, C1
dT 1 1 ¼ IV tes K 1 T n11 T nbath þ K 2 T n22 T n12 ; dt
ð5Þ
where T1, T2 and Tbath are the TES, absorber, and substrate temperature, C1 is the heat capacity of the TES, K1, K2, n1 and n2 characterize the TES–substrate and absorber–TES heat conduction, and Vtes is given by Eq. (3) or Eq. (4). Similar consideration leads to the thermal equation for the absorber C2
dT 2 ¼ P s K 2 T n22 T n12 ; dt
ð6Þ
where C2 is the heat capacity of the absorber and Ps is the signal power.
3. Small signal analysis using the IV relation
dI L ¼ V b IRL V tes ; dt
ð7Þ
dT ¼ IV tes K T n T nb þ P s ; dt
ð8Þ
where I and Vtes are the current and voltage of the TES, V b ¼ I b Rs is the TES bias voltage (realized by flowing the bias current Ib through a bias resistance Rs much smaller than the TES resistance), L is the inductance, RL ¼ Rs þ Rp is the total resistance, C is the heat capacity of the TES, T and Tb are the TES and bath temperature, K and n characterize the heat conduction to the substrate, and Ps is the signal power. Vtes is given by Eq. (3). For DC-biased TES circuit,
Rp
Ib
L Rs
∂V tes ¼ ½θðII c Þ þ θðII c ÞC R Rn ; ∂I
ð9Þ
and
In this section, we demonstrate the use of our IV relation in theoretical analysis of the TES circuit. Though our IV relation is more widely applicable than the effective resistance approach, we will study a problem with known solution to check its validity. We choose to perform a small-signal analysis of DC-biased TES circuit. Using the IV relation in Eq. (3), we can derive the equations for the small-signals and simplify them according to the DC working condition of the TES. By comparing the equations with those obtained with the effective resistance method, we can then derive how the temperature sensitivity α and current sensitivity β depend on device parameters. Consider the voltage-biased TES circuit in Fig. 1. For simplicity, assume that the TES acts as both the absorber and sensor. The electrical and thermal equations of the system read
C
its steady state is obtained by solving the equations that result from setting the time derivatives in Eqs. (7) and (8) and also the signal power Ps to 0. In order to derive the equations for the small signals δI and δT deviating from the DC values due to the signal power Ps, we need to perform small-variable expansions of the terms in Eqs. (7) and (8) with respect to δI and δT. This requires calculating the partial derivatives of Vtes in Eq. (3) with respect to I and T. At first glance, it appears to be very difficult due to the presence of the step functions in Eq. (3). However, a little math reveals that it is completely feasible. Suppose the signal power is small enough so the TES never becomes normal, we only need to consider the T oT c terms in Eq. (3). Using the formulae dθðxÞ=dx ¼ δðxÞ and xδðxÞ ¼ 0, where δðxÞ is the Dirac function, we can calculate the derivatives of Vtes with respect to T and I as follows:
Rtes
∂V tes 3 I c ½θðII c ÞθðII c ÞC R Rn : ¼ 2T c T ∂T
Eqs. (9) and (10) simply state that the TES voltage Vtes changes with the TES current and temperature only when the TES current is greater than the critical current (and thus there is a normal current). If the temperature swing induced by the signal power Ps is small enough so that the TES does not enter the superconducting state, Eqs. (9) and (10) can be further simplified to ∂V tes ¼ C R Rn ; ∂I
ð11Þ
and ∂V tes 3 I c ¼ C R Rn : 2T c T ∂T
ð12Þ
Using the DC steady state condition and Eqs. (11) and (12), we can then derive the equations for the small response signals δI and δT from Eqs. (7) and (8), dδI 3 Ic ¼ ðRL þ C R Rn ÞδI L δT; dt 2T c T 0
ð13Þ
and C
dδT 3 Ic ¼ P s þ ðI 0 C R Rn þ V 0 ÞδI þ I 0 C R Rn G δT; dt 2T c T 0
ð14Þ
where I0, V 0 ¼ ðI 0 I c ÞC R Rn , and T0 are the DC steady state values for the TES current, voltage, and temperature, and G ¼ nKT n1 is 0 the heat conductivity. By comparing Eqs. (13) and (14) to those [3] obtained by using the temperature and current sensitivities of the effective resistance, α and β, we can then deduce how α and β depend on the device's physical parameters in the two-fluid model, 3 T 0 I c C R Rn 3T 0 I c0 C R Rn T 0 0:5 α¼ ¼ 1 ; ð15Þ 2T c T 0 I 0 R0 2 T c I 0 R0 Tc and β¼
Fig. 1. A voltage-biased TES circuit. As in Ref. [6], the device parameters are either taken directly from Ref. [8] or inferred from experimental data in it. The critical temperature of the TES is Tc ¼105 mK. The TES heat capacity C¼ 3.3 fJ/K. The shunt resistance Rs ¼ 9:5 mΩ. The normal-state resistance Rn ¼ 1:6Ω. The parameter CR ¼ 1. The heat conduction coefficient K¼ 16.54 nW/K5. The heat conduction exponent n ¼5. The inductance L ¼ 1 μH. The parasitic resistance Rp is estimated to be Rp ¼ 8 mΩ. The 0-temperature critical current Ic0 is estimated to be 35 μA. The substrate temperature is set at T bath ¼ 55 mK.
ð10Þ
C R Rn 1; R0
ð16Þ
where R0 ¼ ðI 0 I c ÞC R Rn =I 0 is the effective resistance of the TES at the DC steady state. Eqs. (13) and (14) can be solved in either the time domain or frequency domain, and all small-signal results including the stability conditions can be obtained. Thus, our IV relation in Eq. (3) can be used for analysis of the TES circuit, and as shown in Eqs. (15) and (16) it can reveal the dependence of the temperature and current sensitivities of the TES on its physical parameters. Notice however, our IV relation is not equivalent to
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the effective resistance method. It is applicable in a wider range and can be used to solve problems where the effective resistance formalism does not apply. In the small-signal analysis of the DCbiased TES circuit, the current dependence of the TES voltage derivatives in Eqs. (9) and (10) does not play a role because they are simplified to Eqs. (11) and (12) under the DC working condition of the device. There are important operation modes of the TES where the current dependence in Eqs. (9) and (10) is vital for understanding the circuit behavior and thus cannot be ignored. We will study in future work such problems that must be analyzed using our IV relation.
4. Device modeling and circuit simulation based on the IV relation 4.1. Simplified SPICE modeling Of more interest to us in this work is the possibility to use the IV relation in Eq. (3) or Eq. (4) for building robust device models that can support accurate and reliable SPICE simulation of the TES circuit. In this effort, it should be recognized that, since we will use SPICE to simulate TES circuits, we need to model the thermal physics of the TES with some equivalent electrical circuit. This is accomplished by mapping the thermal equations (5) and (6) to the electrical equations of two capacitors C1 and C2 being charged by current sources whose values are given by the terms on the right hand sides of Eqs. (5) and (6), as shown in Fig. 2. Notice that the temperatures of the TES and absorber have been mapped to the voltages across the capacitors. It is then clear in this model that the terms on the right hand sides of Eqs. (5) and (6) are controlled current sources dependent on the capacitor voltages. The coupling and feedback between the electrical and thermal physics is realized by modeling the TES voltage as a controlled voltage source whose value is determined by the capacitor voltages according to Eq. (3) or Eq. (4). The key to the successful modeling of the TES device is therefore the realization of the controlled voltage and current sources in Eqs. (3) (or (4)), (5) and (6). In our previous work [6], we modeled the nonlinear resistance of the TES device and the power-law heat conduction by using the polynomial controlled source only. If we choose a specific circuit simulator for all our simulation work, like most people do in practice, we do not need to be concerned with the usability of the device model in multiple circuit simulators. In this case, we can take advantage of the advanced features provided by the chosen circuit simulator to simplify the device modeling and avoid the technical complexities of the polynomial-controlled-source-based approach. As a matter of fact, most latest circuit simulators offer
Fig. 2. Equivalent circuit model for the TES. Etes is the voltage across the TES. vdc is a 0-value voltage source used to reference the TES current. C1 and C2 are the heat capacities of the TES and absorber. The controlled current source I P J represents the Joule power of the TES. Its value is given by the first term on the right-hand-side (RHS) of Eq. (5). Ibath and I C 21 represent the heat flow from the TES to the substrate and from the absorber to the TES. Their values are given by the second and third term on the RHS of Eq. (5). I P s represents the signal power on the RHS of Eq. (6).
477
support for nonlinear sources in some form. For instance, the popular desktop-computer-based PSpice [7] has a powerful Analog Behavioral Modeling (ABM) feature which allows to define nonlinear voltage or current sources using mathematical and logic expressions. With this feature, we can model the temperature dependence of the TES voltage in Fig. 2 according to Eq. (4) using the following nonlinear voltage source Etes 1 2 value¼ {Rn*i(vdc)*stp(v(4)-Tc)+ +stp(abs(i(vdc))-Ic0*(1-v(4)/Tc)^1.5)* +(i(vdc)-sgn(i(vdc))*Ic0*(1-v(4)/Tc) + ^1.5)*CR*Rn*stp(Tc-v(4)))} where stp and sgn are the step and sign function in PSpice, Tc, Ic0, Rn are the critical temperature, 0-temperature critical current, and normal-state resistance of the TES. They can be defined as parameters in the subcircuit for the TES device model. In the description of Etes, the + sign at the beginning of a line indicates continuation of the last line. The terms on the right hand sides of Eqs. (5) and (6) are easily modeled with nonlinear current sources too: GpJ 0 4 value ¼{i(vdc)*v(1,2)} GC21 3 4 value¼ {K2*(v(3)^n 2 -v(4)^n2)} The complete subcircuit file for the TES device modeled with PSpice's ABM is shown in Listing 1 in the appendix. Examples of how the device model can be used in circuit simulations can be found in Listings 2–5 in the appendix. Notice that device models realized with circuit simulators' advanced behavior modeling features are simulator-specific and not as widely usable as those based on more primitive SPICE elements [6]. However, they are drastically simplified. The model and simulation files in the appendix are easily accessible to a general audience with little experience in device modeling. Compared with our previous models [6], they are much easier to use. 4.2. Simulation examples Once we successfully modeled the TES device and encapsulated the results in appropriate SPICE subcircuits, we can then use the device model in any simulation and analysis supported by the circuit simulator which the device model is based on. To demonstrate how TES device model based on our IV relation enables valuable simulation that can directly assist circuit design and impact TES research, we present some interesting simulation results in this section. Most of these simulation results cannot be obtained by using small-signal models. Some of them were hardly known before but have important implications for TES circuit operation. The simulations are performed with PSpice, using the device model in Listing 1 in the appendix. 4.2.1. Instability due to TES hysteresis Our device model can be used to perform DC analysis which is indispensable for finding appropriate bias values of the TES circuit and determining its working conditions. In our previous work [6], we discovered that the TES temperature—bias current curve for the voltage-biased TES circuit in Fig. 1 exhibits interesting hysteresis when the bias current Ib is first increased above the critical current Ic and then decreased below it afterwards, as shown in Fig. 3(a). This result is obtained by a DC analysis with Ib as the sweeping parameter. In this simulation, we use a controlled current source to bias the TES circuit such that the effective bias current to the system Ib is increased from 0 to some maximum value and then brought back down to 0. It can be seen in Fig. 3 (a) that the transitions between the substrate temperature and temperatures near Tc occur at different bias currents Ib1 and Ib2
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Though it is not difficult to avoid this very intriguing instability in most TES detectors, we suspect that it occurs in high-energy radiation and particle TES calorimeters like γ ray detectors which are known to be saturated by the large input signals. In effect, it reduces the device's dynamic range. To prevent such invalid operation, the TES circuit must be carefully designed such that Ib2 is not too close to the TES critical temperature where the circuit is likely to be biased for high temperature sensitivity.
100.0 90.0 85.0 80.0 75.0 70.0 65.0 60.0 55.0 50.0
0
10.0
20.0
30.0
40.0
50.0
60.0
Ibias (μA) 87.5
TES Temperature (mK)
stable unstable 87.0
86.5
86.0
85.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Time (ms) Fig. 3. (a) TES temperature vs. bias current. The cross indicates a dangerous DC steady state for the TES operation close to Ib2 where the system steady state temperature changes abruptly. (b) The transient responses of the TES temperature to two input signal pulses of slightly different energies. The steady state bias current I b ¼ 7:7 μA. All other parameters are the same as in previous simulations. The signal responsible for the unstable response is only 2% larger than the other one. It causes the TES temperature to move away from the initial steady state value and toward the substrate temperature.
when Ib is increased and decreased. The PSpice file for the simulation is shown in Listing 2 in the appendix. Though hardly discussed in literature before, the hysteresis in Fig. 3(a) has important implications for TES circuit design and operation. As indicated in Fig. 3(a), if the steady state for the TES operation is (mistakenly) set at a bias point Iinit (with TES temperature Ti) close to Ib2, and the amplitude of the temperature oscillation induced by the input signal is large enough to bring the TES temperature below Tb2, the TES temperature at Ib2, it is then possible for the TES temperature to move away from Ti and never return, even if Iinit itself is a small-signal stable DC operating point for the circuit. This can be seen in the transient analyses shown in Fig. 3(b) for two input signal pulses of slightly different energies. (The corresponding SPICE simulation file is shown in Listing 3 in the appendix.) The circuit response to the smaller signal (dashed line) is stable and the TES temperature eventually settles back to Ti. However, when the input signal energy is increased slightly (by just 2% in Fig. 3(b)), the TES temperature (solid line) moves away from Ti causing a large temperature variation. Eventually, it will settle at Tf in Fig. 3(a), the steady state temperature for the same bias current Iinit but close to the substrate temperature. Obviously, this breaks the stability of the circuit and is an invalid operation mode that should be avoided. Such instability is caused by the hysteresis in the electrothermal characteristics of the TES and cannot be described in the framework of small-signal analysis.
4.2.2. Circuit performance optimization In TES circuit design, an important step is to determine the circuit parameters and bias conditions to optimize the performance, robustness, and other relevant characteristics of the circuit. Currently used design techniques based on the small-signal model offer very little guidance for this critical task. As an example of such optimization work, we study the optimum bias current for the TES circuit in Fig. 1 to achieve the fastest operation. In practice, selection of appropriate bias point and other working conditions for the TES circuit is nontrivial, requiring large number of measurements to be performed. We can use parametric simulations to investigate how the system behavior changes with the circuit parameters and bias conditions. In such study, we perform multiple simulations of the circuit and adjust the circuit parameter or bias condition under investigation each time. The dependence of the circuit relaxation time on the bias current Ib is plotted in Fig. 4. It can be seen from this simulation result that the operation of the circuit is the fastest when I b 40 μA. Though it is in principle possible to find this bias condition experimentally by performing large number of measurements under different bias currents, it is very time and resource consuming. Thus simulation results like that in Fig. 4 are extremely valuable because they can help to find the desired parameter range quickly and reduce the required experimental search dramatically. In fact, the full power of simulation-based optimization can only be appreciated when multiple circuit parameters and bias conditions need to be considered simultaneously. In this case, the naive brute-force approach of experimentally examining and comparing all possible combinations of circuit parameters and bias conditions is hopeless, because it is inhibitably expensive to fabricate large number of circuits with different parameters and characterize them under all conditions of interest. Only by judiciously performing parametric simulations following elaborate optimization algorithms can one solve the challenge of finding the best circuit parameters and bias conditions [9]. 150 140 Relaxation Time (μs)
TES Temperature (mK)
95.0
130 120 110 100 90 15
20
25
30
35
40
45
50
55
Ibias (μA) Fig. 4. The output relaxation time as a function of the bias current Ib for the TES circuit in Fig. 1. It is defined as the time it takes for the output signal pulse to decay to 1/e of its peak value. It characterizes the speed of the device response to a small input signal pulse. The circuit parameters are the same as in previous simulations.
T.-S. Wang et al. / Nuclear Instruments and Methods in Physics Research A 729 (2013) 474–483
4.2.4. AC-biased TES circuits AC-biased TES circuits are used in frequency-domain multiplexed (FDM) TES sensor arrays [10–12]. As shown in Fig. 6, in such a circuit the TES in series with an LC oscillator is biased by a sinusoidal voltage source whose frequency is in resonance with the LC oscillator. Understanding of the TES behavior under AC bias is essential for the development of the FDM technology. Unfortunately, analysis of ACbiased TES circuits is considerably more difficult than that of DCbiased circuits. This is because in the AC-biased circuit, the current in the TES and the voltage across it experience large swings in both directions, and Taylor-expansion of the effective resistance around a DC steady state value does not apply any more. Simulations based on our device model provide a very powerful and valuable tool for studying the behavior of AC-bias TES circuits. 0
20 μA 30 μA 40 μA
10Hz
−0.2
50kHz
As shown in Listing 4 in the appendix, we can perform a transient analysis on the AC-biased TES circuit and observe the electrical and thermal signals in the TES. In Fig. 7, the current, voltage, and temperature of the TES are plotted against time. A few interesting characteristics can immediately be observed in these plots. First, we observe that the current and voltage are both periodic in the same frequency of the voltage source (also the LC frequency). However, the waveform of the current deviates significantly from sinusoidal which indicates the existence of higher harmonics. This is confirmed in the Fourier transform of the current in Fig. 8(a) which contains 3, 5 and higher odd-order harmonics. These characteristics are also present in the TES voltage plots in Figs. 7(b) and 8(b). In addition, notice that the TES voltage is 0 for a fraction of each period of the bias voltage oscillation. This is because, in each period, the TES current will drop below the critical current Ic of the TES. When this happens, the TES enters the superconducting state and stays superconducting until the current rises above Ic again. The characteristics of the TES temperature in Fig. 7(c) differ significantly from those of the current and voltage, in that it has a large DC value close to the critical temperature. It also contains oscillating components, but as shown in Fig. 8(c) they are at even harmonics and their magnitudes are much smaller than the DC value. The current, voltage, and temperature characteristics plotted in Figs. 7 and 8 are essential for understanding the behavior of TES circuits under AC bias. They are not easily understood in the effective resistance method and cannot be simulated using
0.6
TES Current (μA)
4.2.3. Frequency dependence of TES circuit input impedance As one more example of useful circuit simulation using our device model, we consider the frequency dependence of the input impedance of the TES circuit which is often measured in experiments to extract the circuit parameters. It can be simulated by performing an AC analysis with an AC voltage source as the stimulus and observing the frequency dependence of the TES current in Fig. 1. The result of this AC analysis can then be used to calculate the real and imaginary parts of the TES impedance which give the complex impedance plot of the circuit. We can easily simulate the complex impedance under different circuit and bias parameters (such as the bias current Ib), as shown in Fig. 5. The easiness of quickly producing such results directly relevant to experiments makes simulation based on our device model a powerful tool for TES research.
−0.4 Im[Z] (Ω)
479
0.4 0.2 0 −0.2 −0.4 −0.6 1.950
−0.6
1.955
1.960
1.965
1.970
1.975
1.980
1.970
1.975
1.980
1.970
1.975
1.980
Time (ms) −0.8 0.6
−1.2 −1.4
−1.0
−0.5
0
0.5
1.0
1.5
Re[Z] (Ω)
TES Voltage (μV)
−1.0
Fig. 5. The complex impedance of the TES branch in Fig. 1, for different bias current Ib. The circuit parameters are the same as in previous simulations.
0.4 0.2 0 −0.2 −0.4 −0.6 1.950
1.955
1.960
1.965
Time (ms)
C L
Rtes RL
100.72
Temperature (mK)
Vb
100.70 100.68 100.66 100.64 100.62 100.60 1.950
1.955
1.960
1.965
Time (ms) Fig. 6. AC-biased TES circuit.
Fig. 7. The current, voltage, and temperature of the AC-biased TES in Fig. B3 (without signal heat pulse).
T.-S. Wang et al. / Nuclear Instruments and Methods in Physics Research A 729 (2013) 474–483
102.0
0.6
Temperature (mK)
TES Current (μA)
480
0.4 0.2 0
0
0.2
0.4
0.6
0.8
101.5
101.0
2.00
1.0
2.05
2.10
2.20
2.25
2.30
2.35
2.40
2.25
2.30
2.35
2.40
Time (ms)
Frequency (MHz)
0.5
0.6
0.4
0.4
TES Current (μA)
TES Voltage (μV)
2.15
0.3 0.2 0.1
0.2 0 −0.2 −0.4 −0.6
0
0
0.2
0.4
0.6
0.8
1.0
2.00
2.05
Temperature (μK)
Temperature (mK)
80 60 40 20 0
0
0.2
0.4
2.20
Fig. 10. The temperature and current response of AC-biased TES to a fast signal pulse.
50
0 0.1
2.15
Time (ms)
Frequency (MHz)
100
2.10
0.2 0.3 0.4 Frequency (MHz)
0.6
0.8
0.5
1.0
Frequency (MHz)
that there are also small oscillations superimposed on the decaying signal. This simulation shows that under certain conditions we can use AC-biased TES circuits to detect signal pulses. The results in Figs. 7, 8, and 10 demonstrate that we can easily simulate AC-biased TES circuits using device models based on our IV relation. We should mention, though, that transient analysis is not the most efficient method to study AC-biased TES circuits. We will investigate in greater depth the analysis and simulation of ACbiased TES circuits in future work.
Fig. 8. The Fourier transform of the current, voltage, and temperature signals in Fig. 7.
5. Conclusion 0.8
TES Resistance (Ω)
0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 1.950
1.955
1.960
1.965
1.970
1.975
1.980
Time (ms)
Fig. 9. Effective resistance of the TES under AC-bias.
small-signal models. In fact, as shown in Fig. 9, the effective resistance of the TES (defined as the TES voltage divided by the TES current) changes by large amount in one period of the bias voltage oscillation, and becomes 0 when the TES enters the superconducting state. Of interest is the response of AC-biased TES circuits to fast signal pulses [13]. This can again be simulated with transient analysis, using the SPICE file in Listing 5 in the appendix. The results plotted in Fig. 10 are consistent with data observed in experiments [13–15]. The temperature response in Fig. 10(a) has the same basic exponential decay as in DC-biased circuits, except
We have proposed a two-fluid IV relation that can describe the behavior of the TES device under a broad range of working conditions with different temperatures and current. We demonstrated the usefulness of our IV relation by using it for theoretical analysis of TES circuits and SPICE modeling of TES device. We derived how the temperature and current sensitivities of the TES depend on the device's physical parameters, and presented simulation results based on our device model that are very useful for TES research. Seemingly complicated in its mathematical expression, our IV relation can be used to drastically simplify the device modeling and circuit simulation to the point where it is easily accessible to non-experts in device modeling. By including ready-for-use device model and simulation files in the appendix, we hope our results and techniques can benefit the TES research community.
Acknowledgments This work was supported in part by the China National Natural Science Foundation under Grant 11273023 and Grant 60836001, by the State Key Program for Basic Research of China under Grant 2011CBA00304, by the Central Government University Fundamental Research Fund, and by the Tsinghua National Laboratory for Information Science and Technology (TNLIST) Cross-discipline Foundation.
T.-S. Wang et al. / Nuclear Instruments and Methods in Physics Research A 729 (2013) 474–483
Appendix A. Subcircuit for TES device model
Vdc 10 50 0
In Appendices A and B we present device model and SPICE simulation files used in our work. All the files are tested and directly usable. They can be freely used as long as this work and Ref. [6] are properly acknowledged and cited. The PSpice device model for the TES is shown in Listing 1. It is based on the circuit in Fig. A1. For simplicity, no dedicated absorber is included. The TES layer (Ch in Fig. A1) acts as both the absorber and sensor. Notice that two large auxiliary resistances, Rg and Rb, are added in parallel with the Joule power and heat flow current sources and TES heat capacity. PSpice will report an error without them. Also notice that in the device model we defined a constant Mult. It is used to multiply both sides of the device's thermal equation. The resulting equation is equivalent to the original. This is necessary because typical TES device parameters (in metric units) lead to very small numbers in the thermal equation. These small numbers can cause nonnegligible numerical errors and even convergence difficulties on desktop computers. Multiplying both sides of the thermal equation with a large number alleviates this problem.
* TES voltage dependent on TES current * and temperature Etes 50 20 Value¼{Rn*I(Vdc)*stp(V(30)-Tc) ++stp(abs(I(Vdc))-Ic0*(1-V(30)/Tc)^1.5)* +(I(Vdc)-sgn(I(Vdc))*Ic0*(1-V(30)/Tc) +^1.5)*Rn*CR*stp(Tc-V(30))}
Listing 1. Subcircuit for PSpice TES device model. * * * * * * *
Nodes:
* * * * * * * * * * *
Device parameters:
10 and 20: the two electrical terminals of the TES. 30: the TES temperature node 40: the heat sink node, usually at environment temperature
Ic0: 0-temperature critical current of the TES Tc: critical temperature of the TES Rn: normal-state resistance of the TES Kg: heat conduction coefficient N: heat conduction exponent Heatcap: heat capacity of the TES CR: ratio of superconducting-state normal current resistance to Rn
.subckt TES 10 20 30 40 params:Ic0¼35u +Tc ¼ 0.105 Rn¼ 1.6 Kg ¼16.54n Heatcap¼ 3.3f +N ¼5 CR ¼1 * auxiliary 0 voltage source
481
* Mult is a constant used to multiply both * sides of the thermal equation to avoid * tiny numbers and improve the numerical * performance. One can adjust its value * according to one's device parameters. .param Mult ¼1G * The heat flow to the substrate, *multiplied * by Mult. Gpb 30 40 Value ¼{Kg*Mult*(V(30)^N-V(40)^N)} * The heat capacity of the TES, multiplied * by Mult. Ch 30 0 {Heatcap*Mult} * Auxiliary resistance to provide a DC path * across the current source Gpb Rb 30 40 1000T * The Joule heat, multiplied by Mult. Gpj 0 30 Value¼ {Mult*V(50,20)*I(Vdc)} * Auxiliary resistance to provide a DC * current path across the current source * Gpj and capacitor Ch. Rg 30 0 1000T .ends TES
Appendix B. PSpice simulation files The following are PSpice files for various simulations discussed in the paper. Each simulation file uses a TES device model file (TES.lib) which has been saved in the same directory with the simulation file. The model file's content is the subcircuit in Listing 1. The model subcircuit can be directly embedded in the simulation file too. All files are run with PSpice. Because of the high nonlinearity in the TES device, it is not unusual for the circuit simulator to experience convergence and accuracy problems in simulation. These issues can usually be resolved by adjusting the initial condition and other settings of the simulation (notice the .nodeset and .option statements in the simulation files). B.1. DC simulation
Fig. A1. Equivalent circuit for the TES device model. Etes is the voltage across the TES. Vdc is a 0-value voltage source used to reference the TES current. Ch is the heat capacity of the TES. The controlled current sources Gpj and Gpb represent the Joule power of the TES and the heat flow to the substrate. Two auxiliary large resistances Rg and Rb are added because PSpice requires that there be a DC current path to the ground from any node.
Shown in Listing 2 is the spice file for the DC simulation of the circuit in Fig. B1. The resulting TES temperature—bias current curve is shown in Fig. 3(a). Notice that the plot command itself cannot produce a hysteresis curve like that in Fig. 3(a). In order to obtain the hysteresis plot, one can use PSpice A/D [7] to set the X-axis of the plot to the current in the source Gb.
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Listing 2. Spice file for the TES temperature—bias current DC analysis. DC analysis of TES circuit * The TES circuit model .lib ./TES.lib .param Tbath¼ 55m I1 0 10 70u R1 10 0 1 Fig. B2. DC-biased TES circuit subject to a heat pulse signal. The heat pulse is applied via the pulsed current source Ip.
* Actual bias current for the TES * circuit, controlled by I1 Gb 0 1 Value ¼{100u-abs(v(10))} Rs 1 0 9.5m Rp 1 2 8.0m L0 2 3 1u X1 3 0 4 5 TES params:Ic0¼35u Tc ¼0.105 +Rn ¼ 1.6 Kg ¼16.54n Heatcap¼ 3.3f N ¼5
.param Ip ¼950u Ib 0 1 7.7u Rs 1 0 9.5m Rp 1 2 8.0m L0 2 3 6.09u X1 3 0 4 5 TES params:Ic0 ¼35u Tc ¼0.105 +Rn ¼1.6 Kg¼ 16.54n Heatcap¼3.3f N¼ 5
* bath temperature Vt 5 0 {Tbath} * initial condition .nodeset v(4) ¼0.104 * settings for error tolerance et. al .option Itl2¼ 200 Reltol ¼0.0001 +Gmin ¼1e-15
* The bath temperature Vt 5 0 {Tbath} * The heat pulse signal IP 0 4 pulse(0 {Ip} 1m 0.1u 0.1u 100n 40m) * initial condition and simulation * settings .nodeset V(4)¼ 0.0864 .option itl2¼100 reltol ¼ 0.00001
.dc I1 -100u 100u 0.1u .plot dc V(4) .probe .end B.2. Transient simulation of hysteresis-caused instability Listing 3 is the PSpice file used to simulate the instability behavior of the circuit in Fig. B2. When the value of Ip is set at 950u, the result is the dashed curve in Fig. 3(b) (stable response). When the value of Ip is slightly larger at 960u, the result is the solid curve in Fig. 3(b) (unstable response). Listing 3. Spice file for the transient analysis to demonstrate hysteresis-caused instability in the TES circuit. Instability simulation .lib ./TES.lib .param Tbath¼ 55m
1
L0 3 I1
R1
Gb
Rs
X1
Listing 4 is the PSpice file used to simulate the time dependence of the current, voltage, and temperature of the AC-biased TES circuit in Fig. B3 with no heat signal applied (value of Ip is 0). The results are plotted in Fig. 7.
AC-biased circuit .lib ./TES.lib .param Vb ¼0.5u .param Ind ¼ 0.5u .param Cap ¼ 10u .param Tbath ¼55m .param Fre ¼ {1/(2*PI*sqrt(Ind*Cap))}
2
Rp
B.3. Transient analysis of AC-biased TES circuit
Listing 4. Spice file for the transient analysis of AC-biased TES circuit in Fig. B3.
* Ip ¼950u results in a stable response. * Changing it to Ip ¼960u results in a * unstable response.
10
.tran 5u 8m 1p 1u .Plot tran v(4) .probe .end
4 5 Vt
Fig. B1. DC-biased TES circuit. The value of the voltage source Vt is the bath temperature. Voltage on node 4 is the TES temperature.
Vb 1 0 sin (0 {Vb} {Fre}) C0 1 2 {Cap} L0 2 3 {Ind} X1 3 4 5 6 TES params:Ic0 ¼35u Tc ¼0.105 +Rn ¼1.6 Kg¼ 16.54n Heatcap¼3.3f N¼ 5 Rl 4 0 17.5m Vt 6 0 {Tbath}
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Rl 4 0 17.5m Vt 6 0 {Tbath} * The heat pulse signal IP 0 5 pulse (0 {Ip} 2m 0.1u 0.1u 100n 50m) * initial condition and simulation *settings .nodeset v(5)¼ 0.104 .option itl2¼200 reltol ¼1e-4 gmin ¼1e-15
Fig. B3. AC-biased TES circuit. The value of Vt is the bath temperature. The voltage on node 5 is the TES temperature. Ip represents a heat pulse signal.
* initial condition and simulation *settings .nodeset v(5) ¼0.104 .option itl2¼ 200 reltol ¼1e-4 gmin¼1e-15 .tran 0 50m 1p 100n .plot tran V(5) I(L0) V(3,4) .probe .end
Listing 5 is the PSpice file used to simulate the transient response of the AC-biased TES circuit in Fig. B3 to a short heat pulse. The simulation results are plotted in Fig. 10. Listing 5. Spice file for the transient analysis of AC-biased TES circuit subject to a fast heat pulse. AC-biased TES circuit subject to heat *pulse .lib ./TES.lib .param Ip¼ 20m .param Vb¼ 0.5u .param Ind ¼0.5u .param Cap ¼10u .param Tbath¼ 55m .param fre ¼{1/(2*PI*sqrt(Ind*Cap))} Vb 1 0 sin (0 {Vb} {Fre}) C0 1 2 {Cap} L0 2 3 {Ind} X1 3 4 5 6 TES params:Ic0¼35u Tc ¼0.105 +Rn ¼ 1.6 Kg ¼16.54n Heatcap¼ 3.3f N ¼5
.tran 0 50m 1p 100n .plot tran V(5) I(L0) V(3,4) .probe .end
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