Small signal equivalent circuit of an isotype heterojunction dominated by traps

Small signal equivalent circuit of an isotype heterojunction dominated by traps

Solid-Stale Electronics SMALL Pergamon SIGNAL Press 1970. Vol. 13, pp. 41-46. EQUIVALENT HETEROJUNCTION Engineering CIRCUIT DOMINATED M. J. ...

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Solid-Stale

Electronics

SMALL

Pergamon

SIGNAL

Press 1970. Vol. 13, pp. 41-46.

EQUIVALENT

HETEROJUNCTION Engineering

CIRCUIT

DOMINATED

M. J. HAMPSHIRE Electrical

Printed in Great Britain

and

Dept.,

(Received

OF AN

ISOTYPE

BY TRAPS

R. D. TOMLINSON

University 2 May

of Salford,

England

1969)

Abstract-It is shown that a parallel combination of C, and G, in series with a parallel combination of C’, and Ga can be used as a small signal equivalent circuit for a double-depleted isotype heterojunction. Expressions for the four equivalent circuit elements are evaluated with the minimum of assumptions and the results can be used for small signal analysis under all conditions of bias and frequency providing equilibrium statistics are still applicable. It is shown that in some junctions at very high frequencies the equivalent circuit approximates to values which would be derived by treating each barrier totally independently: the conditions for this to apply are clearly stated. At low frequencies an equivalent circuit produced by treating each barrier independently is found to be invalid. R&sum&-On dCmontre qu’une combinaison parallkle de Cl et G, en s&ie avec une combinaison parallele de Ca et Ga peut &tre employCe comme circuit Cquivalent B petit signal d’une hCt&ojonction isotype B double Cpuisement. Des expressions pour les quatre tlt5ments de circuit Cquivalent sont &al&es avec un minimum d’hypothhses et les resultats peuvent &tre employ& pour I’analyse g petit signal sous toutes conditions de polarisation et de frCquence tant que les statistiques d’equilibre sont encore applicables. On demontre que dans certaines jonctions g hautes frequences le circuit equivalant approche les valeurs dCrivees en traitant chaque barriere totalement g part; les conditions sous-lesquelles ceci s’applique sont clairement d&larees. Aux basses frbquences, un circuit Cquivalent produit en traitant chaque barriere sCparement n’Ctait pas valable. Zusammenfassung-Es wird gezeigt, dass eine Parallelkombination von Cl und G, in Reihe mit einer solchen von Ca und Ga als Kleinsignal-Ersatzschaltung fiir einen isotypen Heteroiibergang mit beidseitiger Verarmungsschicht verwendet werden kann. Analytische Ausdriicke Wr die Elemente des Vierpol-Ersatzschaltbildes werden ermittelt mit einem Minimum an Voraussetzungen. Das Ergebnis ist zur Kleinsignalanalyse fiir alle Vorspannungen und Frequenzen brauchbar, solange noch die Gleichgewichtsstatistik angenommen werden kann. Es wird weiterhin gezeigt, dass bei einigen Uberglngen fti sehr hohe Frequenzen die Elemente der Ersatzschaltung Werte annehmen, die man such bei einer ganz unabhlngigen Behandlung beider Barrieren erhiilt. Die Bedingungen hierfiir werden genau aufgestellt. Bei niedrigen Frequenzen ist eine Ersatzschaltung, die die beiden Barrieren unabhengig betrachtet ungiiltig.

donor density depth of Fermi level below band edge in bulk depth of Fermi energy below band edge at interface alternating current density J R reflection coefficient N density of interface electron traps per unit energy AE, conduction band discontinuity 5 relaxation time for trap release w angular frequency E perrnittivity No & F>F

NOTATION 4 ?I

no a

Y

c

m* V

electronic charge density of electrons trapped at the interface direct steady state value of n fraction of incident current trapped at the interface 1+ w27a incremental barrier capacitance effective electron mass direct voltage 41

M.

42

J.

HAMPSHIRE

and

INTRODUCTION

HETEROJUNCTIONSmake excellent photo-detectors and internal quantum efficiencies of up to 40 per cent have been reported by TANSLEY and NEWMAN.(l) The n-n heterojunction in particular may be free of minority carrier storage effects and at the same time can in principle be produced having large rectification ratios. It is possible, therefore, that the n-n heterojunction may find application as a fast, efficient photo-detector. If an 72-n junction is formed between two semiconductors having a significant lattice mismatch, then sufficient unsaturated bonds may exist at the interface to cause the junction to double-deplete as shown in Fig. 1. This situation arises when the

R.

D.

TOMLISSOX

n-n junction which has a lattice mismatch of about 7 per cent, although in this case the reversal was only in evidence under forward bias conditions (CdSe positive). The band structure of double depleted n-n junctions is similar to two semiconductor metal diodes back-to-back and the same doubly saturated V-1 characteristics may be expected.@s7’ It is the purpose of this paper to evaluate with the minimum of simplifying assumptions the small signal equivalent circuit of a general n-n heterojunction which is double-depleted. This may then be used in the analysis of C-V characteristics at various frequencies and bias voltages and in the evaluation of the small signal response to optical signals. It has been assumed in the analysis of the optical response of the n-n Si-Ge junction’“’ and also in the C-V analysis@) that each depletion layer can be treated separately. It will be shown that this is only valid for symmetrical junctions at zero bias and for very high frequency measurements providing certain approximations arc valid. EQUIVALENT

Semiconductor

I

SemIconductor Interface

2

charge

(a)

CZ

CI (b)

I:rc. 1. (n) Conduction band diagram of an n-n heterojunction dominated by interface electron traps in forward bias. (b) The small signal equivalent circuit.

flux density (&) at the interface in the material having the smaller work function is less than the interface charge density (qn,) (see Appendix II). This type of band structure may produce a photovoltage the sign of which is dependent on the photon energy. This has been observed in Si-Ge n-n junctions by VAN OPDORP and VRAKKINC,(~) DONNELLY and MILNES(~) and in the Ge-GaP n-n junction by VAN RUYVEN et ~1.‘~) Both the Si-Ge and Ge-GaP junctions have a mismatch of about 4 per cent. The change in the sign of the photovoltage has also been observed’5) in the CdSe-Ge

CIRCUIT

It is assumed that the density of interface states is sufficiently large so that all the carriers incident on the interface are trapped by the states and the reflection of carriers at the interface will be ignored. The cases for non-zero transmission and reflection coefficients at the interface are discussed later. It will be further assumed that conduction currents flow into the interface states by thermal stimulation over the respective barrier. However, the equations may readily be adapted to deal with thin junctions where tunnelling predominates. The sign convention is shown in Fig. 1 where a positive voltage J -i reduces barrier 1 and a positive voltage J, increases the height of barrier 2; it follows that the applied voltage V= V, + V,, but r’D= V,, - 1 bZ. Any series resistance in the bulk of the semiconductors is neglected. Assuming equilibrium statistics are applicable the rate at which the interface states fill with charge is

where

SMALL

SIGNAL

EQUIVALENT

CIRCUIT

OF AN ISOTYPE

The alternating electron current density Jr flowing into the states at the interface from semiconductor 1 including the small signal displacement current is

and B = qlvoa The rate at which charge flows from the states into semiconductor 1 will be qn/T, where 71 is an average relaxation time (TVis evaluated in Appendix I). Similarly the rate at which interface charge flows into semiconductor 2 is qn/T, and d?z qdt = AeQV1’kr+Be”9

71 (2) The current Ja flowing into semiconductor the states is similarly given by

V*ikr-qn

It is assumed that the variation of n is small enough so that 71 and 72 may be treated as constants. Defining a combined relaxation time 7 as 1 -= T

43

HETEROJUNCTIOK

1 -+_

1

71

72

72

-___

+

Be-

qV,/kT

*

(1)

-4ssume that a small external signal V= 6 sin( Wt) is applied to the junction. This produces small perturbations in I’, of magnitude ZJ~= 6, sin (it) and similarly ~1~= &2 sin (it) in V2; zll and u2 will in general be complex. It will be assumed that both til and &. are significantly smaller than q/kT such that harmonic generation is avoided. Therefore, expanding the exponentials in equation (1)

z2

Be-

s

=

(c2 +

(X+jY)v,,

(4)

-%T)(CI

+

ZAT)

+C1C2W2T2

(ZBT+C~)~+C~~W~T~



(5)

and WT”(

z,C,

-

z,C2)

Y= ( zBT

+ C2)2 + C22W2T2’

(6)

if

QV,/kT

~1

ZgG2) sin(wt)

+(Z,S,-

=

where

Similarly 7’ +

(3)

but J1=J2 and from equations (2) and (3) the relationship between v1 and o2 can be obtained. It can be shown that

then QV,IkT

2 from

=

P+jQN2,

then

where

p = (ca + ZaT)(Cr + 2~7) +c,caW2T2 Z,l = g

eG’,ikr and Z,

= gT

(7)

(ZAT+C~)~+C~~W~T~

e-QV,lkr. and

Multiplying integrating

by the integrating by parts gives

qn = T(Ae G’,IkT +

Be-

#‘,/kT

>

factor

etlr

and

WT”(

(constant)

eVtiz.

-

&Cl)

’ =(ZA~+~1)2+~12~2~2'

(8)

By eliminating n2 from equations (2) and (4), J1 can be expressed in terms of T+ only and consequently G1 = Z,--.

+

z,C,

2 vrr

W.&T2

“71

-YY, VT1

(9)

44

M.

J.

HAMPSHIRE

and

and

R.

D.

?‘OMLINSON

and c,

= c,+

ZA? ---x+-,

Za72

VT1

VT1

2sTy

where v= 1+ ~‘7’. Similarly in terms of va only and

J, can be expressed

ZArP -+

(&=Z,-2+

*

(11)

V72

VT2

2

and c2 = c,+

Za7s --___ V72

(10)

v71w

ZA?P VT2

VT2

Z/pQ + -.

(12)

VT2W

Therefore the double-depleted heterojunction can be represented by a series parallel equivalent circuit shown in Fig. 1. In order to assess the bias dependency of the equivalent circuit it is necessary to determine the dependency of V, and V, on the direct bias voltage v. This is treated in Appendix II. Consider a symmetrical n-n junction in which AEc is zero. For equal doping Z,=Z, and c1 = ca at zero bias and 2-r = 71 = r2 (see Appendix I). It follows that X= P= 1 and Y= Q=O, therefore, G,= Z,, C1=cl, G,= Z, and C2=ca. The two depletion layers can be treated quite independently in the symmetrical case. However, this is a situation occurring at grain boundaries in a polycrystalline solid and will rarely occur in epitaxial heterojunctions. NON-ZERO

REFLECTION AND COEFFICIENTS

TRANSMISSION

If it is assumed that a fraction cc1 and aa of the current incident on the interface from 1 and 2 respectively is trapped by the interface states, then it has been shown by OLDHAM and MILNE~(~) that l-al _ eAE,/kT 1-aa If AE, is greater than a few kT then it is a1 which will give rise to the greater modification of the equivalent circuit. Re-writing the currents in terms of al gives J1=

Z,-(

alZ,4T + SEX,+ ml

VT1

WZn? Wl

a1Zp2P’

-__-

Y’ )

v1

a1Zd2’

f----

+

VT2W

(1-aP~Q W

c2

where X’, Y’, P’ and Q’ are obtained from (5-Y) respectively by multiplying Z, by al. Therefore, the effect is to add an extra term to the value of C, and G, and to modify one term in both C, and G, apart from the modifications to X, Y, P and Q. OLDHAM and MILNES(‘) have estimated that the transmission coefficient (1 -ar) in the Si-Ge junction is expected to be about 10m2. This figure assumes that all the electron trapping states are empty and this will only be approximately true for n-p junctions. In n-n junctions a greater number of states is likely to be filled and the transmission coefficient is probably larger than this figure of 10m2. However, it is expected that the modifications produced by the inclusion of a1 will be small and these modifications have only been given for completeness. The reflection of carriers incident on a mass boundary which in general exists at a heterojunction interface has been treated in detail by PERLMAN and FEUCHT.@) If the carriers incident on the interface from 1 and 2 have reflection coefficients R, and R, respectively, then the effect on the equivalent circuit elements is simply to modify the values of Z, and Z, throughout by factors (I- R,) and (1 - A,) respectively. DISCUSSION

For the small signal C-V analysis on a conductance bridge the equivalent circuit can be reduced at a given freqency to a parallel combination of a single conductance and capacitance in the usual way. The complicated dependence of the four equivalent circuit elements on frequency will produce a rather tedious task for the complete C-V frequency analysis. However, under extreme conditions of measurement, namely high and low frequency measurement in the forward or reverse bias conditions, appreciable simplification results.

SMALL

SIGNAL

EQUIVALENT

CIRCUIT

This arises from making the following approximations : (a) At very low frequencies v--+1 and Y= Q-+0*. (b) At very high frequency v+oJ%~, X+c,/cs, P-X,/C, and Y= Q+O. (c) For junctions in which AE,+kT, then T= 7s and T/T~< 1 (see Appendix I). (d) In reverse bias Zn~$c,, Z,T
B

z,c,

OF AN ISOTYPE

2, represents the current flow over the barrier in semiconductor 2 into the interface states and this current never contributes directly to current flow through the device if AEogkT. In reverse bias this is in some way analogous to the equivalent circuit of a transistor where the conductance term representing the collector-base junction arises from basewidth modulation and not from the incremental conductance of the junction itself. REFERENCES

*

T.

Assumptions (d) and (e) are likely to be valid in many junctions due to the reciprocal root variation of c and the exponential variation of Z, with voltage. However, the question as to whether the necessary bias condition can be achieved to satisfy these approximations can only be answered for a specific junction. Using these assumptions the values of the equivalent circuit elements are given in Table 1, and it will be noticed that at very high

5. 6. 7.

Table

1. The values

of the equivalent

circuit

elements

under extreme conditions of bias and frequenq

8. 9. 10.

Low frequency Reverse bias

45

HETEROJUNCTION

L. TANSLEY and P. Electron. 11,497 (1967).

C.

NEWMAN,

Solid-St.

C. VAN OPDORP and J. VRAKKING, Solid-St. Electron. 10, 957 (1967). J. P. DONNELLY and A. G. MILNES, Solid-St. Electron. 9,174 (1966). L. J. VAN RUWEN, J. M. P. PAPENHUIJZENand A. C. J. VERHOEVEN, Solid-St. Electron. 8, 631 (1965). To be published. C. VAN OPDORP and H. K. J. KANERVA, Solid-St. Electron. 10,401, (1967). W. G. OLDHAM and A. G. MILNES, Solid-St. Electron. 7,153 (1964). S. S. PERLMANand D. L. FEUCHT, Solid-St. Electron. 7,911 (1964). D. CURIE, Luminescence in Crystals, p. 147. J. R. HAYNES, Ph~s. Rev. 90,152 (1953).

Forward bias

APPENDIX Evaluation

I

of trap relaxation

time

(a) Single level

C2

CaiZsT

-’

2z*za+a

If the interface states exist at one particular energy in the forbidden band El below the conduction band of semiconductor 1, then the evaluation of rr and 52 is trivial and indeed the values of For and Foa will satisfy the equations ca + 287

c2

Cl

V,,

and V,,

= E1-EI1

= E,-AEc-E,,.

The respective relaxation times will be

frequencies the equivalent circuit under all conditions of bias is simply that obtained by treating both barriers independently. It is important to note that if (1 -CCJ is not negligible then this produces an additional bias dependent term in G2 at high frequencies. At low frequencies there is no direct contribution to Ga from Z,. This is understandable because * At low frequencies & and Y are proportional to w and both give a contribution to ci and ca from the last term m equations (10) and (12).

71 = 7e e E,lkT and 72 = 7o eW,- AE,)/BT where ~a is given by 70

-1

--

y0 is the escape probability

pvo eASilf,

per second and usually lies between 1O’a and 1Or3 see-‘. fi is the transition probability and AS is the entropy change on release. In solid state systems in general, values of ~a are found over a wide range; for example ~a =lO -* set is found for Cu activated ZnS@) and a value of 10 -I4 set is found for traps in bulk Si:“O’ The exact value to be used for ~a in heterojunction calculations is a matter for conjecture at present.

46

M.

(b) Continuous

J.

HAMPSHIRE

and

R.

D.

TOMLINSON APPENDIX

distribution

It will be assumed that the Fermi energy at the interface is EF and that the conduction band edge in material 1 has an energy ,7&r. Consider the case where the interface state density has a constant value of N states per unit energy per unit area for E > 0, and that there are no states for E < 0. Providing EF >kT then it may be assumed with little loss of accuracy that the states are filled up to a level EF and are empty above this level. The rate of emptying of these traps is ns/+r and

,v

110 -_=--_e

-E,JkT

I

eWkT do.

the namely,

.Uso

0

Therefore,

dielectric

boundary

D, 71

current

In order to assess the bias dependency of the equiralent circuit it is necessary to determine how I’r and I’2 depend on the direct bias voltage V. Firstly it is a necessary steady state condition that the direct currents flowing into and out of the interface are equal, and assuming equilibrium statistics may be applied

EF

70

71

Direct

II

condition

must

apply.

D,=qn,

=

NkT(eEp'kT

-

1)'

and for simple Schottky

barriers this implies that

but if EF>kT no70 71 = __

e(Ec,-E,)ikT

NkT

.

.A similar result holds for ra and 71 _ = eAE,lkT 72

Therefore

if .lE,>kT

then T=T~.

and from equations (13) and (14) the dependency of VI, Va and no on the applied direct voltage I’ can be determined.