- Email: [email protected]
Specialized architectures
513
Session F2:
SPECIALIZED ARCHITECTURES Chairman:
Malcolm Taylor University of Liverpool Liverpool (United Kingdom)
Many problems now demand the application of specialized architectures for their most direct and efficient solution. Various strategies can be applied to the solution of such problems which include the application of bit slice processors, uncommitted logic arrays, semi custom and full custom VLSI, and novel multi-processor systems. In this six paper session we hear of applications which require specialized architectures for their implementation. In the first paper; L. Lisca, G.R. Sechi and L. Zetta (Italy) describe 'An advanced microprogrammed data acquisition system - a first evaluation prototype'. They describe an advanced application of a microprogrammed hierarchical architecture to solve a typical problem arising in nuclear electronics: the on-line processing of data acquired in digital form by an electronic chain of detectors used in nuclear experiments. J. Vorstermans and L.Van den Eede (Belgium) then describe 'An image processor for a multiimage processing system'. The image processor is constructed from bit slice processors, offers high performance and is modula in its construction in that several image processors may be connected in parallel to form a vision analysis system.
In the third paper; M. Maekawa (Japan) describes 'Multiwindow screens without window overlapping'. Three methods of realising m~itiwindow screens on advanoed workstations are presented which avoid extra window data transfers by applying associative memory techniques to translate locations on the screen into addresses in the window memory. The next paper by H. Sedlak and U. Golze (West Germany) considers 'An RSA cryptography processor'. The authors present a single chip cryptography processor which encodes and decodes data by the public key method of Rivest, Shamir and Adleman (RSA method). P. Dasiewioz, P.F° Corbett and R.E. Seviora (Canada) describe 'A VLSI high performance multi-tasking computer architecture'. The paper presents a multi-tasking, multi-processor architecture implemented as a procedural flow processor. A major design objective in the development of this processor was that it could be implemented as a single VLSI chip. T h e f i n a l p a p e r is by S . C . W i n t e r {United Kingdom) 'On the physical interconnection of a cube type distributed multi-processor' The paper is concerned with the interconnection characteristics of processing elements in a cube type distributed array of processing elements.
514
DR. MALOOIM J. TAYLOR Deparhnent of Computer Science University of Liverpool Liverpool L69 3BX United Kingdom
Malcolm Taylor is a Senior Lecturer in the Department of Computer Science at Liverpool University, UK.
He was previously employed as a hardware
specialist (1976-1978) and then as a lecturer (1978-1985), both at Liverpool University.
His research interests include microprocessor applications,
hardware design techniques and knowledge based systems.
He holds a BSc in
Electrical Engineering frcm Salford University, UK as well as an MSc and PhD in digital electronics from Manchester University, UK.
He is a chartered
engineer and a me~ber of the Institute of Electrical and Electronic Engineers (USA), the Institution of Electrical Engineers (UK), and the British (km~ter Society.
Session F2:
SPECIALIZED ARCHITECTURES Chairman:
Malcolm Taylor University of Liverpool Liverpool (United Kingdom)
Many problems now demand the application of specialized architectures for their most direct and efficient solution. Various strategies can be applied to the solution of such problems which include the application of bit slice processors, uncommitted logic arrays, semi custom and full custom VLSI, and novel multi-processor systems. In this six paper session we hear of applications which require specialized architectures for their implementation. In the first paper; L. Lisca, G.R. Sechi and L. Zetta (Italy) describe 'An advanced microprogrammed data acquisition system - a first evaluation prototype'. They describe an advanced application of a microprogrammed hierarchical architecture to solve a typical problem arising in nuclear electronics: the on-line processing of data acquired in digital form by an electronic chain of detectors used in nuclear experiments. J. Vorstermans and L.Van den Eede (Belgium) then describe 'An image processor for a multiimage processing system'. The image processor is constructed from bit slice processors, offers high performance and is modula in its construction in that several image processors may be connected in parallel to form a vision analysis system.
In the third paper; M. Maekawa (Japan) describes 'Multiwindow screens without window overlapping'. Three methods of realising m~itiwindow screens on advanoed workstations are presented which avoid extra window data transfers by applying associative memory techniques to translate locations on the screen into addresses in the window memory. The next paper by H. Sedlak and U. Golze (West Germany) considers 'An RSA cryptography processor'. The authors present a single chip cryptography processor which encodes and decodes data by the public key method of Rivest, Shamir and Adleman (RSA method). P. Dasiewioz, P.F° Corbett and R.E. Seviora (Canada) describe 'A VLSI high performance multi-tasking computer architecture'. The paper presents a multi-tasking, multi-processor architecture implemented as a procedural flow processor. A major design objective in the development of this processor was that it could be implemented as a single VLSI chip. T h e f i n a l p a p e r is by S . C . W i n t e r {United Kingdom) 'On the physical interconnection of a cube type distributed multi-processor' The paper is concerned with the interconnection characteristics of processing elements in a cube type distributed array of processing elements.
514
DR. MALOOIM J. TAYLOR Deparhnent of Computer Science University of Liverpool Liverpool L69 3BX United Kingdom
Malcolm Taylor is a Senior Lecturer in the Department of Computer Science at Liverpool University, UK.
He was previously employed as a hardware
specialist (1976-1978) and then as a lecturer (1978-1985), both at Liverpool University.
His research interests include microprocessor applications,
hardware design techniques and knowledge based systems.
He holds a BSc in
Electrical Engineering frcm Salford University, UK as well as an MSc and PhD in digital electronics from Manchester University, UK.
He is a chartered
engineer and a me~ber of the Institute of Electrical and Electronic Engineers (USA), the Institution of Electrical Engineers (UK), and the British (km~ter Society.