SPICE modeling of single photon avalanche diodes

SPICE modeling of single photon avalanche diodes

Sensors and Actuators A 153 (2009) 197–204 Contents lists available at ScienceDirect Sensors and Actuators A: Physical journal homepage: www.elsevie...

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Sensors and Actuators A 153 (2009) 197–204

Contents lists available at ScienceDirect

Sensors and Actuators A: Physical journal homepage: www.elsevier.com/locate/sna

SPICE modeling of single photon avalanche diodes F. Zappa ∗ , A. Tosi, A. Dalla Mora, S. Tisa Politecnico di Milano, Dipartimento di Elettronica e Informazione, Piazza Leonardo da Vinci 32, I-20133 Milano, Italy

a r t i c l e

i n f o

Article history: Received 16 December 2008 Received in revised form 3 April 2009 Accepted 15 May 2009 Available online 23 May 2009 Keywords: SPICE modeling Single photon avalanche diode (SPAD) Active-quenching circuit Avalanche process

a b s t r a c t In this paper we present a comprehensive circuit model for single photon avalanche diodes (SPADs), implemented into two different CAD circuit simulation environments (PSpice and Spectre), that fully describes detector behavior in the above-breakdown (Geiger-mode) operation. In particular, the SPICE modeling accurately simulates the ignition of the detector due to a photon absorption, the fast avalanche current build-up, the self-sustaining charge-multiplication process, and the self-quenching of the avalanche pulse. The model works within both passive and active quenching circuits and it deals correctly with both single-photon and photon-burst excitation. We show how to experimentally extract the required model parameters from any SPAD detector and how to input them into the circuit simulators. We discuss different operating regimes and we present various case studies that validate the modeling and quantitatively prove its accuracy. © 2009 Elsevier B.V. All rights reserved.

1. Introduction This paper completes our review on single photon avalanche diodes (SPADs) and arrays and related electronics, published in refs. [1] and [2], respectively. Essentially, SPADs are microelectronic junctions biased at a voltage, VA , above the breakdown voltage, VB . At that bias, the electric field is so high that a single charge carrier injected in the depletion layer can trigger a self-sustaining avalanche current, which swiftly rises to a macroscopic level in the milliampere range. If the primary carrier is generated by a photon, the avalanche-pulse leading edge marks the photon arrival time, with a precision of few tens of picoseconds. After the SPAD has been triggered, current keeps flowing until the avalanche is quenched by lowering the bias voltage down to or below VB . Then the bias voltage must be restored, in order to be able to detect another photon. These operations require suitable electronics [3], which has to sense the leading edge of the avalanche current, quench the avalanche by lowering the bias near or below breakdown, generate a standard output pulse synchronous with the avalanche build-up, and finally restore the photodiode to above breakdown. In order to accurately simulate the behavior and predict the performances of both active quenching circuit and passive read-out electronics, during the design phase it is compulsory to employ a detailed model of the SPAD detector. To the best of our knowledge, only two models have been presented in literature: the former SPAD model [3] is very simple and it has been used for years, the latter deals with a specific issue of the SPAD behavior, i.e. the depen-

∗ Corresponding author. Tel.: +39 0223996149; fax: +39 022367604. E-mail address: [email protected] (F. Zappa). 0924-4247/$ – see front matter © 2009 Elsevier B.V. All rights reserved. doi:10.1016/j.sna.2009.05.007

dence of the device capacitance on the reverse bias [4]. In ref. [5], we proposed a simple model able to self-sustain and self-quench the avalanche current. In this paper we fully describe the extended version of the model, which deals also with the forward region and the so-called second breakdown (due to edge-junction or punchthrough effects), and we detail how to implement such model into commercially available CAD simulators. Refs. [6] and [7] dealt with the avalanche build-up, in order to assess the statistical processes describing the spread of the avalanche multiplication process, from the primary photogenerated carrier to the whole active area, and to investigate the contribution of active area dimension and junction thickness to the photon absorption time-jitter. Instead, in this paper we focus on the macroscopic description of the current build-up, from the diode terminals, taking into account both detector and circuit electronic parameters. Indeed it is the proper circuital modeling that can provide the electronic designer the tools to optimize the pairing between detector and front-end electronics, in order to achieve the best performance. 2. Basic SPAD model and circuits The simplest quenching circuit, shown in Fig. 1, is commonly called passive quenching circuit (PQC) and it was employed since the early studies on avalanche breakdown in p–n junctions by Haitz [8]. When no current is flowing, the SPAD is reverse biased to VA above breakdown; as soon as a photon is absorbed and ignites the multiplication process, the avalanche current quickly rises to few milliampere, generating a voltage drop across RL (usually few hundreds k) that eventually reduces the junction voltage, thus quenching the multiplication process. A fast discriminator may be

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Fig. 3. SPAD I–V characteristics (with the typical bifurcation above breakdown) and passive (PQC) load characteristic.

Fig. 1. Schematic circuit of a typical passive quenching circuit (PQC) [3].

used to sense the steep onset of the avalanche current across a small sense resistor RS and provide a standard output pulse, synchronous with the photon arrival time. Fig. 2 shows the implementation of the simple SPAD model so far employed [2] inside the circuit of Fig. 1, with some parasitic components like junction capacitance, CAC , and stray capacitances from anode and from cathode to substrate, CAS and CCS , respectively (typically of few picofarad). The diode resistance RD is given by the sum of the spacecharge resistance and the resistance of neutral regions crossed by the avalanche current. RD depends on the device structure and can be around 400  for thick SPADs (10–30 ␮m depleted region thickness) [3], with wide active area (200 ␮m diameter or more), or from few hundreds up to few thousands ohm for thin SPADs (0.5–1 ␮m depleted region thickness), with relatively small active area (10–50 ␮m diameter) [3]. Let us analyze the circuit with the help of Fig. 3. When no current is flowing, the diode current ID is zero and the diode voltage VD equals the total reverse bias VA . The triggering of an avalanche (ignited by a photon absorption, a thermally generated electronhole pair, or a tunneling event) is simulated by the closure of the n-MOS switch (Fig. 2), which mimics the SPAD ignition. In few hundreds of picoseconds, before the diode voltage changes, the current reaches the peak value IPK : the bias point (Fig. 3) moves from Q to

M. Then, the current discharges the capacitors and ID (t) and VD (t) exponentially decrease to the final values If and Vf [3] of point N. After the triggering event, the time-dependent current flowing through the detector in Fig. 1 can be written as [3]: ID (t) =

VD (t) − VB VEX (t) = RD RD

(1)

where VEX (t) is the instantaneous excess bias above breakdown at which the SPAD is biased. Typical waveforms of the SPAD current and voltage are shown in Fig. 4. Since the stray CAS in Fig. 1 can be neglected due to the low RS value between anode and ground, the quenching time constant  q is approximately set by the total parallel capacitance CAC + CCS and by the parallel of RD and RL (approximately equal to RD since RL  RD ), that is: q = (CAC + CCS )(RL //RD ) ∼ = (CAC + CCS )RD

(2)

When the decaying VD (t) approaches VB , the intensity of ID (t) becomes low and the number of carriers crossing the high field region is consequently small. Since the avalanche mechanism is a statistical process, it may well happen that none of the few carriers impact an atom of the crystal, thus stopping the impact multiplication. From experimental data, one can find that the probability of zero multiplied carriers becomes significant when the current gets below 100 ␮A [3]. Therefore, for our circuit model, we can assume that the avalanche is self-sustained until the current reaches 100 ␮A, at which point the process self-quenches. When the diode self quenches, the switch in the model of Fig. 2 becomes open and the two capacitors CAC and CCS slowly recharge to VA . The exponential recovery has a time constant given by: r ∼ = RL (CAC + CCS )

(3)

During the recharge, the time constant is slow because it is dominated by RL which is much larger than RD . For instance, with typical

Fig. 2. Traditional SPAD basic model as implemented in PSpice in the PQC of Fig. 1. The closing of the transistor switch mimics the avalanche triggering [2].

Fig. 4. Typical voltage (a) and current (b) waveforms in the PQC of Fig. 1.

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order to optimize the quenching and reset intervention of the electronics. 3. Enhanced SPAD model

Fig. 5. Schematic diagram of a mixed passive-active quenching circuit.

values for discrete devices, RD = 1 k, RL = 100 k, CCS = 1 pF and CAC = 4 pF, we obtain  q = 5 ns while  r = 500 ns. Although the voltage transient at the SPAD cathode is slow (see Fig. 4), the voltage signal across the sense resistor RS is much steeper because the stray capacitance CCS provides the initial charge and the avalanche signal propagates through RS . In order to have an intense voltage pulse across RS , CCS must be comparable to or greater than the diode capacitance CAC . Otherwise only a small fraction of the avalanche current will flow through RS , since the current discharging CCS flows through the loop including RS , whereas most of the current discharging CAC flows through the diode internal path (see Fig. 2). With RS = 50  the typical voltage peak ranges from tens to hundreds of millivolt. It is well known and accurately discussed in literature that passive quenching suffers from severe limitations [3]. For this reason, the active quenching circuit (AQC) concept was introduced. The basic idea is to sense the rise of the avalanche pulse and to react back on the SPAD by forcing a quench and a reset transition in few nanoseconds, with a low-impedance driver. Other approaches try to minimize the avalanche charge flowing through the diode by means of a mixed passive–active quenching approach [9]. Fig. 5 shows the block diagram of a mixed passive-active quenching circuit [9]. During a quiescent state no current flows through any of the resistors, the reset and quench switches are open and the SPAD is reverse biased at VA . As soon as an avalanche is ignited, the voltage drop across RS triggers the comparator, while the RL resistor provides an initial passive quenching, eventually completed by the active loop, which rises the SPAD anode voltage to ensure complete quenching. After a hold-off time, the active loop applies a fast reset transition preparing the SPAD for a new photon. By minimizing the charge in current pulses through the SPAD, power dissipation and charge trapping are reduced [3]. The former problem could cause the breakdown voltage to drift, thus causing the detector response to vary (both in terms of detection efficiency and noise). The latter problem is responsible for the delayed release of trapped charges that can retrigger the detector, thus providing false ignitions (also known as afterpulsing) and causing non-linear distortion in photon counting [8]. By shortening the time duration of the avalanche, optical crosstalk is also reduced [1] because hot-carrier photon-emission is minimized. Furthermore, the mixed approach gives flexibility in the choice of the passive load, since the initial passive quenching action is anyhow completed by the active quenching. By reducing the load resistor RL one can achieve a quicker detection of the photon. In order to properly design the quenching and reset electronics, it is of the utmost importance to accurately simulate the electrical behavior of the detector during triggering, self-quenching, activequenching and recovery transitions. Waveforms of current through both the external sense resistor and, most important, within the detector junction must be accurately and separately estimated in

The model shown in Fig. 2 relies on a simple switch that controls the SPAD triggering through an external artificial stimulus (“Photon”) of proper duration. Therefore, in this model, the quenching of the detector was managed exclusively by the user stimulus and did not take into account the quenching circuit. Furthermore, that basic model neglects other important effects: e.g. different excess biases lead to different quenching times, hence to model this effect the stimulus duration must be trimmed by the user, depending on SPAD operation. Moreover, as explained in Section 2, the diode should self-quench by itself, when the current drops below a threshold value. Otherwise, the model would introduce artifacts in the detector behavior (e.g. avalanche process would stay on, current would keep flowing, the SPAD could not detect subsequent photons, etc.). Moreover, if the SPAD model is not accurate, the developed AQC may not properly operate the detector (e.g. it could fail to quench the SPAD, the avalanche charge may not be minimized, etc.), thus resulting in either a non-optimal detection system or, possibly, in the ultimate destruction of the detector. In Fig. 6, we present the new model, able to solve all those issues and to add many other advantages. It is built with standard components from the Orcad Cadence PSpice [10] AnalogLib library and can be adapted to most simulators like Virtuoso Spectre by Cadence [11]. Again, CAC is the junction capacitance, while CCS and CAS are the stray capacitances from cathode and anode contacts to substrate. Depending on the SPAD sample under investigation and on the experimental set-up, the diode substrate (“Sub” pin in Fig. 6) can be left floating or can be electrically connected to the proper node (either the metallic package or the SPAD anode). We model the current-voltage (I–V) curve of the SPAD above breakdown not just as a simple straight line, but as a more realistic curve, through a piece-wise linear approximation, which interpolates the real characteristic [5]. Starting from the measured SPAD I–V plot, the user chooses some points along the curve, possibly where the slope perceptibly changes, paying particular attention to the typical avalanche current span (below 10 mA). The first value VD1 equals the breakdown voltage VB (when ID1 = 0). The following couples of values IDi , VDi (e.g. i ranging from 2 to 6) are the current and voltage coordinates of such selected points along the experimental curve.

Fig. 6. SPICE modeling of the SPAD. Thanks to the SSELF switch, the avalanche process self-sustains. Two additional branches model the SPAD when either forward (subscript “F”) or reverse (“R”) biased above edge-breakdown.

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In Fig. 6, the nonlinear voltage generator VSPAD models the characteristic of the detector above breakdown. It is implemented into the Property Editor of Orcad PSpice, through the following code:

Some parameters are entered by the user (VD1 –VD6 and ID2 –ID6 since ID1 is assumed to be zero), other are computed by the simulator (e.g. the differential resistances, Ra –Re , along the curve). The “Curve” expression selects the working interval by checking the instantaneous detector voltage VD . Initially, let us ignore the two branches comprising the SR and SF switches, since they are open when the SPAD is reverse biased below the second-breakdown voltage, VR . When the SPAD is quiescent, the voltage-controlled switch STRIG and the current-controlled switch SSELF are open, thus the SPAD experiences the whole reverse voltage (VA of Figs. 1 and 5) applied between cathode and anode by the external electronics. Then the “Photon” input is triggered by means of a short pulse (e.g. <1 ns) to simulate an avalanche event: the two resistors R1 and R2 allow the user to apply either a voltage or a current stimulus. When the positive input of STRIG exceeds its threshold voltage, the switch closes and mimics the avalanche ignition. The current steeply rises to few milliampere, thus exceeding the threshold current level of SSELF (set to Iq , e.g. 100 ␮A). At this point, even if STRIG is released, SSELF is able to self-sustain the avalanche flow until the current lowers below Iq . Therefore, the

Fig. 7. Proposed complete model implemented into Virtuoso Spectre [12].

only requirement for the “Photon” pulse excitation is to be shorter than the avalanche transient, since the interruption of the current is set by SSELF , with no need of any user intervention (contrary to the model in Fig. 2).

It must be also noticed that thanks to the S1 switch (with threshold voltage VTS1 = −VB ), controlled by the voltage between anode and cathode, the “Photon” signal effectively drives STRIG only if the reverse voltage is above breakdown, otherwise it is shunted for avoiding unreal ignitions out of Geiger-mode regime. We further enhanced the model in order to accurately simulate SPADs behavior outside of the Geiger-mode operation. Specifically, we took into account also the forward bias operation and the socalled second breakdown, due to edge-junction or punch-through effects. Being undesirable regions of operation, we decided to model both regions through a simple single-slope straight I–V curve. The forward regime is described by means of a DC voltage generator VF of about 0.6–0.9 V, an RF series resistor, and a voltage-controlled SF switch (with threshold set to 0 V). When the anode voltage is higher than the cathode voltage, but lower than VF , SF is open and no current flows. If VAC rises above VF , the switch closes thus causing a current flow across RF . This crude approximation is sufficient for modeling the SPAD, and it does not introduce stray components as a standard diode would instead do. The second breakdown is modeled in a similar way: when the reverse voltage VAC exceeds the second breakdown voltage VR , the SR switch (with threshold set to 0 V) closes, the diode is in permanent breakdown, with a series resistance RR , and the “Photon” input is inhibited by means of S2 (with threshold equal to VR ). We also implemented the model in other circuit simulators, like Spectre in the Virtuoso environment by Cadence, for the simulation of integrated AQCs. For that circuit simulator, the model must be slightly modified, as shown in Fig. 7, in order to access components (controlled switches and sources) available in the AnalogLib library. Since no current-controlled switch is available, SSELF is replaced by a voltage-controlled one, coupled to a sense resistor. The resistor value and the switch threshold are chosen to achieve the desired avalanche current threshold Iq . Moreover, the non-linear VSPAD generator of Fig. 6 has to be split into two different components, VSPAD and RSPAD , both based on the behavioral bsource description, which allows to express the value of a resistance, capacitance, voltage or current source as a combination of node voltages, branch currents, time expressions, and built-in Spectre

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expressions. The SPAD piecewise linear I–V curve is thus obtained as the series of a piecewise resistor and a piecewise voltage source, as listed in the following code:

4. Parameters extraction In order to properly simulate the SPAD with the enhanced models, it is necessary to accurately estimate all parameters. In fact, the series resistance of the diode not only determines the duration of the quenching transition, but its value must be taken into account to properly size the comparator threshold of the external mixed passive–active circuit, since it forms a voltage divider with the external ballast resistor. Moreover, stray capacitances and junction capacitance are crucial for the estimation of both quenching and reset transitions in all quenching approaches. Finally, breakdown voltage, and possibly its dependence on temperature, must be known to correctly predict detector behavior at different excess biases and operating conditions. Breakdown voltage and series resistance can be easily measured by means of an analog I–V curve tracer, such as the Tektronix mod. 370B we used. Digital tracers are nowadays more common, but they expose the user to erroneous measurements, since they usually apply DC biases that mask the real behavior of the SPAD near the breakdown knee. Instead, since an analog tracer applies sinusoidal or triangular voltage sweeps to the diode terminals, it allows to highlight the two distinct branches slightly above break-

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down, as shown in Fig. 3. One branch is traced when the SPAD is not yet ignited (no current is flowing) while the other when the avalanche current reaches regime (i.e. the typical “avalanching” I–V

characteristic), since during some sweeps the SPAD stays off whereas during some others it gets ignited. Of course, the higher the dark count rate of the detector (i.e. the number of ignitions due to thermal generation processes or tunneling effects) the fainter the off-branch. The breakdown voltage VB can be extrapolated as the intersection between the two branches, whereas the diode series resistance RD is the slope of the on-branch. For the extraction of both stray and junction capacitances a precise capacitance meter is needed, since their values can be as low as few hundreds of femtofarad. When the substrate is floating, CSPAD results from the parallel of CAC with the series CAS and CCS . By a clockwise rotation of SPAD connections (anode, cathode and substrate) to the capacitance meter, it is possible to measure:

⎧ CAS CCS ⎪ CSPAD1 = CAC + ⎪ ⎪ + CCS C ⎪ AS ⎪ ⎨ CSPAD2 = CAS +

CAC CCS CAC + CCS

= CCS +

CAS CAC CAS + CAC

⎪ ⎪ ⎪ ⎪ ⎪ ⎩C

SPAD3

(4)

By solving the system, CAC , CAS and CCS can be extracted. Fig. 8 reports the dependence of CSPAD1 on the reverse voltage applied to a silicon SPAD with a 50 ␮m active-area diameter. At 0 V we measured CSPAD1 = 4.33 pF, CSPAD2 = 2.98 pF and CSPAD3 = 2.22 pF. From Eq. (4) we obtain CAC = 3.77 pF, CAS = 2.35 pF and CCS = 0.77 pF. Since only CAC changes with the reverse voltage, it is possible to obtain the plot shown in Fig. 8. The decrease of CAC near breakdown (VB = 21.54 V) is almost negligible, only about 20 fF/V, and modeling of such dependence gives indeed negligible improvements in the simulations. Therefore we preferred not to introduce such a further complication into the model. 5. Experimental validation

Fig. 8. Measured capacitance CSPAD1 of a 50 ␮m-SPAD (diamonds) vs. applied reverse bias and computed junction capacitance CAC (circles).

In order to validate the model, we crosschecked simulations vs. measurements with different circuits and operating conditions. In the following examples, we refer to a silicon 50-␮m diameter SPAD [12], with parameters listed in Table 1. Static simulations accurately reconstruct the I–V curve, as shown in Fig. 9, spanning from forward to reverse bias, both above breakdown and beyond second breakdown. First let us consider the simple passive quenching circuit shown in Fig. 10: RS = 50  is the scope input used for signal readout,

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F. Zappa et al. / Sensors and Actuators A 153 (2009) 197–204 Table 1 Parameters extracted from the 50-␮m SPAD under investigation. Average RD Piecewise I–V: VD1 = VB VD2 , ID2 VD3 , ID3 VD4 , ID4 VD5 , ID5 VD6 , ID6 VF RF VR RR

390  21.54 V 21.90 V, 250 ␮A 22.40 V, 1 mA 24.20 V, 5 mA 26.00 V, 10 mA 27.00 V, 14 mA 0.9 V 47  35 V 100 

RL = 220 k is the quenching resistor, CSTRAY = 1 pF is the stray capacitance between cathode and ground. CSTRAY forces the current pick-up through RS , while reducing the current loop through the diode capacitance. The SPAD has a breakdown VB = 21.54 V and it is constantly biased at a VA chosen to obtain the desired VEX = VA − VB . In the simulation we mimic the photon arrival via the Vph pulse generator. In order to check the validity of the model when moving from below-breakdown regime to Geiger-mode regime and further beyond the second breakdown, we applied a voltage ramp to VA (see Fig. 10) from 20 V (lower than breakdown, VB = 21.54 V)

Fig. 11. Simulation of SPAD ignitions at progressively increasing reverse bias: below breakdown (left side of the plot), above breakdown (central area, with clear ignitions) and beyond second breakdown (right side, with no ignitions).

Fig. 9. Comparison between the simulated I–V characteristic (line) and the measured one (squares).

to 40 V (higher than the second breakdown VR = 35 V) in 1 ms, during which the Vph pulse generator simulates photon arrivals every 100 ␮s. Fig. 11 shows the results, in terms of avalanche current (as sensed by RS ) and SPAD voltage. As it can be seen, the model correctly predicts that the detector is ignited only within the Geiger-mode region (between VB and VR ). Below breakdown no avalanche current flows and the SPAD voltage follows the linear ramp applied to VA . Above the second breakdown the SPAD is insensitive to photon ignitions, its voltage remains almost constant to VR , while the current slowly increases, due to the RR resistance of the second breakdown process. Fig. 12 compares simulations and measurements of the avalanche pulse signal, at three different excess voltages: the higher the VEX , the higher is the peak and the longer is the pulse duration. Note also the current self-quenching, at a voltage threshold equal to Iq RS (see inset of Fig. 12). Thanks to the non-linear resistor implemented into the model, a very good matching is obtained, both in terms of avalanche peak amplitude and overall pulse waveform. It is important to note that the avalanche current flowing inside the SPAD (through its junction) is remarkably different from the current flowing (externally) through the sensing resistance RS . The reason being that within the SPAD the CSPAD1 capacitor (e.g. in case of floating substrate, the parallel of CAC with the series of CAS and CCS ), together with the CSTRAY capacitance, forms a capacitive current divider. The actual current flowing through the SPAD junction

Fig. 10. Passive quenching circuit employed to crosscheck measurements vs. simulations. The substrate is floating.

Fig. 12. Measurements (dots) vs. simulations (lines) of the avalanche voltage pulse across RS , at different excess bias applied to the SPAD.

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Fig. 13. Avalanche current as actually flowing through the SPAD junction (thick line) and as collected by the external sensing resistance RS (thin line). Note that the former can be neither easily inferred by the latter, nor measured. Only the modeling allows to quantify it.

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Fig. 15. Measured gating pulse (thick line), measured (dots) and simulated (thin line) anode signal of the circuit in Fig. 14. The model accurately matches not only the avalanche, but also the spurious spikes due to the rising- and falling-edges of the gate pulse.

is much higher than the one measured through RS . The difference is large if CSTRAY = 0 pF, as proved by Fig. 13. Therefore, assessing the avalanche charge responsible to afterpulsing by means of measured (or simulated) current through RS leads to a dramatic underestimation of the problem. With CSTRAY = 10 pF, the total charge that flows through the junction is 61 pC while only 50 pC flow through RS . With CSTRAY = 1 pF, charges are 16 pC and 5 pC, respectively. With no external CSTRAY , the difference is even worst, 11 pC and just 0.2 pC, respectively, i.e. an underestimation of a factor 55. Again, only an accurate SPAD circuital modeling, as herewith proposed, allows the designer to estimate such information, otherwise not measurable (because it is “internal” to the detector). Then we investigated the operation of the SPAD in gated-mode operations. In this configuration the device is biased below breakdown (e.g. VA = 21 V since VB = 21.54 V) and then it is quickly enabled above the breakdown level by applying a steep pulse (nanosecond rise time). Fig. 14 shows the typical circuit with DC-coupled gating pulse (VGATE ) and AC-coupled readout through CS via the scope impedance RS [3]. Values are RL = 220 k, RS = 50 , CS = 10 pF. Fig. 15 proves the effectiveness of the model to accurately predict not only the avalanche trigger, but also the two spurious couplings due to the fast rising and falling edges of the gate signal (3-ns transition time, 20-ns duration, 5-V amplitude). Since the detection

Fig. 14. Gated passive quenching circuit employed for crosschecking measurements vs. simulations. The substrate is floating.

Fig. 16. Measured (squares) and simulated (lines) cathode voltage (top) and avalanche current (bottom) waveforms when the SPAD is operated by an integrated AQC. Current spikes during reset transition (at about 80 ns) are underestimated by the simulator due to a poor modeling of the high-voltage p-channel transistors of the AQC.

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simulation of the second breakdown effect and the forward bias. All parameters can be easily extracted from any available SPAD, thus allowing the implementation of the model into any detector fabrication technology. This model significantly improves the basic models employed so far, which are affected by many limitations and are unable to cope critical SPAD operating conditions or properly simulate the SPAD when operated by complex front-end electronics, like active quenching circuits. References

Fig. 17. Measured (squares) and simulated (line) current waveforms when the SPAD is operated by an integrated AQC at 5 V-excess bias and a second triggering occurs during the reset phase.

threshold of the following electronics must be set slightly higher than the first spike, in order to avoid spurious counts, a reliable simulation model is needed to properly design the electronics, thus exploiting the best performance of the detector. The need for a reliable modeling becomes even more severe when the SPAD is connected to a front-end circuitry far more complex than the simple passive quenching. For this reason we tested the model also when operating the SPAD with an active quenching circuit (AQC). We used the integrated AQC reported in ref. [13], since both chips and complete CAD schematics were available. Fig. 16 shows the SPAD cathode voltage and the avalanche current as sensed by the pickup 50- resistance, at two excess biases. Again, measurements and simulations match well, apart from an underestimation of the spurious capacitive couplings during the reset transition. After an in-depth investigation, we ascertained that such minor mismatch was not due to the SPAD model but to an incomplete modeling of the high-voltage p-channel transistors in the AQC responsible for the SPAD reset. Finally we tested the SPAD model in very critical situations, when the detector is triggered exactly during AQC transitory conditions. Such unpredictable occurrences could easily cause failures of the electronics, if not carefully considered and properly simulated in the design phase. For example, Fig. 17 shows the behavior of the integrated AQC under investigation when a second ignition happens during the reset transition of a previous SPAD triggering. Simulations match measurements and show, besides spurious peaks, that the regular (first) current pulse is followed by the second one, with prolonged duration and flattened peak. Such non standard current pulse has many detrimental effects on detector power dissipation and afterpulsing, and also on AQC power dissipation, quenching reliability, and photon counting linearity (non constant hold-off duration). 6. Conclusion We thoroughly discussed a complete model for single photon avalanche diodes that we implemented into Orcad PSpice and Virtuoso Spectre circuit simulators. The model is able to accurately predict the avalanche self-sustaining characteristics until the current reduces below a technology-dependent threshold level. The SPAD is modeled through a non-linear series resistance above breakdown and, specifically, it is implemented by means of a piecewise linear approximation. The extended model allows also the

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Biographies Franco Zappa was born in Milano, Italy, in 1965. Since 1998 he is associate professor of electronics at Politecnico di Milano. In 1989 he graduated summa cum laude in electronics engineering and in 1993 he received the PhD degree in electronics at Politecnico di Milano. His research interests are the design and applications of single photon avalanche diodes in the visible and near-infrared wavelength ranges, and the design of photodetector arrays for fast imaging and the related electronics. He is actually working on the testing of VLSI chips by means of the time-resolved measurement of hot-carrier luminescence emission and on the CAD modeling of such luminescence into MOSFETs. He was awarded by three international patents about integrated electronics and devices for single-photon detection. He coauthored about 80 technical papers. Alberto Tosi was born in 1975 in Borgomanero, Italy. He graduated summa cum laude in electronics engineering in 2001 and he received the PhD degree in information technology engineering in 2005 at Politecnico di Milano (Italy). Since 2006 he is an assistant professor at Politecnico di Milano, Italy. In 2004 he was a summer student at IBM T. J.Watson Research Center, Yorktown Heights, NY, working on the experimental investigation and testing of VLSI CMOS circuits by means of single-photon detectors and imaging arrays. He currently investigates on visible and near-infrared single-photon detectors (Silicon, Germanium and InGaAs detectors) and the related electronics for high-resolution timing acquisitions. Alberto Dalla Mora was born in Fiorenzuola d’Arda, Italy, in 1981. He graduated summa cum laude in electronics engineering in 2006 at Politecnico di Milano, where he is a Ph.D. student in information technology engineering since 2007. His main research interests regard the electronics development for visible and near-infrared single photon avalanche diodes in fast gating regime and at high count rate for applications in biomedical engineering and telecommunications. Simone Tisa was born in Milano, Italy, in 1977. He received the MSc. degree (summa cum laude) in electronics engineering from Politecnico di Milano in 2001, and the PhD in electronics in 2006 from the same university. His research interests are connected with the use of single-photon detectors and active-quenching circuits for ultra-fast imaging applications in astrophysics, and with the design of bidimensional arrays of single photon avalanche diodes with integrated electronics for the acquisition of time resolved images at single-photon level.