- Email: [email protected]
Stability of indium-oxide thin-film transistors by reactive ion beam assisted deposition
Thin Solid Films 517 (2009) 6341–6344
Contents lists available at ScienceDirect
Thin Solid Films j o u r n a l h o m e p a g e : w w w. e l s ev i e r. c o m / l o c a t e / t s f
Stability of indium-oxide thin-film transistors by reactive ion beam assisted deposition Y. Vygranenko a,⁎, K. Wang b, R. Chaji b, M. Vieira a, J. Robertson c, A. Nathan d a
Electronics Telecommunications and Computer Eng., ISEL, Lisbon, Portugal Electrical and Computer Eng., University of Waterloo, Waterloo, Ontario, Canada N2L 3G1 Engineering Department, University of Cambridge, Cambridge, CB3 0FA, United Kingdom d London Centre for Nanotechnology, UCL, London WC1H 0AH, United Kingdom b c
a r t i c l e
i n f o
Available online 25 February 2009 Keywords: Electronic devices Indium oxide Silicon oxide
a b s t r a c t This work reports on the performance and stability of bottom-gate In2O3-TFTs with PECVD silicon dioxide gate dielectric. A highly-resistive amorphous In2O3 channel layer was deposited at room temperature by reactive ion beam assisted evaporation (IBAE). The field-effect mobility of the n-channel TFT is 33 cm2/V-s, along with an ON/OFF current ratio of 109, and threshold voltage of 2 V. Device stability was demonstrated through measurement of the threshold voltage shift during long-term gate bias-stress and current stress experiments. Device performance, including stability, together with low-temperature processing, makes the indium-oxide TFT an attractive candidate for flexible transparent electronics, and display applications. © 2009 Elsevier B.V. All rights reserved.
1. Introduction Thin-film transistors (TFTs) based on transparent oxide semiconductors (TOSs) are becoming attractive for large-area electronics due to their low-temperature processing, and potentially better device performance and stability compared with the amorphous silicon and organic counterparts. To date, single oxides such as zinc oxide (ZnO) [1], tin dioxide (SnO2) [2], and indium oxide (In2O3) [3] as well as binary or ternary amorphous oxide compounds such as zinc–tin oxides (a-ZTO) [4], indium–zinc oxides (a-IZO) [5], indium–gallium– zinc oxide (a-IGZO) [6,7], and zinc–indium–tin oxide (a-ZITO) [8] have been used as channel layer materials. These oxide transistors have demonstrated field-effect mobility (μFE) generally in a range 5 to 50 cm2/V-s, which is much higher than μFE of ~1 cm2/V-s in a-Si:H TFTs. Thus, TOS TFTs can be used not only as switches in liquid crystal displays, but also as analog current drivers in active matrix OLED (AMOLED) displays [9]. With the latter, the long-term stability of the TFT under bias stress is of crucial importance since device instability may lead to variations in the pixel brightness. However, knowledge on stability of TOS-TFTs is very limited, and not much has been disclosed to date in the published literature. First studies on stability were performed on ZnO-TFTs with thermally-grown silicon dioxide gate insulator under gate bias stress [10]. The observed shift of the transfer characteristics at low biases was ascribed to charge trapping at/near the channel/insulator interface, while the degradation of the subthreshold slope at higher
⁎ Corresponding author. Tel.: +351 21 831 7287; fax: +351 21 831 7114. E-mail addresses: [email protected], [email protected] (Y. Vygranenko). 0040-6090/$ – see front matter © 2009 Elsevier B.V. All rights reserved. doi:10.1016/j.tsf.2009.02.108
biases and longer stress times was attributed to defect state creation within the ZnO channel material. Similar behavior was observed for ZnO TFTs with a-SiN gate insulator deposited by low-pressure chemical vapor deposition (LPCVD) [11]. The observed instability, however, was found to be reversible at room temperature to nearoriginal values without any need for thermal or bias annealing. Moreover, it has been shown that the composition of the a-ZTO compound can be tuned to enhance the device stability [12]. For example, optimized devices with a composition of [Zn]:[Sn] = 36:64 have demonstrated a relative change of the saturated field-effect mobility of less than 1% and threshold voltage shift of 320 mV after 1000 h of operation [13]. In this letter, we report on the performance and stability of bottom-gate In2O3 TFTs. A highly-resistive amorphous In2O3 channel layer was deposited at room temperature by reactive ion beam assisted evaporation (IBAE), while PECVD silicon dioxide was used as a gate dielectric. PECVD dielectrics are more attractive because of process maturity and industrial compatibility for low cost, large-area fabrication.
2. Experimental details The IBAE system used here combines a traditional e-beam evaporator and an independent oxygen ion source [14]. The distance between substrate and evaporation source (high-purity indium) is fixed at 35 cm. Film properties were tailored by adjusting the deposition rate, oxygen ion energy and flux. Fig. 1 shows the resistivity of indium-oxide films on glass substrates as a function of discharge current, which is proportional to the oxygen ion flux. The deposition
6342
Y. Vygranenko et al. / Thin Solid Films 517 (2009) 6341–6344
Fig. 3. Output characteristics of the In2O3 TFT at various VGS.
Fig. 1. Dependence of resistivity of indium-oxide films on discharge current of oxygen ion source. Film thickness is ~ 100 nm.
rate and discharge voltage (which determine average ion energy) were set at 1.7 Å/s and 100 V, respectively. The resistivity of indiumoxide films increases from 102 up to 109 Ω-cm with discharge current increasing in the range from 1.0 to 3.0 Å. In non-stoichiometric indium oxides, the oxygen vacancies act as doubly-charged donors and determine the electronic properties of the material. Our experiments show that the population of oxygen vacancies can be precisely controlled by simply adjusting the oxygen ion beam flux. TFTs with the highest performance were obtained with a highly-resistive amorphous 30-nm-thick In2O3 channel grown at deposition rate of 1.7 Å/s, discharge voltage of 100 V and discharge current of 2.0 Å. A schematic cross-section and a photo-micrograph of the fabricated bottom-gate In2O3 TFT are shown in Fig. 2. The TFTs were fabricated in the following steps. First, an 80 nm Mo was sputtered and patterned on corning 1737 glass substrate to form gate electrodes (Mask #1). Then 200-nm-thick SiOx dielectric layer was deposited at 300 °C by conventional PECVD. This followed with the deposition of 30 nm of indium oxide by IBAE and patterned by conventional photolithography and wet etching (Mask #2). Then, the SiOx layer was patterned to create a via under the gate contact pads (Mask #3).
Finally, a 200 nm Mo film was sputtered and patterned by lift-off to form source and drain contacts as well as contact pads (Mask #4). 3. Results Fig. 3 shows typical output characteristics of the In2O3 TFT with W/L = 100 μm/100 μm (where W and L are the channel width and length, respectively) at different gate-source voltages (VGS). The device shows excellent pinch-off characteristics, which indicate that electron transport in the channel is fully controlled by the gate and drain biases. There is no current crowding at low drain-source biases, indicating that the Mo source/drain contact to the indium-oxide channel is reasonably ohmic.
Fig. 4. Transfer characteristics of the In2O3 TFT at VDS = 0.1 V, 1 V and 10 V, and effective field-effect mobility as a function of the gate-source voltage at VDS = 0.1 V.
Fig. 2. Cross-sectional diagram (a) and micrograph (b) of the In2O3 TFT.
Fig. 5. Threshold voltage shift at various VGS, with source and drain grounded.
Y. Vygranenko et al. / Thin Solid Films 517 (2009) 6341–6344
6343
+10 V and +20 V gate voltages, suggesting that the TFT is highly stable under low gate bias-stress conditions. However, at high gate bias stress, VT shifts significantly towards the negative direction from 2 V to − 3 V after 6000 s stress, regardless of the polarity of the gate bias stress (+30 V and −30 V in this case). To better evaluate the device stability, a long-term current stress experiment was performed with dc and pulsed current. The retrieved shifts of the threshold voltage under these two modes are shown in Fig. 6(a) and (b), respectively. The current source was connected to the TFT in a diode configuration (VGS − VT = VDS) so that the stress current of 1 μA flows nowhere else except through the channel. Under dc current bias stress for a period of 60 h, the VT-shift was very low and up to 0.6 V, primarily because the resulting voltage on the gate was around 1 V. However, no change in VT was recorded during the same stress time when the device was biased by current pulses of 1 μA. The pulse period was divided into 13 ms driving cycle and 3 ms relaxation cycle. During the relaxation cycle, the TFT terminals were grounded. 4. Discussion
Fig. 6. Threshold voltage shift under (a) constant current stress and (b) under pulse current stress. The stress current was 1 µA and the TFT was kept in saturation with VGS − VT = VDS. The jaggedness in the curves stems from the associated measurement technique trying to maintain a constant current.
Fig. 4 shows the transfer characteristics of the same transistor at drain-source voltages (VDS) of 0.1, 1 and 10 V. At VDS = 10 V, the offstate current is ~70 fA, while the on-state current reaches 70 µA at VGS = 20 V yielding an ON/OFF current ratio of ~109. The low off-state current can be attributed to the high resistivity of the IBAE-derived indium oxide and low leakage through the PECVD SiOx gate dielectric. Fig. 4 also shows the field-effect mobility as a function of gate-source voltage. The mobility was retrieved using the transconductance equation for the TFT operating in the linear region (VDS ≪ VGS) gm =
dIDS C μ W = ox FE : dVGS L
ð1Þ
Here, IDS is the drain-to-source current, Cox is the equivalent gate capacitance per unit area (~19 nF/cm2), retrieved from measurement of the capacitance–voltage characteristics. The field-effect mobility increases with gate bias and the value reaches 33 cm2/Vs at VGS = 20 V. The achieved mobility is a factor of 10 higher than the value reported for transistors, fabricated under the similar experimental conditions but having a 100-nm-thick nanocrystalline In2O3 channel [15]. To evaluate the device stability, a long-term bias-stress experiment was performed with stressing conditions as follows: voltage of +10 V, + 20 V, + 30 V or −30 V applied to the gate with the source and drain grounded in order to create a uniform electric field across the channel interface. At every 600-second intervals, the stress test was interrupted to retrieve transfer characteristics of the TFT for device parameter extraction. The measurements were done at a drainsource voltage of 1 V. The total stress time was stretched to 6000 s. Fig. 5 shows the threshold voltage (VT) as a function of stress time for different gate stress voltages. The threshold voltage is fairly steady at
It is well known that in a-Si TFTs, there are two mechanisms causing the TFT instability: defect creation in the channel and charge trapping in the gate dielectric and/or at the insulator/channel interface [16]. Our In2O3 TFTs have demonstrated high stability under low gate bias-stress conditions and under pulse current stress. This result supports the arguments recently reported by Robertson [17] that the behavior of ionic amorphous oxide semiconductors such as In2O3, SnO2, and ZnO is contrasted with that of covalent amorphous semiconductors such as amorphous Si. These oxides have an s-like conduction band minimum, which leads to higher electron mobilities, smaller effects of disorder and bond breaking, and the ability to move the Fermi level well into the conduction band. Thus, unlike a-Si:H transistors, oxide transistors are not subject to the same degree of the bias-stress instability. The observed threshold voltage shift at VGS = −30 V and + 30 V, in which the electric field strength in the gate dielectric exceeds 1 MV/cm, is likely due to defect generation, since charge injection would not cause the VT-shift in the same direction under positive and negative stress biases [18]. An additional argument is that the device did not recover after relaxation without annealing as it would be in the case of charge trapping at the insulator/channel interface [10]. 5. Summary We have demonstrated the n-channel indium-oxide TFTs with silicon dioxide gate dielectric by conventional PECVD with field-effect mobility of 33 cm2 V s, threshold voltage of 2 V, and ON/OFF current ratio of ~ 109 . There is no change observed in the on-state characteristics under low gate bias-stress conditions indicating good stability of the In2O3/SiOx interface. The observed VT-shift at high gate bias stress, when electric field strength in the gate dielectric exceeds 1 MV/cm, can be attributed to defect generation. Under constant current stress of 1 µA, a scenario typical of active matrix organic light emitting diode displays, the observed VT-shift was 0.6 V over a 60 hour stress period. However, the shift was virtually zero under pulse biasing conditions in which the driving and relaxation cycles were 13 ms and 3 ms, respectively. Thus, high-performance and device stability make indium-oxide TFTs promising for flexible, transparent electronics, including active matrix displays. Acknowledgement Authors are grateful to the Portuguese Foundation of Science and Technology through fellowship BPD20264/2004 for financial support of this research.
6344
Y. Vygranenko et al. / Thin Solid Films 517 (2009) 6341–6344
References [1] R.L. Hoffman, B.J. Norris, J.F. Wager, Appl. Phys. Lett. 82 (2003) 733. [2] R.E. Presley, C.L. Munsee, C.H. Park, D. Hong, J.F. Wager, D.A. Keszler, J. Phys. D: Appl. Phys. 37 (2004) 2810. [3] L. Wang, M. Yoon, G. Lu, Y. Yang, A. Facchetti, T.J. Marks, Nat. Matters. 5 (2006) 893. [4] H.Q. Chiang, J.F. Wager, R.L. Hoffman, J. Jeong, D.A. Keszler, Appl. Phys. Lett. 86 (2005) 013503. [5] N.L. Dehuff, E.S. Kettenring, D. Hong, H.Q. Chiang, J.F. Wager, R.L. Hoffman, C.H. Park, D.A. Keszler, J. Appl. Phys. 97 (2005) 064505. [6] K. Nomura, H. Ohta, A. Takagi, T. Kamiya, M. Hirano, H. Hosono, Nature 432 (2004) 488. [7] H. Yabuta, M. Sano, K. Abe, T. Aiba, T. Den, H. Kumomi, K. Nomura, T. Kamiya, H. Hosono, Appl. Phys. Lett. 89 (2006) 112123. [8] M.S. Grover, P.A. Hersh, H.Q. Chiang, E.S. Kettenring, J.F. Wager, D.A. Keszler, J. Phys. D: Appl. Phys. 40 (2007) 1335.
[9] Sang-Hee Ko Park, Chi-Sun Hwang, Jeong-Ik Lee, Sung Mook Chung, Yong Suk Yang, Lee-Mi Do, and Hye Yong Chu, SID Digest of Technical Papers 37 (2006) 25. [10] R.B.M. Cross, M.M. De Souza, Appl. Phys. Lett. 89 (2006) 263513. [11] R. Cross, M. Merlyne De Souza, S. Deane, N. Young, IEEE Trans. Electron Devices 55 (2008) 1109. [12] P. Görrn, P. Hölzer, T. Riedl, W. Kowalsky, J. Wang, T. Weimann, P. Hinze, S. Kipp, Appl. Phys. Lett. 90 (2007) 063502. [13] T. Riedl, P. Görrn, P. Hölzer, W. Kowalsky, Phys. Stat. Sol. 1, 5 (2007) 175. [14] K. Wang, Y. Vygranenko, A. Nathan, Thin Solid Films 515 (2007) 6981. [15] Y. Vygranenko, K. Wang, A. Nathan, Appl. Phys. Lett. 91 (2007) 263508. [16] M.J. Powell, IEEE Trans. Electron Devices 36 (1989) 2753. [17] J. Robertson, Phys. Stat. Sol. (B) 245 (2008) 1026. [18] C. van Berkel, M.J. Powell, Appl. Phys. Lett. 51 (1987) 1094.
Contents lists available at ScienceDirect
Thin Solid Films j o u r n a l h o m e p a g e : w w w. e l s ev i e r. c o m / l o c a t e / t s f
Stability of indium-oxide thin-film transistors by reactive ion beam assisted deposition Y. Vygranenko a,⁎, K. Wang b, R. Chaji b, M. Vieira a, J. Robertson c, A. Nathan d a
Electronics Telecommunications and Computer Eng., ISEL, Lisbon, Portugal Electrical and Computer Eng., University of Waterloo, Waterloo, Ontario, Canada N2L 3G1 Engineering Department, University of Cambridge, Cambridge, CB3 0FA, United Kingdom d London Centre for Nanotechnology, UCL, London WC1H 0AH, United Kingdom b c
a r t i c l e
i n f o
Available online 25 February 2009 Keywords: Electronic devices Indium oxide Silicon oxide
a b s t r a c t This work reports on the performance and stability of bottom-gate In2O3-TFTs with PECVD silicon dioxide gate dielectric. A highly-resistive amorphous In2O3 channel layer was deposited at room temperature by reactive ion beam assisted evaporation (IBAE). The field-effect mobility of the n-channel TFT is 33 cm2/V-s, along with an ON/OFF current ratio of 109, and threshold voltage of 2 V. Device stability was demonstrated through measurement of the threshold voltage shift during long-term gate bias-stress and current stress experiments. Device performance, including stability, together with low-temperature processing, makes the indium-oxide TFT an attractive candidate for flexible transparent electronics, and display applications. © 2009 Elsevier B.V. All rights reserved.
1. Introduction Thin-film transistors (TFTs) based on transparent oxide semiconductors (TOSs) are becoming attractive for large-area electronics due to their low-temperature processing, and potentially better device performance and stability compared with the amorphous silicon and organic counterparts. To date, single oxides such as zinc oxide (ZnO) [1], tin dioxide (SnO2) [2], and indium oxide (In2O3) [3] as well as binary or ternary amorphous oxide compounds such as zinc–tin oxides (a-ZTO) [4], indium–zinc oxides (a-IZO) [5], indium–gallium– zinc oxide (a-IGZO) [6,7], and zinc–indium–tin oxide (a-ZITO) [8] have been used as channel layer materials. These oxide transistors have demonstrated field-effect mobility (μFE) generally in a range 5 to 50 cm2/V-s, which is much higher than μFE of ~1 cm2/V-s in a-Si:H TFTs. Thus, TOS TFTs can be used not only as switches in liquid crystal displays, but also as analog current drivers in active matrix OLED (AMOLED) displays [9]. With the latter, the long-term stability of the TFT under bias stress is of crucial importance since device instability may lead to variations in the pixel brightness. However, knowledge on stability of TOS-TFTs is very limited, and not much has been disclosed to date in the published literature. First studies on stability were performed on ZnO-TFTs with thermally-grown silicon dioxide gate insulator under gate bias stress [10]. The observed shift of the transfer characteristics at low biases was ascribed to charge trapping at/near the channel/insulator interface, while the degradation of the subthreshold slope at higher
⁎ Corresponding author. Tel.: +351 21 831 7287; fax: +351 21 831 7114. E-mail addresses: [email protected], [email protected] (Y. Vygranenko). 0040-6090/$ – see front matter © 2009 Elsevier B.V. All rights reserved. doi:10.1016/j.tsf.2009.02.108
biases and longer stress times was attributed to defect state creation within the ZnO channel material. Similar behavior was observed for ZnO TFTs with a-SiN gate insulator deposited by low-pressure chemical vapor deposition (LPCVD) [11]. The observed instability, however, was found to be reversible at room temperature to nearoriginal values without any need for thermal or bias annealing. Moreover, it has been shown that the composition of the a-ZTO compound can be tuned to enhance the device stability [12]. For example, optimized devices with a composition of [Zn]:[Sn] = 36:64 have demonstrated a relative change of the saturated field-effect mobility of less than 1% and threshold voltage shift of 320 mV after 1000 h of operation [13]. In this letter, we report on the performance and stability of bottom-gate In2O3 TFTs. A highly-resistive amorphous In2O3 channel layer was deposited at room temperature by reactive ion beam assisted evaporation (IBAE), while PECVD silicon dioxide was used as a gate dielectric. PECVD dielectrics are more attractive because of process maturity and industrial compatibility for low cost, large-area fabrication.
2. Experimental details The IBAE system used here combines a traditional e-beam evaporator and an independent oxygen ion source [14]. The distance between substrate and evaporation source (high-purity indium) is fixed at 35 cm. Film properties were tailored by adjusting the deposition rate, oxygen ion energy and flux. Fig. 1 shows the resistivity of indium-oxide films on glass substrates as a function of discharge current, which is proportional to the oxygen ion flux. The deposition
6342
Y. Vygranenko et al. / Thin Solid Films 517 (2009) 6341–6344
Fig. 3. Output characteristics of the In2O3 TFT at various VGS.
Fig. 1. Dependence of resistivity of indium-oxide films on discharge current of oxygen ion source. Film thickness is ~ 100 nm.
rate and discharge voltage (which determine average ion energy) were set at 1.7 Å/s and 100 V, respectively. The resistivity of indiumoxide films increases from 102 up to 109 Ω-cm with discharge current increasing in the range from 1.0 to 3.0 Å. In non-stoichiometric indium oxides, the oxygen vacancies act as doubly-charged donors and determine the electronic properties of the material. Our experiments show that the population of oxygen vacancies can be precisely controlled by simply adjusting the oxygen ion beam flux. TFTs with the highest performance were obtained with a highly-resistive amorphous 30-nm-thick In2O3 channel grown at deposition rate of 1.7 Å/s, discharge voltage of 100 V and discharge current of 2.0 Å. A schematic cross-section and a photo-micrograph of the fabricated bottom-gate In2O3 TFT are shown in Fig. 2. The TFTs were fabricated in the following steps. First, an 80 nm Mo was sputtered and patterned on corning 1737 glass substrate to form gate electrodes (Mask #1). Then 200-nm-thick SiOx dielectric layer was deposited at 300 °C by conventional PECVD. This followed with the deposition of 30 nm of indium oxide by IBAE and patterned by conventional photolithography and wet etching (Mask #2). Then, the SiOx layer was patterned to create a via under the gate contact pads (Mask #3).
Finally, a 200 nm Mo film was sputtered and patterned by lift-off to form source and drain contacts as well as contact pads (Mask #4). 3. Results Fig. 3 shows typical output characteristics of the In2O3 TFT with W/L = 100 μm/100 μm (where W and L are the channel width and length, respectively) at different gate-source voltages (VGS). The device shows excellent pinch-off characteristics, which indicate that electron transport in the channel is fully controlled by the gate and drain biases. There is no current crowding at low drain-source biases, indicating that the Mo source/drain contact to the indium-oxide channel is reasonably ohmic.
Fig. 4. Transfer characteristics of the In2O3 TFT at VDS = 0.1 V, 1 V and 10 V, and effective field-effect mobility as a function of the gate-source voltage at VDS = 0.1 V.
Fig. 2. Cross-sectional diagram (a) and micrograph (b) of the In2O3 TFT.
Fig. 5. Threshold voltage shift at various VGS, with source and drain grounded.
Y. Vygranenko et al. / Thin Solid Films 517 (2009) 6341–6344
6343
+10 V and +20 V gate voltages, suggesting that the TFT is highly stable under low gate bias-stress conditions. However, at high gate bias stress, VT shifts significantly towards the negative direction from 2 V to − 3 V after 6000 s stress, regardless of the polarity of the gate bias stress (+30 V and −30 V in this case). To better evaluate the device stability, a long-term current stress experiment was performed with dc and pulsed current. The retrieved shifts of the threshold voltage under these two modes are shown in Fig. 6(a) and (b), respectively. The current source was connected to the TFT in a diode configuration (VGS − VT = VDS) so that the stress current of 1 μA flows nowhere else except through the channel. Under dc current bias stress for a period of 60 h, the VT-shift was very low and up to 0.6 V, primarily because the resulting voltage on the gate was around 1 V. However, no change in VT was recorded during the same stress time when the device was biased by current pulses of 1 μA. The pulse period was divided into 13 ms driving cycle and 3 ms relaxation cycle. During the relaxation cycle, the TFT terminals were grounded. 4. Discussion
Fig. 6. Threshold voltage shift under (a) constant current stress and (b) under pulse current stress. The stress current was 1 µA and the TFT was kept in saturation with VGS − VT = VDS. The jaggedness in the curves stems from the associated measurement technique trying to maintain a constant current.
Fig. 4 shows the transfer characteristics of the same transistor at drain-source voltages (VDS) of 0.1, 1 and 10 V. At VDS = 10 V, the offstate current is ~70 fA, while the on-state current reaches 70 µA at VGS = 20 V yielding an ON/OFF current ratio of ~109. The low off-state current can be attributed to the high resistivity of the IBAE-derived indium oxide and low leakage through the PECVD SiOx gate dielectric. Fig. 4 also shows the field-effect mobility as a function of gate-source voltage. The mobility was retrieved using the transconductance equation for the TFT operating in the linear region (VDS ≪ VGS) gm =
dIDS C μ W = ox FE : dVGS L
ð1Þ
Here, IDS is the drain-to-source current, Cox is the equivalent gate capacitance per unit area (~19 nF/cm2), retrieved from measurement of the capacitance–voltage characteristics. The field-effect mobility increases with gate bias and the value reaches 33 cm2/Vs at VGS = 20 V. The achieved mobility is a factor of 10 higher than the value reported for transistors, fabricated under the similar experimental conditions but having a 100-nm-thick nanocrystalline In2O3 channel [15]. To evaluate the device stability, a long-term bias-stress experiment was performed with stressing conditions as follows: voltage of +10 V, + 20 V, + 30 V or −30 V applied to the gate with the source and drain grounded in order to create a uniform electric field across the channel interface. At every 600-second intervals, the stress test was interrupted to retrieve transfer characteristics of the TFT for device parameter extraction. The measurements were done at a drainsource voltage of 1 V. The total stress time was stretched to 6000 s. Fig. 5 shows the threshold voltage (VT) as a function of stress time for different gate stress voltages. The threshold voltage is fairly steady at
It is well known that in a-Si TFTs, there are two mechanisms causing the TFT instability: defect creation in the channel and charge trapping in the gate dielectric and/or at the insulator/channel interface [16]. Our In2O3 TFTs have demonstrated high stability under low gate bias-stress conditions and under pulse current stress. This result supports the arguments recently reported by Robertson [17] that the behavior of ionic amorphous oxide semiconductors such as In2O3, SnO2, and ZnO is contrasted with that of covalent amorphous semiconductors such as amorphous Si. These oxides have an s-like conduction band minimum, which leads to higher electron mobilities, smaller effects of disorder and bond breaking, and the ability to move the Fermi level well into the conduction band. Thus, unlike a-Si:H transistors, oxide transistors are not subject to the same degree of the bias-stress instability. The observed threshold voltage shift at VGS = −30 V and + 30 V, in which the electric field strength in the gate dielectric exceeds 1 MV/cm, is likely due to defect generation, since charge injection would not cause the VT-shift in the same direction under positive and negative stress biases [18]. An additional argument is that the device did not recover after relaxation without annealing as it would be in the case of charge trapping at the insulator/channel interface [10]. 5. Summary We have demonstrated the n-channel indium-oxide TFTs with silicon dioxide gate dielectric by conventional PECVD with field-effect mobility of 33 cm2 V s, threshold voltage of 2 V, and ON/OFF current ratio of ~ 109 . There is no change observed in the on-state characteristics under low gate bias-stress conditions indicating good stability of the In2O3/SiOx interface. The observed VT-shift at high gate bias stress, when electric field strength in the gate dielectric exceeds 1 MV/cm, can be attributed to defect generation. Under constant current stress of 1 µA, a scenario typical of active matrix organic light emitting diode displays, the observed VT-shift was 0.6 V over a 60 hour stress period. However, the shift was virtually zero under pulse biasing conditions in which the driving and relaxation cycles were 13 ms and 3 ms, respectively. Thus, high-performance and device stability make indium-oxide TFTs promising for flexible, transparent electronics, including active matrix displays. Acknowledgement Authors are grateful to the Portuguese Foundation of Science and Technology through fellowship BPD20264/2004 for financial support of this research.
6344
Y. Vygranenko et al. / Thin Solid Films 517 (2009) 6341–6344
References [1] R.L. Hoffman, B.J. Norris, J.F. Wager, Appl. Phys. Lett. 82 (2003) 733. [2] R.E. Presley, C.L. Munsee, C.H. Park, D. Hong, J.F. Wager, D.A. Keszler, J. Phys. D: Appl. Phys. 37 (2004) 2810. [3] L. Wang, M. Yoon, G. Lu, Y. Yang, A. Facchetti, T.J. Marks, Nat. Matters. 5 (2006) 893. [4] H.Q. Chiang, J.F. Wager, R.L. Hoffman, J. Jeong, D.A. Keszler, Appl. Phys. Lett. 86 (2005) 013503. [5] N.L. Dehuff, E.S. Kettenring, D. Hong, H.Q. Chiang, J.F. Wager, R.L. Hoffman, C.H. Park, D.A. Keszler, J. Appl. Phys. 97 (2005) 064505. [6] K. Nomura, H. Ohta, A. Takagi, T. Kamiya, M. Hirano, H. Hosono, Nature 432 (2004) 488. [7] H. Yabuta, M. Sano, K. Abe, T. Aiba, T. Den, H. Kumomi, K. Nomura, T. Kamiya, H. Hosono, Appl. Phys. Lett. 89 (2006) 112123. [8] M.S. Grover, P.A. Hersh, H.Q. Chiang, E.S. Kettenring, J.F. Wager, D.A. Keszler, J. Phys. D: Appl. Phys. 40 (2007) 1335.
[9] Sang-Hee Ko Park, Chi-Sun Hwang, Jeong-Ik Lee, Sung Mook Chung, Yong Suk Yang, Lee-Mi Do, and Hye Yong Chu, SID Digest of Technical Papers 37 (2006) 25. [10] R.B.M. Cross, M.M. De Souza, Appl. Phys. Lett. 89 (2006) 263513. [11] R. Cross, M. Merlyne De Souza, S. Deane, N. Young, IEEE Trans. Electron Devices 55 (2008) 1109. [12] P. Görrn, P. Hölzer, T. Riedl, W. Kowalsky, J. Wang, T. Weimann, P. Hinze, S. Kipp, Appl. Phys. Lett. 90 (2007) 063502. [13] T. Riedl, P. Görrn, P. Hölzer, W. Kowalsky, Phys. Stat. Sol. 1, 5 (2007) 175. [14] K. Wang, Y. Vygranenko, A. Nathan, Thin Solid Films 515 (2007) 6981. [15] Y. Vygranenko, K. Wang, A. Nathan, Appl. Phys. Lett. 91 (2007) 263508. [16] M.J. Powell, IEEE Trans. Electron Devices 36 (1989) 2753. [17] J. Robertson, Phys. Stat. Sol. (B) 245 (2008) 1026. [18] C. van Berkel, M.J. Powell, Appl. Phys. Lett. 51 (1987) 1094.