Star highway, a concept for a centralized multi-CAMAC system

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Nuclear Instruments and Methods in Physics Research 222 (1984) 517-523 North-Holland, Amsterdam

STAR HIGHWAY, A C O N C E P T FOR A CENTRALIZED MULTI-CAMAC S Y S T E M W. T E B R A , C.J. v a n D O O R N I K

a n d B. O K H U Y S E N

F O M Institute for Atomic and Molecular Physics. Kruislaan 407, 1098 SJ Amsterdam, The Netherlands

Received 17 October 1983 and in revised form 4 November 1983

A network for digital data transmission along lightguides in a laboratory using the CAMAC interface is described. Instead of a ""Highway" according to CAMAC a star network has been developed, which is much less vulnerable against failure of an individual node.

I. Introduction The application of more than one C A M A C workstation in laboratories or at industrial sites implies the use of a "highway" between the central computer and the users. According to the C A M A C report 4100e the branch highway is suitable for groups of maximal 7 users and uses a 66 twisted pair cable. Another network is the serial highway, described by the C A M A C report 4600e, which can serve up to 62 users and works in a bit or byte wide loop. In our laboratory both highways have been used. At the moment we have about 25 different experiments connected to the central computer (VAX 11/750) by means of C A M A C interfaces. Problems with the C A M A C highways are fundamental in the way data and control signals are transported over the link; an interference on the highway could, and mostly will, disturb all nodes. A solution for this problem is offered by a star configuration of the network centralized around a C A M A C front-end crate in the computer room. As many of the experiments in this laboratory make use of high voltage power supplies for charged particle acceleration, there is a chance of voltage breakdown. Such a breakdown can cause a severe ground problem for the electronics. A galvanic separation between the local circuits and the highway by means of optocouplers or light guides is therefore mandatory. The Star Highway uses separate lines from the C A M A C front-end to each of the experiments. Local voltage breakdowns or other disturbances will affect only the experiment concerned. The geometrical distribution of the experiments through the building is centered around the computer with distances up to 100 m. With the C A M A C highways, the highway interface was incorporated in the C A M A C crate controller. Some 0167-5087/84/$03.00 © Elsevier Science Publishers B.V. (North-Holland Physics Publishing Division)

recent developments led us to depart from this practice. One of them is the increasing use of local microcomputers in combination with a C A M A C crate. Another reason is the general purpose mode of this star highway with a direct connection from front-end to user or user to user. A crate controller with a microprocessor or any other microcomputer can be easily adapted to the highway.

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Fig. 1 shows an example for three stations connected to the front end crate. In this figure we suppose a connection of the users with a central computer: ho~ever, other configurations are possible. In this bidirectional network, where every workstation contains a crate and a videoterminal (TTY), it is obvious to relay also the terminal connection over the highway lines. When the workstation is equipped with a LSI 11 computer. which performs also the data-link protocol, the CAMAC crate is controlled by a LSI l l crate controller. In case of a direct controlled station, the crate controller must execute this protocol and contains a microprocessor performing this task. In our link the data flow from the first eight write lines of the dataway in one crate to the first eight read lines of the other dataway and vice versa. The byte width data goes over the highway in serial words of 12 bits length. The network hardware is in the CM or communication module, which forms the data interface to each side of the network. The circuitry is mounted in a single width CAMAC module and uses an arbitrary station in a crate. Normally the exchange of data between the central computer and the user is asynchronous and to avoid wait situations there is a first-in-first-out memory (FIFO) inserted in the data path. Moreover the CM can be used connecting other than CA MA C apparatus to the computer, for example microcomputer controlled instruments, executing the communication protocol mentioned further.

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The CM consists of a transmlstter and a receiver', with additional circuitry for the FIFO and CAMAC control. Fig. 2 shows the block diagram of the module. In the transmitter part the input of a 12 bit parallel-serial shift register is connected to one of three registers, i.e. the DATA, the REPt.Y or the TI'Y register. The output of the shift register is clocked into a Manchester encoder circuit followed by an optical transmitter, driving the fiber-optic tink. In the encoder. clock and data are multiplexed so only one fiber line is needed for each direction. At the receiving end of the link, the decoded clock signal is needed to maintain synchronisation. Witl~ a serial-parallel shift register in the receiver, the bit stream of the Manchester decoder is converted by the shift register into bytes. A multiplexer directs those byles to one of the DATA, REPLY or TTY registers. The multiplexer is controlled by the identification bits of the 12 bit word. Fig. 3 shows the allocation of the bits in the word. First comes the start bit, the presence of which opens the circuit of the shift register. After the startbit follows an identification bit for TTY, a panty bit, an identification bit for reply and next the eight data bits. The FIFO in the transmitter as well as in the receiver can store up to t024 bytes of information, so that 2048 bytes can be transported before introducing wait situations on either side.

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3. Transmission speed The clock rate by which the data is shifted over the lines fixes the speed or bit rate. In our case the clock frequency is 1.5 MHz, so the transmission of a message with a length of 12 bits takes 8 p~s. Since transmission of a D A T A byte requires the receipt of a reply byte before the next byte can be sent, another 8 p.s is added. With a C A M A C cycle of 1 /~s a message from dataway to dataway takes 18 ~as. In our system the software overhead for setting up a data transfer requires about 5 ms; so the transmission of a datablock of 256 bytes will take about 10 ms. In practice the F I F O will mask the time for loading

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and accepting data because it can store 2048 bytes. Furthermore, is it possible to insert or extract data from the F I F O during transmission. Operating asynchronously it is assumed the data will fit in the FIFO, so the time for writing and reading a byte to and from the F I F O can be as fast as 1 C A M A C cycle, i.e. about 1 p.s.

4. Asynchronous traffic In a computer netvcork the traffic between the systems will be asynchronous. To prevent mutilation of the data, rules are needed to match for timing differences and program conveniences. Specific rules for the CM

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network are given in the following flow diagrams. The first of them shows the software interface of the CM with the computer for loading data into the module (see fig. 4).The actions according to these flow diagrams take place in the front-end or the local crate processor in this write loop. The crate sees the CM as a station N and with the write function F16A0 it supplies data to the write lines of the dataway into the FIFO of the CM. The handshake on the Q-flag, after the F16A0, signals the computer that the data has been accepted. If there is no Q-response, reading the status register with function F1A0 will reveal the cause. When data has been loaded into the FIFO, the transmitter transports the data via the link to the receiver of the other CM. When the FIFO of this CM was empty a LAM-flag on the dataway is set on receipt of this byte. This attends the local controller to the routine as shown in the flow diagram of fig. 5. This read loop starts with the C A M A C read function FOA0 to extract the data from the FIFO via the read lines into the local registers or memories. If for one or another reason the Q-flag does not respond, the function F1A0 reads the contents of the status register to investigate the cause.

Fig. 6. Hardware steps during FIFO input loading from CAMAC. loaded into the FIFO. If the module gives a Q-response, the data is accepted and the FIFO increases its address by one and raises the flag "data available". This flag \

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The handshake responds to some hardware actions in the CM. The actions are pictured in the flow diagrams of figs. 6 and 7. Fig. 6 shows the relation of the C A M A C action on function F16A0 when a data byte is

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n t e r e d with FoAo initiates a number of actions, just before the transport of data takes place, as given in fig. 7. After the signal " d a t a available" appears, the transmitter is asked to set up the "start bit" of the shift register. If so, the " R E P L Y " flag will be set, the address of the F I F O will be decreased by one and a timer starts. Hence the data is pushed along the line and the transmitter waits on the " R E P L Y " of the receiving CM. When the " R E P L Y " arrives, this part of the circuit returns to the wait-loop of " d a t a available". If the " R E P L Y " does not arrive within a certain predetermined time, the timer disables the Q-flag of the function F16A0 and sends a special " R E P L Y " to the receiving module, which sets a LAM for the status. The L A M signals the computer or controller according to the actions of fig. 5.

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Fig. 10. In the fight upper comer of the board the optical transmitter and receiver are mounted.

Fig. 8 presents the flow of actions in the receiver part when data is received from another module. After checking the presence of the start bit, the message shifts into the serial-parallel register. Then the multiplexer controller looks at the identification bits in the message and sets the multiplexer to the DATA, REPLY or TTY register. Only in the case of DATA-detection the LAM is set by the FIFO-register. The REPLY and TTY will be managed according to the algorithm that is shown in the right hand side of fig. 8. Because it is possible that the FIFO is busy writing data into the output buffer,

the data is held until the FIFO is ready. When the FIFO is no longer occupied by the output flow, it will accept the DATA and set a LAM. The output flow of DATA from the FIFO to the CAMAC dataway is straightforward with the CAMAC instruction FOA0. The DATA is transferred from the output buffer to the R-lines of the dataway. Together with the appearance of the Q-flag the LAM is reset and the address of the FIFO is incremented (see fig. 9). If the FIFO is empty the Q-flag will be inhibited.

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6. Realization

So far we have replaced 12 CAMAC stations from the Serial Highway to the Star Highway. The reliability of the Star Highway is better than that of the Serial Highway at our place. The user in general is not aware of the change, because his timing relations are about the same. Because it was the strategy to change first the critical experimental sides, the down time has been reduced drastically. Fig. 10 shows a photograph of the module. There are 68 ICs placed on this CAMAC board of which the printed circuit is designed by a CAD procedure. Instead of the Hewlett-Packard fiber optic link HFBR-0010 shown in the photograph of the first modules we have now adapted the cheaper HFBR-0500 in combination with Quartz et Silice quartz fiber QSF600 for the interconnection between the modules.

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'In this article only the principles of the module are described. The hardware is not explained in detail because of the straightforward design rules. Although it is possible to design a microprocessor controlled CM it would result in a relatively slow communication interface and for this reason we have chosen for TTL-logic to realize the actions expressed in the flow diagrams. Because the CM is a CAMAC module all the basic electrical and mechanical properties are described in the CAMAC report 4100e. This work is part of the research program of the Stichting voor Fundamenteel Onderzoek der Materie (Foundation for Fundamental Research on Matter) and was made possible by financial support from the Nederlandse Organisatie voor Zuiver-Wetenschappelijk Onderzoek (Netherlands Organization for the Advancement of Pure Research).