Strain and lattice engineering for Ge FET devices

ARTICLE IN PRESS

Materials Science in Semiconductor Processing 9 (2006) 423–436

Strain and lattice engineering for Ge FET devices S.W. Bedell, A. Reznicek, K. Fogel, J. Ott, D.K. Sadana IBM T.J. Watson Research Center, Yorktown Heights, NY 10598, USA Available online 14 September 2006

Abstract One of the main challenges to creating a GeOI-based FET is simply to create a high-quality single-crystal layer for the channel material. Due to the low cost and wide availability of Si substrates, the most popular approach to Ge FET material development has been to integrate Ge with existing Si wafers (either by wafer bonding or direct growth). The different strategies for integrating Ge layers with existing Si-based substrates will be reviewed and discussed. The strain and relaxation behavior in high-content SiGe and pure Ge layers will be shown to put serious limitations on the possible integration schemes if defects are to be minimized. A discussion of the formation of SGOI by high-temperature oxidation will be discussed and it will be shown that the residual strain follows a universal trend. This trend allows one to design and fabricate lattice-engineered substrates for heteroepitaxial growth. An analysis of the residual strain in thin strained Ge layers indicates that the response of these crystals also follows the universal trend and is described using a simple equilibrium model. Lastly, the effective Poisson ratio was measured for the strained Ge layers and was found to vary as a function of the in-plane strain. The Poisson ratio was measured to vary from near the bulk value (0.27) at low strain, and decrease nearly linearly to 0.17 at 4% compressive strain. r 2006 Elsevier Ltd. All rights reserved. Keywords: Germanium; GeOI; Strain; SGOI; X-ray diffraction; Crystal defects

1. Introduction Metal-oxide-semiconductor field effect transistors (MOSFETs) employing germanium as the channel material has been proposed as a possible method of extending the power versus performance tradeoff of CMOS integrated circuits (ICs) in lieu of conventional scaling of the device dimensions. Several research groups have demonstrated improved drive current and/or very high hole mobility in Ge channels using a variety of advanced gate stack materials [1–5], suggesting that Ge p-FET devices may be feasible. Ultimately, it is unlikely that bulk Corresponding author.

E-mail address: [email protected] (S.W. Bedell). 1369-8001/$ - see front matter r 2006 Elsevier Ltd. All rights reserved. doi:10.1016/j.mssp.2006.08.001

Ge wafers will be used as starting substrates in the event that Ge CMOS becomes the technology of choice. It is more likely that heteroepitaxial growth will be used to integrate Ge or high content SiGe layers with existing high quality, low-cost Si-based substrates. Although the large misfit strain associated with Ge/Si heteroepitaxy makes the integration of Ge layers challenging, this strain is desirable when optimizing carrier transport properties [6,7]. Therefore, the ultimate goal for a Ge-based p-FET device is a Ge channel that is highly strained and contains a minimal density of crystal defects. To combine the performance advantages of high mobility with low substrate capacitance, highquality Ge layers need to be formed over an insulating layer to provide a Ge-on-insulator

ARTICLE IN PRESS 424

S.W. Bedell et al. / Materials Science in Semiconductor Processing 9 (2006) 423–436

(GeOI) starting substrate. One of the main challenges to creating a GeOI-based FET is simply to create a high-quality single-crystal layer for the channel material. This paper will cover the following topics:

 



Various strategies for integrating Ge channel layers with Si and SiGe-based substrates, with a focus on heteroepitaxial growth. An in-depth discussion of substrate lattice engineering using an oxidation-based SiGe-oninsulator (SGOI) fabrication process, as well as recent work on integrating strained Ge layers with these substrates. The measured residual strain in the SGOI layers will be shown to agree well with a simple equilibrium model. Discussion of the metrology and results of strain analysis in thin strained Ge layers.

2. Epitaxial growth of Ge on Si The most obvious way to incorporate Ge layers with existing Si substrate is to grow the Ge on the Si epitaxially. There has been a great deal of research in this area over the past 3 decades; most of this work was aimed at band structure engineering for photonic device development as well as to improve carrier mobilities within the valence and conduction bands [8,9]. It has been shown that Ge growth on Si follows the Stranski-Krastanow (SK) growth mode [10,11] whereby Ge grows in a 2D layer-by-layer manner up to a few monolayers (ML), and thereafter islands form on the surface. A transition from SK growth mode to sustained 2D layer growth occurs if the temperature is kept below 350 1C [12,13]. Fig. 1 shows cross-section TEM images from the growth of Ge directly on Si (in this case, SOI substrates) using a commercial single-wafer, rapid-thermal chemical vapor deposition (RTCVD) tool. Fig. 1 shows the growth behavior at 380 1C (1a) and 350 1C (1b) using GeH4 precursor in an H2 carrier gas at a pressure of about 4 kPa (30 Torr). Under these conditions, it is clear that the nature of the growth indeed changes from SK to 2D growth at or around 350 1C. The ultra thin 2D layer seen on the surface of the sample shown in Fig. 1(a) corresponds to 1 nm (about 7 ml). This value agrees well with previous observations of Ge growth on Si [11]. The observation that low-temperature growth (o350 1C) of Ge remains largely 2D for thicknesses greater than 7 ml has been attributed to reduced adatom surface mobility [12].

Fig. 1. Cross-section TEM (XTEM) showing a Ge layer that was grown directly on the surface of an SOI wafers by RTCVD at (a) about 380 1C and (b) 350 1C. The transition from SK growth to 2D growth is clear.

Therefore, there are essentially two approaches for creating strained Ge layers by direct growth on Si: (i) growing ultra thin (few ml) of fully strained Ge or (ii) low-temperature growth of thicker Ge layers. Ultra-thin, highly strained Ge layers have recently been grown on bulk Si [14] and thin SOI to form high mobility FET devices [15]. There are two obvious challenges with the first approach; the ability to properly design a buried channel FET with adequate sub-threshold characteristics and the more practical issue of being able to grow a 2 nm Ge layer (and silicon cap layer) with sufficient withinwafer (WIW) and wafer-to-wafer (WTW) variation to be commercially feasible. For example, the mobility has been shown to increase by 100% when the Ge layer thickness is changed from 4 to 2 nm in a buried channel device that had a 4 nm Si cap thickness [15]. Variation in the Si cap thickness will also lead to an effective hole mobility change of about 15% per nm of thickness variation [16]. Such

ARTICLE IN PRESS S.W. Bedell et al. / Materials Science in Semiconductor Processing 9 (2006) 423–436

strong variations in the on-state (Ion) and off-state (Ioff) characteristics of these devices make design and commercial implementation difficult. The second approach more readily allows for the fabrication of a surface channel FET, but has the obvious drawback of having a high crystal defect density. Because high strain is desirable for increased device performance, there will be a tradeoff between the thickness of the Ge layer and the amount of residual strain. This will be discussed in more detail below. It has been shown that the upper temperature range for 2D growth can be increased above 350 1C if surfactants are used [17]. A useful aspect of Ge growth from GeH4 is that it is naturally selective to oxide, making low-temperature selective epitaxy possible [18]. Interestingly, it has been reported that there may be a third regime of Ge formation on Si whereby high temperature annealing (or growth) is used to improve the surface roughness and defectivity of the grown Ge layers. High temperature growth [19], cyclic annealing [20] or hydrogen annealing [21] of Ge layers have all claimed improvement in the quality of thick Ge grown on Si. Such layers, however, will possess a minimal amount of strain. Epitaxial Ge films have even been formed on Si substrates by sputtering [22] and evaporation [23] while maintaining the substrate at an elevated temperature.

425

XTEM image of the resulting structure. Dislocations can be seen in the lower portion of the GBL and the density becomes much lower in the uppermost layers. The thin (30 nm) Ge layer can be seen at the upper surface. The inset of the figure shows a higher magnification view of the Ge layer indicating that high defect densities are present in the layer. The misfit strain of a pseudomorphic epitaxial layer is defined by: fm ¼ (aL–aS)/aL, where aL and aS are the equilibrium (relaxed) lattice parameters of the layer and substrate, respectively. Growth of Ge on Si corresponds to [(0.56577–0.54311)/0.56577] ¼ 0.04005, or 4.01%. In the sample shown in Fig. 2, the GBL was measured by XRD (discussed further below) to be 19.8 atomic percent Ge, 96% relaxed, with a residual compressive strain of 0.03%. This corresponds to an in-plane lattice parameter that is 0.72% larger than Si, therefore, the misfit strain for Ge growth on this GBL is about 3.3%. The high defect density and the low residual strain in the Ge layer (discussed below) indicates that a much lower misfit strain is required if a highquality, highly strained Ge layer (30 nm) is desired. It is worth mentioning that some variation in the definition of misfit strain exists in the literature. While it is true that the equilibrium lattice parameter of (undoped) Ge is about 4.17% larger

3. Epitaxial growth of Ge on SiGe Because the high mismatch strain tends to complicate the growth of Ge on Si substrates, growing Ge on a substrate with a larger in-plane lattice parameter enables one to control the misfit strain in the Ge. Early demonstrations of this approach used thick compositionally graded SiGe buffer layers (GBLs) grown on Si to create a surface with a larger in-plane lattice parameter [24]; upon which pure Ge layers were grown. The development of high quality GBLs has enabled the integration of high content SiGe and pure Ge layers on Si substrates [25]. The main drawback to using the GBL approach is that very thick buffer layers are needed to relax the SiGe and although they are comparatively higher quality than their predecessors, modern GBLs still contain a high density of threading dislocations (105–106 cm2). Growth of highly strained, thin Ge layers on high-quality GBLs was performed under the same conditions as the layer shown in Fig. 1(b). Fig. 2 shows a

Fig. 2. XTEM showing a Ge layer grown on a compositionally graded buffer layer by RTCVD at 350 1C. The upper portion of the buffer layer was measured by XRD to be 19.8 at% Ge and 96% relaxed. The inset shows the high density of defects present in the Ge layer.

ARTICLE IN PRESS 426

S.W. Bedell et al. / Materials Science in Semiconductor Processing 9 (2006) 423–436

than that of Si, it does not mean that the misfit strain is 4.17%. The biaxial strain in an epitaxial layer is defined by the change in the in-plane lattice parameter of the layer compared to its equilibrium lattice parameter (not that of the substrate), when the layer is forced to grow pseudomorphically on a substrate. To create a SiGe layer over an insulating layer for use as a template for Ge growth, many approaches have been proposed [26–28]. Layer transfer of the upper (high-quality) portions of GBL substrates using hydrogen implantation and wafer bonding techniques has been used to create SGOI [28] and GOI [29] wafers. This approach has the advantage that the GBL can be designed to provide the highest crystalline quality, then the layer can be transferred to the appropriate handle wafer. The drawbacks to this approach are that the highest quality GBLs still have a very high defect density compared to modern SOI substrates (which is typically less than 103 cm2) and layer transfer of relaxed, crosshatched, Ge-rich materials introduces wafer bonding challenges. Attempts to perform similar layer transfer techniques using bulk Ge wafers have indicated that the large thermal mismatch between Si and Ge severely limit the maximum bonding temperature that can be used without fracturing the wafers. Low-temperature layer transfer techniques have been demonstrated that may allow for thermally mismatched substrate fabrication, but the bulk defect density is not always maintained in the process [30].

properties can be controlled as well as the morestudied GBL technology. Due to the potential of TMSGOI to serve as a cost-effective, lattice engineered substrate for ‘‘on-insulator’’ CMOS, some space will be made here to describe this method in detail. The basic sequence for forming a thin, strained Si/Ge layer on a TMSGOI substrate is shown in the XSEM images of Fig. 3. In Fig. 3(a), a typical starting structure is shown whereby a SiGe layer is grown on top of a SOI substrate (145 nm top Si thickness). The SiGe layer, in this case, was 60 nm and the Ge content was 17 at%. Fig. 3(b) shows the resulting SGOI formed after oxidation of the initial structure at a temperature at or greater than 1200 1C. Because the total Ge content is preserved

4. Substrate lattice engineering using thermally mixed SGOI SGOI can be formed by growing a SiGe layer directly on an existing SOI wafer and performing high temperature oxidation [26,27] to form a single relaxed SiGe layer on top of the original buried oxide (BOX) layer. This occurs because the Ge atoms are very efficiently rejected from the growing surface oxide, and at high temperatures atomic diffusion homogenizes the initial SiGe/Si/BOX structure into a single SiGe/BOX structure. This method allows for SGOI wafers to be made costeffectively and with thickness variations within modern SOI substrate tolerances and within IBM is referred to as thermally mixed SGOI (TMSGOI). Although the oxidation method for making SGOI is straightforward and robust, the question remains as to whether or not the crystal quality and lattice

Fig. 3. Series of cross-section secondary electron microscope (SEM) images showing the TMSGOI process sequence. In (a) the as-deposited SiGe layer can be seen on the SOI layer. Image (b) shows the structure after high temperature oxidation to form SGOI; the upper oxide layer has not been removed yet. Image (c) shows a TMSGOI layer upon which a thin, strained Ge layer was grown and capped with a thin 3 nm Si layer.

ARTICLE IN PRESS S.W. Bedell et al. / Materials Science in Semiconductor Processing 9 (2006) 423–436

during high-temperature oxidation, the final Ge concentration in the SGOI is given by [(initial Ge fraction % initial SiGe thickness)/(final SGOI thickness)]. In Fig. 3(b), this would be [(17%  60 nm)/45 nm] ¼ 22.7% Ge. Therefore, the final thickness and Ge concentration of the final SGOI is controlled only by the thickness and concentration of the initial SiGe layer, and the final thickness of the SGOI; the SOI thickness only impacts how much oxide needs to be grown to achieve the desired final SGOI thickness. The oxidation rate of the SGOI has been measured to be essentially the same as bulk Si in this temperature regime, which implies that the diffusion rate of Ge is greater than oxidation rate (there is always enough Si at the surface to form SiO2). At lower temperatures (less than 1000 1C), this is not always true, and the oxidation rate of the SiGe can become Ge concentration dependent (usually higher rate for higher Ge content). Fig. 3(c) shows an XSEM of a TMSGOI substrate upon which 10 nm Ge was deposited using RTCVD followed by 3 nm Si cap layer. The sample was exposed to H2O2 prior to imaging to enhance the contrast of the thin Ge layer. The as-grown SiGe layer on the SOI is compressively strained. The physics of strain relaxation in the TMSGOI process has been studied [27], and in the case of continuous (non-patterned) films, it has been shown to be dislocation-mediated. Therefore, even though the BOX layer is somewhat viscous at

427

the thermal-mixing temperatures, it does not permit any long-range in-plane elastic relaxation up to 1300 1C. The initial stages of relaxation of the SiGe/ SOI structure can be studied by observing the defect structure after terminating the thermal mixing (TM) process after the initial temperature ramp-up to 1150 1C. Fig. 4(a) shows a plan-view TEM (PVTEM) image showing the dense network of dislocations early in the TM process. The inset in Fig. 4(a) is an XTEM image of the same sample, and shows that the dislocations that originally formed at the SiGe/SOI interface were pushed downward towards the BOX layer. This is expected because the flux of Ge into the underlying SOI layer will cause a stress gradient, which exerts a force on the existing dislocations. Fig. 4(b) shows a PVTEM image of a fully formed TMSGOI substrate after oxidation at 1250 1C. The network of dislocation loops is no longer visible, and a high-quality, relaxed SGOI layer is observed. So what happened to the dislocation loops and what determines the final relaxation of the SGOI layer? Although the BOX layer does not seem to contribute to strain relief in the plane of the wafer, perpendicular deformation of the buried oxide is observed to occur. The 10 mm  10 mm AFM images shown in Fig. 5 show this effect. Fig. 5(a) shows the surface of the TMSGOI after oxidation and surface oxide removal. The crosshatching is the result of dislocation motion, which relaxes the strain in the layer. The SGOI layer was then selectively removed using

Fig. 4. Plan-view (PV) TEM image of the initial stages of the TMSGOI process is shown in (a) and the corresponding XTEM is shown in the inset. The sample was a SiGe/SOI structure that was ramped up to 1150 1C and ramped back down. The dense dislocation structure can be seen in the PVTEM image. Image (b) shows the PVTEM image after the entire oxidation process is complete. The dense dislocation network is no longer visible.

ARTICLE IN PRESS 428

S.W. Bedell et al. / Materials Science in Semiconductor Processing 9 (2006) 423–436

Fig. 5. 10 mm  10 mm atomic force microscope (AFM) images of (a) the surface of the TMSGOI after formation (and surface oxide removal), and (b) after the SGOI was selectively etched from the BOX layer. The crosshatching that is observed on the BOX layer suggests that surface steps form at both the upper and lower interfaces, and thus the SGOI acts like a quasi-free film.

a large volume of nitric acid (100 ml) with a few drops of 49% HF acid added. This solution has the useful property of etching the SGOI and remains highly selective to the BOX layer. AFM was performed on the BOX layer and the result is shown in Fig. 5(b). The fact that the same crosshatching pattern observed on the surface is embossed on the BOX layer suggests that the SGOI is behaving like a quasi-free layer. In other words, instead of the usual case of surface steps on the (free) upper portion of a SiGe layer, and interfacial dislocation segments at the SiGe/Si interface, the BOX layer accommodates vertical displacements and thus surface steps exist at both interfaces. It should be mentioned that the mottling of the surface of the BOX layer as seen in Fig. 5(b) is characteristic of buried oxide layers formed using the SIMOX method. Because the Ge within the SGOI is trapped both above and below by the surface and buried oxide layers, respectively, the unique situation is presented where the SiGe layers can be taken to within a few percent of their melting point for prolonged periods of time. Therefore, the relaxation of these layers can be studied under conditions that are as close to thermodynamic equilibrium as can be expected. This is in contrast to much of the previous literature relating to SiGe relaxation on bulk Si where the thermal budgets are limited by Ge diffusion. A simple equilibrium model for calculating the residual strain in a SiGe layer was compared to measurements of TMSGOI formed using various initial SiGe and final SGOI thicknesses and Ge concentrations. The equilibrium model follows that

described by Jain [31], where the total energy of a film containing an array of 601 dislocations is minimized with respect to dislocation spacing (density). The total energy of the strained layer can be expressed as   jb1 j 2 2 E ¼ B fm  t þ ED, p p where fm is the misfit strain defined above, b1 is the strain-relieving component of the Burgers vector of the dislocation, p is the spacing between dislocations, t is the thickness of the layer, B is (twice) the bulk modulus of the layer material and ED is the energy (per unit length) of the dislocation. The effect of increasing the density (decreasing p) of dislocations in a film is to reduce the strain energy (which is a squared term) while increasing the energy of the film due to the energy of the dislocation (which is linear in the density). Therefore, for small values of film strain, adding dislocations will tend to increase the total energy of the film and will thus be energetically unfavorable. One can calculate the density of dislocations under the condition of thermodynamic equilibrium by minimizing the above expression with respect to the dislocation density;   q q jb1 j 2 2 ðEÞ ¼ B fm  t þ E D ¼ 0. qð1=pÞ qð1=pÞ p p Once the value of p is determined for a given layer/ dislocation type, the equilibrium residual strain is given by the term: (fm|b1|/p) ¼ eres. The physical meaning of this expression is simply ‘‘remaining

ARTICLE IN PRESS S.W. Bedell et al. / Materials Science in Semiconductor Processing 9 (2006) 423–436

strain’’ (eres) ¼ ‘‘initial, maximum strain’’ (fm) minus ‘‘what you lost due to dislocations’’ (b1/p). The value of b1/p is therefore the change in the inplane lattice spacing of the relaxed layer (e.g., as p-N, eres-fm, and thus the layer is pseudomorphic). TMSGOI substrates were formed using a variety of initial (as-grown) SiGe thicknesses and Ge concentrations, and oxidized to form SGOI of various final thickness and Ge concentrations. Xray diffraction was used to measure the residual compressive strain remaining in the film after oxidation and the results are compared to the equilibrium theory described above (assuming 601 dislocations). The results are shown in Fig. 6. The agreement between the measured residual strain in the SGOI and the results of the simple equilibrium theory is very good down to 40 nm. Layers thinner than 40 nm seem to possess more residual strain than predicted by theory. Because the residual strain obeys a universal and well-behaved trend, it becomes straightforward to design TMSGOI with a wide range of desired properties. The physics of strain relief in the TM process for forming SGOI is given by Fig. 6; if the film strain exceeds the equilibrium residual strain at a given SGOI thickness, dislocations are generated and grow until the equilibrium residual strain is recovered. As an example, suppose that a substrate is desired that has an in-plane lattice parameter which is 1.5%

Residual SGOI Film Strain (%)

1.6

429

greater than Si (or, equivalently, 2.6% less than Ge), and the SGOI should be 200 nm thick. By looking at Fig. 6, a 200 nm thick SGOI layer will have a residual strain of about 0.05%. Therefore, because eres ¼ (fm|b1|/p) ¼ 0.05% and b1/p is 1.5%, the Ge concentration of the SGOI should be that which would have a misfit strain of about 1.55%. This corresponds to a Ge concentration of approximately 40 at%. The as-grown SiGe layer on the SOI can be any thickness/concentration combination whose product is 8000 (nm%), as long as after oxidation the SGOI is 200 nm. It is also important to keep the oxidation temperature below the melting point of the SiGe alloy (in this case 1200 1C). Typical defects in the TMSGOI are seen in the optical micrograph shown in Fig. 7 after chemical defect etching. Typical threading defect densities (pits in the image), can be kept at or below the 106 cm2 level. The dark line in the image is a stacking fault (SF) and their density is related to both the SGOI thickness and concentration [27]. Fig. 8 shows the measured SF density in TMSGOI as a function of final SGOI thickness. These data suggest that the lowest defect densities can be attained for thicker SGOI layers oxidized at or above 1250 1C. Another method which drastically reduces the density of stacking faults in TMSGOI is to perform hydrogen implantation into the initial SiGe/SOI structure before oxidation. Typical H doses from 1 to 2.5  1016 atoms/cm2 are effective at reducing the final SF density; the peak of the ion

Measured data Equilibrium Theory

1.4 1.2 1 0.8 0.6 0.4 0.2 0 0

250

500

750 1000 1250 1500 1750 2000 SGOI Thickness (Å)

Fig. 6. Measured residual compressive strain in the TMSGOI layers as a function of final thickness (Ref. [27]). The solid line is the condition of thermodynamic stability as described in the text. The dashed lie is a best-fit though the measured data. The agreement between the equilibrium theory and the measured data is good for SGOI thicknesses greater than about 40 nm.

Fig. 7. Optical micrograph of a typical TMSGOI substrate after chemical defect etching. A population of threading defects (dark pits) as well as a single stacking fault can be seen in the image.

ARTICLE IN PRESS S.W. Bedell et al. / Materials Science in Semiconductor Processing 9 (2006) 423–436

430

range is typically placed near the SiGe/SOI interface. Fig. 9 shows a PVTEM image of a 23 at% TMSGOI layer formed: (a) without H pre-implantation and (b) with a 2  1016 H/cm2 pre-implantation. The residual strain in the H-implanted and thermally mixed SGOI is similar to the nonimplanted SGOI, further indicating that TMSGOI layers are relaxed to their thermodynamic limit.

Planar Defect Density (cm-2)

10000000 1000000

1200C Oxidation 1250C Oxidation 1300C Oxidation

100000 10000 1000 100 10 1 200 300 400 500 600 700 800 900 1000 SGOI Thickness After Oxidation (Å)

Fig. 8. Measured stacking fault density in TMSGOI layers as a function of final SGOI thickness and oxidation temperature. The lowest SF density TMSGOI material is obtained by performing the oxidation at a temperature great that 1250 1C and leaving the SGOI thick.

5. Lower temperature oxidation of SiGe In the case of thermally mixed SGOI described above, one of the distinguishing characteristics of the process is that the rate of Ge diffusion is greater than the rate of surface consumption by oxidation. When the oxidation temperature is dropped below 1000 1C, oxidation still rejects the Ge atoms, but they tend to concentrate near the surface as oxidation proceeds. This can be used for forming high Ge content SGOI or even GOI [32]. The challenge with this approach is that it is a runaway process, and difficult to control. As the Ge content increases near the surface, the oxidation rate tends to increase, and so becomes a positive feedback process. The Ge content of these layers is also not as well preserved because Ge oxidizes readily when the surface is starved of Si. Another approach is to perform limited lower-temperature oxidation of SiGe layers (either SGOI or SiGe on bulk Si). Under the right conditions, Ge-enriched surface layers can be formed that have well-defined thickness and Ge content. In other words, these surface layers look more like epitaxial layers than diffused layers. Fig. 10 shows a XTEM image taken from a SiGe/SOI (as-grown) structure that, rather than thermal mixing, received a 900 1C oxidation treatment. The result is a well-defined Ge-enriched layer

Fig. 9. PVTEM images of TMSGOI formed, (a) without any H implantation prior to oxidation and (b) with a 2  1016 H/cm2 preoxidation implant at an energy that placed the ion peak near the initial SiGe/SOI interface. H implantation is used to create TMSGOI with very low SF density (below optical detection).

ARTICLE IN PRESS S.W. Bedell et al. / Materials Science in Semiconductor Processing 9 (2006) 423–436

on the surface. Fig. 11 shows an X-ray reciprocal space map of a 900 1C oxidized SiGe/SOI structure. The small peak is due to the Si substrate, the bright,

431

broader peak below the substrate peak corresponds to the original deposited SiGe layer, and the faint peak directly below the SiGe peak is from the Geenriched surface layer. Two important conclusions from Fig. 11 are (i) the Ge-rich layer has a single, well-defined lattice spacing as evidenced by the single spot in reciprocal space (not a streak or smear) and (ii) the fact that the Ge-rich peak lies directly below the SiGe peak in reciprocal space indicates that the surface has remained pseudomorphic to the underlying SiGe layer (they have the same in-plane parameter). Analysis of the X-ray data indicates that the surface concentration was 45 at% Ge (with 1.2% residual compressive strain) and the original SiGe was 19 at% Ge. Fig. 10 also suggests that, like the first stages of TM (inset of Fig. 4(a)), dislocations formed during the 900 1C oxidation step are preferentially pushed downward, maintaining a relatively high-quality surface region. 6. Measurement of strain in thin Ge layers

Fig. 10. XTEM image of a SiGe/SOI structure after oxidation at 900 1C. Due to the limited Ge diffusion at this temperature, the Ge concentrates near the surface (dark band) creating a welldefined Ge-enriched region. The measured Ge concentration in this enriched region is 45 at% and has 1.2% compressive strain.

The use of high-resolution X-ray diffraction to measure composition and strain in SiGe alloys has been established for some time [33]. In general, the way in which the composition of a SiGe alloy is

5750 Si Substrate 5700 224 Qy (x10000) rlu

5650

5600

SiGe layer

5550

5500 Ge-enriched surface 5450

-4200

-4150

-4100

-4050

-4000 -3950 Qx (x10000) rlu

-3900

-3850

-3800

Fig. 11. Reciprocal space map [2 2 4] taken from a SiGe/SOI structure oxidized at 900 1C. The original SiGe layer is the peak below the narrow substrate peak and the enriched surface region is the spot directly below the SiGe peak. Their vertical alignment implies that the enriched layer is pseudomorphic to the underlying SiGe layer.

ARTICLE IN PRESS 432

S.W. Bedell et al. / Materials Science in Semiconductor Processing 9 (2006) 423–436

determined is to first measure the perpendicular lattice parameter of the layer, aperp (relative to the substrate lattice parameter). In the case of crystalline layers with the [0 0 1] surface orientation, diffraction from the [0 0 4] family of planes is typical. Next, diffraction is performed from a set of planes that have a normal vector with components in both the perpendicular and parallel (inplane) directions. Fig. 12 shows a diagram of the [0 0 4] and [2 2 4] planes in a tetragonally strained layer grown on a relaxed (cubic) substrate. The separation between the diffraction peaks in the [0 0 4] case is simply given by the Bragg equation when the [0 0 1] lattice vectors of the layer and substrate are coincident. The observed peak separation when measuring non-coplanar lattice planes, such as the [2 2 4] planes, will be due to (i) the difference in the interplanar spacing between the layer and the substrate and is given by the Bragg equation and (ii) the difference in the lattice tilting (Do ¼ oLayer–oSubstrate) due to the tetragonal distortion in the layer. Fatemi [33] et al. proposed to cancel out the effect of lattice tilting by averaging the measurements from complimentary [2 2 4] and ½2 2¯ 4 rocking curves. Although this works well for layers with low residual strains (and thus less tilting), the extreme lattice tilting that occurs in highly strained layers will result in errors in the true peak separations if single rocking curves are taken.

This is a consequence of the fact that for highly strained layers, the directions of the lattice vectors become separated enough so that diffraction conditions for both crystals cannot be satisfied with a single scan. The situation is made worse by further restricting the diffraction conditions when using collimating slits in front of the detector, which is often done to improve the signal-to-noise ratio. Usually, highly strained films are very thin, making the use of detector slits common when analyzing these layers. Therefore, the proper way to measure the true peak separation for non-coplanar diffracting planes is to perform a series of rocking curves, thereby mapping the diffraction peaks. This technique is referred to as reciprocal space mapping. Also, it is unnecessary to perform the complimentary scans proposed by Fatemi et al. to properly calculate the lattice properties. Since aperp is measured directly, the relationship between the tilt of the layer (oLayer) and the in-plane lattice parameter (a//) is geometrically related: oLayer ¼ tan1{aperp/(O2 a//)}, and the interplanar spacing is in turn related to oLayer. The apparent peak separation is: yMeasured ¼ (ySubstrateyLayer)7Do which can be solved numerically by looping though a range of a// values until a self-consistency is attained. Once the values of aperp and a// are measured, the equilibrium lattice parameter, ao, can be calculated from linear elasticity theory: [110]

[010]

√2 a//

d004

d224

aPerp Layer

a//

ω

Δω Substrate

Fig. 12. Diagram explaining the terms used in the text. The picture represents a strained (tetragonal) epitaxial layer on a relaxed (cubic) substrate. The perpendicular lattice parameter is measured by performing diffraction around the [0 0 4] peak, and the in-plane parameter is derived from the [2 2 4] data. Note that the [0 0 4] planes from the layer and substrate are coplanar, whereas the [2 2 4] in general are not.

ARTICLE IN PRESS S.W. Bedell et al. / Materials Science in Semiconductor Processing 9 (2006) 423–436

aperp–ao ¼ 2(c12/c11)(a//ao), or equivalently, aperp–ao ¼ (2n/(1n))(a//ao); where c12 and c11 are elastic constants from the compliance tensor and n is the Poisson ratio. Therefore, to calculate the properties of a SiGe alloy, one uses the Poisson ratio (0.278 for Si and 0.271 for Ge) to calculate the equilibrium lattice parameter ao after measuring aPerp and a//. Once the value of ao is known, the Ge fraction is calculated by using either Vegard’s law or a more accurate relationship between equilibrium lattice parameter and Ge concentration [34]. The residual biaxial strain is then given by eres ¼ (aoa//)/ao. It is important to recognize that if the material has been modified in some way (doped or ion implanted), the known relationship between equilibrium lattice parameter and Ge content is rendered invalid and the calculated Ge concentration will be meaningless. The calculated strain is definitional, and will therefore remain valid. The strain was measured in several thin Ge layers grown on Si (or SOI), and SiGe (or SGOI) substrates. The values of strain were calculated by measuring the [0 0 4] XRD peak separations, assuming the Ge was pure, and using 0.271 as the Poisson ratio. The results are plotted in Fig. 13 along with the same equilibrium strain curve as plotted in Fig. 6. It is clear from this figure that the simple equilibrium theory, described above, predicts the behavior of the residual strain the Ge layers well. Included in this plot are data calculated by the

present authors from published XRD data taken from Ge layers grown at 500 1C using MBE [35]. It appears that due to the large misfit strains present, it is difficult to grow strained Ge layers that are significantly metastable; whereas large metastability windows exist when growing lower Ge fraction SiGe layers on Si. The Ge layers grown with lower misfit strain (Ge on SiGe buffers), seem to show a higher degree of metastability compared to the Ge grown directly on Si. While analyzing the strained Ge layers using [0 0 4] rocking curves and [2 2 4] reciprocal space maps, an inconsistency was noticed in the calculated equilibrium lattice constant, ao. Specifially, for thicker Ge layers, the calculated value of ao corresponded well with the accepted value of undoped Ge (0.56577 nm). For the thinner, highly strained Ge layers, the calculated value of ao was systematically lower than the accepted value. Since most of these layers were grown at 350 1C or less, Si transport and accidental alloying of the Ge layer is unlikely (but will be investigated in future work). Additionally, the well-defined diffraction patterns in the reciprocal space maps suggest against the existence of diffusion gradients. By assuming that the Ge layer was pure, the above expression for calculating ao based on a known Poisson ratio was inverted to calculate the ‘‘effective Poisson ratio’’ knowing that the value of ao is close to 0.56577 nm. Fig. 14 shows the calculated Poisson ratio as a

0.29

3

0.27

500C MBE Ge/Si Ge/SiGe Equilibrium Theory

2

0.25 Calculated ν

2.5 Residual Strain (%)

433

1.5

Calculated from Ref. 14

0.23 0.21

1

0.19

0.5

0.17 0.15

0 0

20

40 60 80 Ge Thickness (nm)

100

120

Fig. 13. Measured residual strain in thin Ge layers grown on Si and SiGe layers. The solid dots were calculated from published (Ref. [35]) X-ray data taken from 500 1C MBE-grown Ge layers. All data agree well with the same equilibrium curve shown in Fig. 6. The Ge layers grown on SiGe substrates have a slightly higher residual strain than those grown directly on Si.

0.0

0.5

1.0

1.5

2.0 2.5 ε// (%)

3.0

3.5

4.0

4.5

Fig. 14. Plot of calculated Poisson ratio vs. measured in-plane strain for thin Ge layers. The Poisson ratio was calculated by measuring aPerp and a// using X-ray reciprocal space maps, and using the equilibrium lattice parameter of pure Ge (0.56577 nm) to calculate n. The pseudomorphic strained Ge layer datum was calculated from published X-ray results (Ref. [14]).

ARTICLE IN PRESS S.W. Bedell et al. / Materials Science in Semiconductor Processing 9 (2006) 423–436

434

function of measured in-plane strain for a range of Ge layers. The curious lattice response of highly strained Ge was acknowledged by Caymax [14] et al. previously. In that case, no measurement of the inplane lattice parameter was reported. However, the effective Poisson ratio that would correspond to the reported value of aPerp was calculated and plotted in Fig. 14 as well. A possible explanation could be that linear elasticity cannot be assumed for Ge under such high strain, although anomalous low-temperature transport of Si into the Ge layer cannot be ruled out at this time. Fig. 15 shows a reciprocal lattice map around the [2 2 4] diffraction peaks for a 12 nm Ge layer grown on a TMSGOI substrate. Before growing the Ge layer, a compositionally matched SiGe buffer layer was first grown on the SGOI, then the Ge was deposited in-situ at 330 1C. The reciprocal space map shows a well-defined SGOI peak indicating that the buffer was closely matched in Ge composition to the SGOI layer. The strain in the Ge layer was calculated to be 1.59%. Fig. 16 shows a XTEM image of the same sample corresponding to the X-ray data shown in Fig. 15. A large density of defects is seen in the Ge layer, again, consistent with the model of dislocation-mediated relaxation. A calculation based on the equilibrium model for this Ge layer gives the theoretical average dislocation spacing to be about 7 nm, which seems reasonable based on the TEM analysis.

5800

7. Summary and conclusions The results of the historical review of Ge/Si integration by heteroepitaxial growth, as well as our own ongoing investigation, indicate there are two basic approaches. Ultra thin (few ml) fully strained Ge layer growth, designed to stay within the limits of thermodynamic stability, have been

Fig. 16. XTEM of the same sample corresponding to the data in Fig. 15. The high-quality SGOI can be seen, though the Ge still contains a high density of defects.

224

Si Substrate

Qy (x10000) rlu

5700 SGOI

5600

5500

ε-Ge

5400

5300 -4300

-4200

-4100

-4000

-3900

-3800

-3700

-3600

-3500

Qx (x10000) rlu Fig. 15. X-ray reciprocal space map of a thin strained Ge layer grown on a 35 at% SGOI substrate. The strain in the Ge layer was measured to be 1.59%. For such highly strained layers, space maps are necessary to accurately determine the peak spacing.

ARTICLE IN PRESS S.W. Bedell et al. / Materials Science in Semiconductor Processing 9 (2006) 423–436

demonstrated [14,15]. Although many significant technical challenges (device design and material reproducibility) exist before this approach becomes commercially feasible. It may be the only way to integrate fully strained Ge directly into existing Si technology without producing a continuum of defects. The other approach is to grow planar Ge layers at low-temperatures in order to create layers thick enough to allow the formation of surface channel FET devices. In this paper we have shown that, in doing so, a large density of defects are created in the Ge layers. By growing the Ge layer on a relaxed SiGe ‘‘buffer’’ layer, the reduced misfit strain may allow more flexibility when trying to grow highly strained, low-defect Ge. We have shown that although the Ge layers retain more of their strain when grown on relaxed SiGe layers, the misfit strain is still too high (for the lower Ge concentration SiGe buffers studied here) to afford much flexibility. Work by others [25] on high Ge concentration GBL have shown that they may allow a pathway for Ge integration on bulk Si wafers, though the defect density still remains high. SGOI formed by the TM method was introduced as a flexible method of creating a wide variety of lattice-engineered substrates. A quick discussion of the physical mechanisms responsible for strain relaxation in these materials led to a well-behaved universal relationship between the thickness of the SGOI and the residual strain. By comparing this trend to a well-established equilibrium model of a film containing dislocations, it was shown that the observed residual strain in the SGOI can be predicted and used to design a wide variety of templates for heteroepitaxial growth. The TM method is capable of creating SGOI with a wide range of lattice properties, while meeting or exceeding modern requirements for thickness uniformity and other requirements. Analysis of thin strained Ge layers grown on all types of wafers mentioned above (SOI, SGOI, and GBLs) showed that the residual strain in these layers agreed well with the same universal trend described above. It was shown that the residual strain is slightly (but systematically) higher on Ge grown on SiGe; suggesting the reduced misfit strain may promote increased metastability. Due to inconsistencies observed when performing equilibrium lattice parameter calculations from reciprocal space maps of strained Ge layers, an attempt was made to measure the Poisson ratio of these layers directly. This was done by carefully measuring the

435

perpendicular and in-plane lattice parameter of these layers, using 0.56577 nm as the undoped Ge lattice constant, and calculating the ‘‘effective’’ Poisson ratio using linear elasticity theory. The Poisson ratio was found to decrease from the bulk value in an approximately linear manner, to a value of about 0.17 for a 4% strained layer. Although GOI formation using ion-implantation and wafer bonding techniques also has many challenges, this may provide a pathway to strained Ge in a manner that the IC community has become accustomed to. Namely, GOI wafer manufacturers can focus on methods of creating low-cost, high quality unstrained GOI substrates from bulk Ge wafers, and local straining processes can be used at the device level to provide maximum transport properties. Despite this appealing parallel to the modern Si-based paradigm, this would require tremendous development in 300 mm Ge wafer infrastructure. References [1] Rosenberg JJ, Martin SC. IEEE Electron Device Lett 1988;9:639. [2] Chui CO, Kim H, Chi D, Triplett BB, McIntyre PC, Saraswat KC. IEEE IEDM Tech Dig 2002:437. [3] Shang H, Chu JO, Bedell SW, Jamison P, Zhang Y, Ott JA, et al. IEEE IEDM Tech Dig 2004:157. [4] Ritenour A, Yu S, Lee ML, Lu N, Bai W, Pitera A, et al. IEEE IEDM Tech Dig 2003:433. [5] Chui CO, Ramanathan S, Triplett BB, McIntyre PC, Saraswat KC. IEEE Electron Device Lett 2002;23:473. [6] Fischetti MV, xLaux MV. J Appl Phys 1996;80:2234. [7] Lee ML, Fitzgerald EA. IEEE IEDM Tech Dig 2003:429. [8] Wang KL, Thomas SG, Tanner MO. J Mat Sci 1995;6:311. [9] Lee ML, Fitzgerald EA, Bulsara MT, Currie MT, Lochtefeld A. J Appl Phys 2005;97:011101. [10] Eaglesham DJ, Cerullo M. Phys Rev Lett 1990;64:1943. [11] Williams AA, Thornton JMC, Macdonald JE, van Silfhout RG, van der Veen JF, xFinney JF, et al. Phys Rev B 1991;43:5001. [12] Cunningham B, Chu JO, Akbar S. Appl Phys Lett 1991;59:3574. [13] Eaglesham DJ, Cerullo M. Appl Phys Lett 1991;58:2276. [14] Caymax MR, Poortmans J, Van Ammel A, Nijs J, Vandervorst W, Vanhellemont J, et al. Mat Res Soc Symp Proc 1992;263:85. [15] Krishnamohan T, Krivokapic Z, Uchida K, Nishi Y, Saraswat KC. Symp VLSI Tech Dig 2005:82. [16] Results determined using figure 34 of Ref. [9]. [17] Osten HL, Klatt J, Lippert G, Bugiel E, Hinrich S. Appl Phys Lett 1992;60:2522. [18] Ishii H, Takahashi Y, Murota J. Appl Phys Lett 1985;47:863. [19] Malta DP, Posthill JB, Markunas RJ. Appl Phys Lett 1992;60:844.

ARTICLE IN PRESS 436

S.W. Bedell et al. / Materials Science in Semiconductor Processing 9 (2006) 423–436

[20] Luan HC, Lim DR, Lee KK, Chen KM, Sandland JG, Wada K, et al. Appl Phys Lett 1999;75:2909. [21] Nayfeh A, Chui CO, Saraswat KC, Yonehara T. Appl Phys Lett 2004;85:2815. [22] Bajor G, Cadien KC, Ray MA, Greene JE. Appl Phys Lett 1982;40:696. [23] Tsaur BY, Geis MW, Fan JCC, Gale RP. Appl Phys Lett 1981;38:779. [24] Xie YH, Monroe D, Fitzgerald EA, Silverman PJ, Thiel FA, Watson GP. Appl Phys Lett 1993;63:2263. [25] Fitzgerald EA, Currie MT, Samavedam SB, Langdo TA, Taraschi G, Yang V, et al. Phys Status Solidi A 1999;171:227. [26] Tezuka N, Sugiyama N, Takagi S. Appl Phys Lett 2001;79:1798. [27] Bedell SW, Fogel K, Chen H, Sadana DK. Appl Phys Lett 2004;85:5869.

[28] Huang LJ, Chu JO, Canaperi DF, D’Emic CP, Anderson RM, Koester SJ, et al. Appl Phys Lett 2001;78:1267. [29] Pitera AJ, Taraschi G, Lee ML, Leitz CW, Cheng Z-Y, Fitzgerald EA. J Electrochem Soc 2004;151:G443. [30] Tracy CJ, Fejes P, Theodore ND, Maniar P, Johnson E, Lamm AJ, et al. J Electron Mater 2004;33:886. [31] Jain S, Germanium–Silicon strained layers and heterostructures, Advances in electronics and electron physics.New York: Academic Press, 1994, Section 2.5, using Eq. (2.25) for the film energy. [32] Tezuka T, Nakaharai S, Moriyama Y, Sugiyama N, Takagi S-I. Symp VSLI Tech 2004:198. [33] Fatemi M, Stahlbush RE. Appl Phys Lett 1991;58:825. [34] Dismukes P, Ekstrom L, Paff RJ. J Phys Chem 1964;68:3021. [35] Jiang ZM, Pei CW, Zhou XF, Jiang WR, Shi B, Liu XH, et al. Appl Phys Lett 1999;75:370.