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Subject index to Volume
Journal of Systems Architecture 48 (2003) 455–456 www.elsevier.com/locate/sysarc
Subject index to volume 48 (2002–2003) 3-D self-organizing map Adjudication Algorithm design Allocation Arrangement network Automated design problem solving
337 81 387 285 325 99
Bandwidth smoothing Banyan network BER strategy Bit-permute-complement permutations Block–cyclic distribution Booth multipliers Built-in self-test Bus traffic
353 175 377 311 255 125 125 137
Cache Checkpointing Circuit synthesis Clustering CMOS circuit Color quantization COMA Communication cost Communication sets Compilers Complexity analysis Computer aided design Computer architecture Conflict misses CORBA Cryptography
137 237 99 267 113 337 377 285 255 151 403 113 199, 367 427 81 237
Distributed routing Distributed shared memory Double-loop network Dynamic reconfigurable logic
193 377 387 285
Embedded multiprocessors Embedded system Emulation End-system QoS management EPOC folding model
221 17 49 353 1
Evaluation Evolutionary algorithms Execution-based simulation Expression trees Fault tolerance FPGA
237 99 59 151 81, 193, 237, 377 337
Gate level General-purpose workloads Genetic algorithms Genetic engineering Graph partitioning Graphs
113 199 99 99 267 37
Heuristic algorithms Heuristic search Hierarchical structure Hybrid optical MIN’s Hypercube Hypergraphs
267 99 325 311 193 37
Incremental scheduling Input support minimization Instruction scheduling In-system verification Interconnection networks Interrupt controller Java processor Java virtual machine
151 99 151 49 37, 59, 193 49 1 1
Legacy systems Low power design Low power testing
81 113 125
Mapping problem Memory hierarchy Memory management Microprocessor data cache MP3 Multi-tier architectures Multicasting network Multicomputers
267 137 59 427 49 81 175 37
1383-7621/03/$ - see front matter Ó 2003 Elsevier Science B.V. All rights reserved. doi:10.1016/S1383-7621(03)00048-1
456
Subject index / Journal of Systems Architecture 48 (2003) 455–456
Multimedia applications Multimedia streaming Multiplexer cost Multistage interconnection network
199 353 285 311
Nonblocking switching network Non-local data Null space
175 255 427
Object code Off-line routing
367 193
Parallel algorithms Parallel embedded applications Parallel processing Partitioning Path-dependent loss Performance analysis Performance measurement Performance visualization Permutation admissibility Permutation routing Photonic crosstalk PLC POC folding model Power estimation Prefetching Product network
325 221 37 285 311 37 221 221 311 387 175 17 1 113 137 325
Randomisation Randomising set index function Real-time operating system Real-time task scheduling
427 427 49 353
Relay ladder logic Replication RISC
17 81 367
Scheduling Scientific applications Security SE-disjoint routing Shared-memory multiprocessor Shuffle-exchange networks Simulation Software instrumentation Software monitoring tools Software/hardware partitioning SPMD Stack operations folding Star network Statecharts Statistical analysis Superscalar processor System design System-on-a-chip
285 59 237 175 59 311 387 403 221 403 255 1 325 17 199 137 403 367
Task allocation/assignment
267
Unicast
193
Vertex symmetry Virtual cut-through Virtual prototyping VLSI architecture Wallace trees Workload characterization
325 37 17 337 125 199
Subject index to volume 48 (2002–2003) 3-D self-organizing map Adjudication Algorithm design Allocation Arrangement network Automated design problem solving
337 81 387 285 325 99
Bandwidth smoothing Banyan network BER strategy Bit-permute-complement permutations Block–cyclic distribution Booth multipliers Built-in self-test Bus traffic
353 175 377 311 255 125 125 137
Cache Checkpointing Circuit synthesis Clustering CMOS circuit Color quantization COMA Communication cost Communication sets Compilers Complexity analysis Computer aided design Computer architecture Conflict misses CORBA Cryptography
137 237 99 267 113 337 377 285 255 151 403 113 199, 367 427 81 237
Distributed routing Distributed shared memory Double-loop network Dynamic reconfigurable logic
193 377 387 285
Embedded multiprocessors Embedded system Emulation End-system QoS management EPOC folding model
221 17 49 353 1
Evaluation Evolutionary algorithms Execution-based simulation Expression trees Fault tolerance FPGA
237 99 59 151 81, 193, 237, 377 337
Gate level General-purpose workloads Genetic algorithms Genetic engineering Graph partitioning Graphs
113 199 99 99 267 37
Heuristic algorithms Heuristic search Hierarchical structure Hybrid optical MIN’s Hypercube Hypergraphs
267 99 325 311 193 37
Incremental scheduling Input support minimization Instruction scheduling In-system verification Interconnection networks Interrupt controller Java processor Java virtual machine
151 99 151 49 37, 59, 193 49 1 1
Legacy systems Low power design Low power testing
81 113 125
Mapping problem Memory hierarchy Memory management Microprocessor data cache MP3 Multi-tier architectures Multicasting network Multicomputers
267 137 59 427 49 81 175 37
1383-7621/03/$ - see front matter Ó 2003 Elsevier Science B.V. All rights reserved. doi:10.1016/S1383-7621(03)00048-1
456
Subject index / Journal of Systems Architecture 48 (2003) 455–456
Multimedia applications Multimedia streaming Multiplexer cost Multistage interconnection network
199 353 285 311
Nonblocking switching network Non-local data Null space
175 255 427
Object code Off-line routing
367 193
Parallel algorithms Parallel embedded applications Parallel processing Partitioning Path-dependent loss Performance analysis Performance measurement Performance visualization Permutation admissibility Permutation routing Photonic crosstalk PLC POC folding model Power estimation Prefetching Product network
325 221 37 285 311 37 221 221 311 387 175 17 1 113 137 325
Randomisation Randomising set index function Real-time operating system Real-time task scheduling
427 427 49 353
Relay ladder logic Replication RISC
17 81 367
Scheduling Scientific applications Security SE-disjoint routing Shared-memory multiprocessor Shuffle-exchange networks Simulation Software instrumentation Software monitoring tools Software/hardware partitioning SPMD Stack operations folding Star network Statecharts Statistical analysis Superscalar processor System design System-on-a-chip
285 59 237 175 59 311 387 403 221 403 255 1 325 17 199 137 403 367
Task allocation/assignment
267
Unicast
193
Vertex symmetry Virtual cut-through Virtual prototyping VLSI architecture Wallace trees Workload characterization
325 37 17 337 125 199