Journal of Microcomputer Applications (1985) 8, 4748
LETTER TO THE EDITOR
Subroutines
in a non-RAM
8085 system
Sir, I should like to describe a simple technique for the implementation of a subroutine call in an 8085 system having no RAM memory. Industrial controllers based on microprocessors are often used only to move machines through a preset sequence of operations. Such control sequences rarely need to be selfmodifying and hence can be implemented using only Read Only Memory (ROM). A ROM-only memory structure has the advantage that it is cheap to implement and consumes little power compared to a system which also employs Random Access Memory (RAM). However the lack of any RAM in the memory structure leads to a significant programming limitation in that, since modern microprocessors have software stacks, the CALL instruction cannot be used, The penalty of not being able to use subroutines is obviously an important factor in terms of program efficiency, since many programs will require similar operations in different sections of the overall sequence. Without the facility to use a stack such routines must be replicated several times within the program. Such a situation arose when it was necessary to modify a machine controller in order to introduce a delay routine in several parts of the original program. The hardware design of the controller was fixed, and was indeed a ROM-only system. Though some spare memory capacity was available for the original controller program, including the delay routine several times exceeded the spare memory available. This led to the development of a programming technique which allowed a single level CALL to subroutine to be made in a system having a non-RAM memory structure. The technique was implemented on an 8085 system (Intel, 1978) and used register pairs H-L and D-E to hold the subroutine and return addresses. The following excerpt shows how this method is used. Label
Statement
Comment
LX1 D, DELAY
Set D-E to location of DELAY routine
XCHG LX1 D, $+4 PCHL [Return Add.]
This is the call to the subroutine. Subroutine address is forced into H-L and D-E is set to return address. Program counter is force to subroutine address
DELAY: [Delay Routine] t t XC HG PC HL
Following DELAY routine subroutine address is returned to D-E (ready for next ‘CALL’) return address is transferred from D-E to H-L and then forced into program counter
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1985 Academic Press Inc. (London) Limited
48
Letter to the Editor
Reference Intel 1978. MCS-85 User’s Manual,
Intel Corp., Santa Clara, Ca.
Department
A. E. Adams, of Electrical, Electronic and Control Engineering, Sunderland Polytechnic, Sunderland SRI 3SD, UK.