World Abstracts on Microelectronics and Reliability Using a common set of parameters, five importan~ reliability prediction procedures for integrated circuits are)compared. Detailed results are presented for many component l'amilies according to technology and complexity. The impact of differences among the procedures, which are stunning, is considered.
Surface mount digital package reliability. WILLIAMJ. ROESCH. Proc. a. Reliab. Maintainab. Syrup., 318 (1986). This paper compares the reliability of four surface mount package styles with the standard through-hole package. Three test boards were fabricated and subjected to environmental and electrical stresses. The relative package performance of SOICs, butt-soldered DIPs, surface mounted DIPs, and through-hole DIPs was found to be equal when subjected to stresses exceeding those expected in normal use. PLCC packages were found to be slightly less reliable in humidity environments than the other packages. Reliability of CRT. The life-span of CRT and the accelerated evaluation method. TOSmHISA MASUDA. Proc. 15th Symp. Reliab. Maintainab. (Union of Japanese Scientists and Engineers, Tokyo), 23 (1985). The life-span of a piece of equipment which uses CRT is decided by the life of CRT, therefore its reliability and especially its life-span is a matter of primary concern. In this paper the reliability of CRT is evaluated according to a gradual failure model, not to a random failure model.
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Results of the investigation of the life-span of CRT which has been made over a long period are reported and a proposal is made using the accelerated evaluation method on the gradual failure model. A long period is necessary to obtain the results.
New #astic molded power devices for high reliability. FuJIo WADA, KENICHI TATENOand MASAMIYOKOZAWA.Proc. 15th Syrup. Reliab. Maintainab. (Union of Japanese Scientists and Engineers, Tokyo), 11 (1985). In recent years hermetic(can) types package of power transistors have rapidly been replaced by plastic molded packages. The purpose of this change is to make electrical equipments small in size, light in weight and to reduce their cost. However, the plastics molded transistor has the following problems: (1) thermal fatigue of die bonding materials; (2) lead wire opens; (3) stability of leak currents at high temperature. The thermal fatigue on power devices has been reported by many investigators. This report describes a new package suitable to improve the thermal fatigue and the mechanism of thermal fatigue failure based on oxidation of soft solders. Yield analysis and improvement of CCD devices. H. J. F. PEUSCHER and D. J. L. BEEM. Solid St. Technol., 111 (February 1986). The use ofa CCD memory array as a yield monitor and the development of a yield model is described. A model directed shrink design and the use of a wafer stepper resulted in yield improvement and more good dies per wafer in production.
3. CIRCUIT AND SYSTEMS RELIABILITY, MAINTENANCE AND REDUNDANCY Availability of a system with permissible repair time. HIROFUM~ KOBAYASm, MASAVOMI SASA~ and SmOERU YANAGI. Proc. 15th Syrup. Reliab. Maintainab. (Union of Japanese Scientists and Engineers, Tokyo), 1 (1985). In the operation of a fighter squadron, the turn-around-time (time interval from a landing time to the next take off time after rearming) is very important. When a fighter fails, its repair and rearming begins just after the landing. If this repair is completed within the turn-around-time, it takes off for the next mission on time. We term this turn-around-time the permissible repair time (PRT). We do not regard the system as down if the elapsed repair time is less than PRT, In this report, we analyze the availability of a system with PRT. Two models are considered here. In model 1 the system is a 1-unit system (one fighter). In model 2 the system is a kout-of-n:G system (one squadron).
Trends and targets of high reliability test techniques for computer system. KOHEI FUKUOKA and SATO~I~ TADEMURA. Proc. 15th Syrup. Reliab. Maintainab. (Union of Japanese Scientists and Engineers, Tokyo), 3 (1985). Today, what is the most important in testing computer systems is to detect their logic design faults at the earliest possible time while effectively implementing varieties of test techniques in advance of hardware production. In the past, high reliability test techniques have been viewed as part of the production technology, testing devices and systems for their expected performance in the production and inspection processes. Recently, a new concept is being highlighted which takes into account the verification, testing and diagnostic techniques from the development process on, as witnessed by the direct coupling of CAD and testing. This paper describes how effectively we have been realizing the techniques for design verification and high reliability testing in the logic simulation of product quality test programs, and in what way we have implemented the coverage test technique to evaluate by quantifying the quality of products. Designing sequential life test with type I censoring. HIROAKI
SANDOH and SUSUMU FuJn. Proc. 15th Syrup. Reliab. Maintainab. (Union of Japanese Scientists and Engineers, Tokyo), 45 (1985). Type I censoring is useful to save both testing time and costs in a life test such as fatigue life tests of metallic materials. In Type I censoring, the censoring time and the number of items to be tested must be previously determined. When items are sufficiently prepared, the sequential life test is effective which revises the censoring time making use of the information newly-obtained in a test for previous item. From this viewpoint, this study discusses designing the sequential life test with Type I censoring under the assumptions: (1) only a testing machine is available; (2) there is no restriction on the number of items to be tested; (3) the underlying life distribution is the Weibull distribution whose probability density function (pdf) is given by p(ylct, fl)= ctfly~-' e x p ( - c t J ) ; (4) the value of the shape parameter fl is known.
An availability prediction method for computer systems. HIDEO IWAMA and KOHICHI MIKAML Proc. 15th Symp. Reliab. Maintainab. (Union of Japanese Scientists and Engineers, Tokyo), 89 (1985). The availability of a repairable system can be expressed as either the probability of system maintaining its function during a specified time or the rate of duration a system is functional. Practically, availability is almost expressed as the ratio: Availability = MTBF/(MTBF + MTTR) This number however, does not distinguish between a system which has ten system incidents per month, requiring 3 minutes of recovery time per incident and a system which has 1 system incident per month, requiring 30 minutes of recovery time. Although both systems have 30 minutes down time per month, their differences are important for some applications. Consider a banking online system, for example. The former results in a system failure that may not be detected by the end users but the latter results in a 30 minutes interruption of service which is a significant impact to the users.