Switching characteristics of polysilicon MISS devices

Solrrl-Sam Electronrcs Printed in the USA.

Vol. 27. No. 11, pp. 937-944.

1984

0038-1101/84 %3.00 + x70 Pergamon Press Ltd.

SWITCHING CHARACTERISTICS OF POLYSILICON MISS DEVICES J. MARTINEZ and J.

PIQUERA!3

Laboratorio de Semiconductores, Instituto de Fisica de1 Estado Solido (C.S.I.C.-U.A.M.), Madrid-34, Spain (Received 3 November 1983; in revised form

Cantoblanco,

15 February 1984)

Abstract-Experimental results on MISS devices are reported. The insulating layer was obtained by means of electron gun evaporation of undoped polycrystalline silicon. A model taking into account the specific conduction mechanisms in the semi-insulating polysilicon layer has been developed. This model explains the experimental I-V characteristics and gives rise to a switching condition relation similar to that of p-n-p-n

devices. 1. INTRODUCTION

Switching

I-V characteristics in metal-insulatingsemiconductor-switching (MISS) devices have been

reported recently in many papers. In most of the works the insulating region was a thin silicon dioxide layer [l-3]. However one of the major drawbacks is the control of the uniformity of the SiO, layer thickness, typically about a few tens of Angstroms. Thicker insulating materials like silicon nitride[4], tin oxide[5], and polycrystalline silicon, grown by CVD[5, 61 also give rise to negative differential resistance in the I-V characteristics. A lot of work has been done to establish a theory of operation of this kind of device. The first quantitative model, which essentially consists of “punch through” or “avalanche” of the base region, was due to Simmons and El-Badry[7]. Later the model was completed by Buxo et al.[3] taking into account possible inversion phenomena in the base region near the interface with the SiOz layer. Most of the reported models refer to thin SiOz MISS devices and assume tunnelling transport across the thin insulating layer. However, in other semi-insulating materials like Si,N,, SnO, or polycrystalline silicon, the conduction mechanisms are drastically different from that in thin SiO, and need a separate study. Recently, Adam and Zolomy[8] have reported a qualitative model which explains the operation mode of a MISS device like the combined action of two coupled devices. In this paper we present the experimental results obtained in MISS devices whose insulating layer consists of undoped polycrystalline silicon evaporated with electron gun. A model, which takes into account the specific electronic transport across the polysilicon layer, is proposed. The model predicts the two states of the device and establishes that the switching mechanism is somewhat similar to that of p-n-p-n devices. 2. SAMPLE

PREPARATION

The MISS devices were prepared different types of epitaxial slices: P+-N,

upon

epitaxial layer thickness - 12 pm; resistivity 0.15 Q cm.

two

N +-P, epitaxial layer thickness - 20 pm; resistivity -12Qcm. The polysilicon layers were evaporated by electron gun from undoped polycrystalline silicon in an ultrahigh-vacuum system. During the evaporation the chamber pressure was below 10m6Torr and the sample temperature was maintained constant between 600 and 800°C. The growth rate was around 50 A/min and typical thicknesses ranged between 0.1 and 1 pm. By inspection in a scanning electron microscope, the grain size appears to be rather uniform over all of a given slice surface being between 0.4 and 0.5 pm for a deposition temperature of 800°C while at 600°C ranged from 0.2 to 0.25 pm. Aluminum contacts were finally evaporated on top and back surfaces. The active area of the devices was 4 x 10e3 cm2. In most of the series, the devices were isolated from each other by thermal oxide between them. In order to evaluate possible effects of the thermal generation below the “field oxide”[9], some of the devices were isolated in a different way. In these last series, the polysilicon and the epitaxial layer were etched off down to the NC or P+ substrates. However, no significant differences between the characteristics of the devices isolated by the two methods were found. 3. EXPERIMENTAL

RESULTS

All the reported with a substrate

results refer to series fabricated temperature around 700°C because

the best switching characteristics were obtained for this temperature. When the substrate temperature during polysilicon evaporation was around or over 800°C bad or soft switching characteristics were observed. The structural and electrical characteristics of the different device series are summarized in Table 1. As can be seen, both, switching and holding voltages, V, and VH, increase with the polysilicon layer thickness whereas the switching current, 1, remains virtually constant. This fact seems to suggest that 1, depends only on the epitaxial base and substrate characteristics and not on the polysilicon layer thickness.

938

J. MART&Z Table

SERIE

SUBSTRATE

and J. PIQUERAS

1. MISS switching

BASE RESISTIVITY

device characteristics

BASE THICKNESS

(Q cm1

(!an)

POLY-SI THICKNESS (urn)

IS "H VS (volt.) (InA) (volt.)

IH

(IRA)

SWNl

P+ N

0.15

12

0.1

10-12

0.7

4

10

SWN2

P+ N

0.15

12

0.2

18-21

0.7

5

10

swN3

P+ N

0.15

12

0.4

Bad switching characteristic

SWPl

N+-P

12

20

0.15

SWP2

N+-P

12

20

0.2

N+-P

12

20

>0.3

SWP3

9-10

0.02

1

1

16-20

0.02

2

8

Bad switching characteristic

SWP4

The series with the largest polysilicon thickness exhibit bad switching characteristics and, moreover, in some cases the devices burned out when switching was attempted. Figure 1 shows a standard I-V characteristic, curve (a), of a device belonging to the SWNl serie. The I-V characteristic in the OFF state shows a region in which the logarithm of the current varies linearly with the applied voltage. In this region an ideality coefficient, n = (qV/kT)/ln (Z/J”) where Z, is the current extrapolated at V = 0, of about 117 is found. Later the current increases strongly with voltage up to a point where the devices switch to the ON state. Figure 1 shows the I-V characteristic, curve (b), of a typical device of the SWP 1 serie. The OFF characteristic is somewhat different from that of the

4.

I(mal

32

4. THEORY OF OPERATION

* *

24 * * *

16 6 I

i *A *f * * I*

Fig.

SWN series. For low applied voltages the devices show a behavior similar to a saturation current, but, for larger voltages the current increases smoothly up to the switching point instead of the sudden current enhancement observed in the SWN series near switching voltage. The OFF characteristic variation with the temperature of a SWNl device is represented in Fig. 2. The ON state does not change appreciably with temperature, that is, only a change of a few tenths of a volt is needed to maintain a given current in all of the temperature range explored. By extrapolating the linear region of the OFF characteristics the different values of I, were found. From a plot of In IF vs l/kT a straight line with a slope of approximately 0.39 eV may be found.

*

1. I-V characteristic of a typical MISS device. (a) Curve (*) SWNl serie. (b) Curve (+) SWPl serie.

A MISS device can be considered as consisting of two active devices. A bipolar transistor in which the P+(N+) layer acts as the emitter, the N(P) epitaxial layer is the transistor base and the insulatingsemiconductor junction plays the role of the collector junction. The other device is obviously the MIS diode. In the section which follows we will consider in detail the electronic transport across a MIS diode whose insulating layer consist of semi-insulating polycrystalline silicon. These results are used in a later section to develop a model for the complete MISS device. (a) MIS diode In order to have a simplified picture we will consider a one-dimensional model in which the polysilicon consists of only one grain. This hypothesis is not too far from the actual situation because of two reasons. First, the growth of a polysilicon layer tends to occur in the form of columnar shaped grains with their axis normal to the substrate. Second, the grain

Switching characteristics of polysilicon MISS devices

939

Fig. 2. I-V characteristics in the OFF state showing the effects of changing temperature for the device of Figure 1.

sizes were of approximately the same magnitude as the layer thickness. In the first place we will treat MIS diodes with an n-type semiconductor. The model will be extended later to p-type material. At the interface between the n epitaxial layer and the polysilicon there are surface states, a part of which may be charged. This negative charge, Qr, trapped at the interface must be compensated by the charges of the depletion region in the n-type base and the evaporated polysilicon. However, the polysilicon contribution to the charge balance is negligible because this layer is much thinner than a Debye length, around 50 pm for undoped silicon. Under these conditions, a good approach must be to consider flat bands in the polysilicon layer such that the band bending occurs only in the base region (see Fig. 3). If the interface states density is high enough, the Fermi level of the base region, EF, is pinned at the neutral level of the interface, EFo, as in the case of a Schottky barrier. Thus the built-in potential

Under these conditions the Fermi level of the evaporated layer is fixed by the neutral level of the interface and, consequently, the equilibrium carrier concentration is separated, but not too far, from the intrinsic situation being almost entirely determined by the interface. Next, we will analyse the MIS diode negatively biased because these are the conditions of the MIS structure under which the Pi-N MISS devices switch. Assuming that the quasi-neutrality condition, An u Ap, may be applied, then the continuity equation, which determines the carrier excess inside the evaporated layer, becomes

d2Ap ---= dx2 where L, is the ambipolar as L,E

qV,=

EF-

AP L:

EFo.

o ’

diffusion length defined

2fv.y

J -

b+l

(2)

’

where T is the lifetime and b the electron to hole mobility ratio

-

---+ ; T

--_a-’

-I

b = ~.i~p. Metal

(3)

The general solution of eqn (1) can be expressed as

Ap = An = Ap(0)

sh L-x (-1 4I 4

L/L,

1

+ AP(L)

sh( x/L,

)

sh( L/L,)

’

(4) _.

w

L

Fig. 3. Band diagram of a MIS diode in equilibrium.

where Ap(0) is the carrier excess in the base junction at x = 0, Ap(L) is the excess at the metal interface, and L is the thickness of the polysilicon layer.

J. MARTINEZ and

940

The total current electron contributions

J P = qp

is the

sum

of the

hole

+ Ap)< - V

and

J.

PIQUERAS

dp(L)/n,,B

1, that

AP(L) --+h(L/L,)a,-ur d no

(5a)

9,

(13)

where we have defined

Jn=qb& (no+Ap)S +

Vr$1,

(5b)

Jdzq+lo,

(14)

d

where 5 is the electric field, n, and p. represent the equilibrium carrier concentrations (V = 0), and V, is the temperature equivalent voltage V, = kT/q. By adding (5a) and (5b), a relation between the total current and the electric field can be obtained

a* = (s,

- ctgh( L,Ld))

and

_SLd.b+l

s

‘=+p,+bn P

b-l

-

R

+;h+l)Ap

0

dAp .__ dx

po+bno+(b+l)Ap

This relation may be used to eliminate and (5b), resulting in

J, = -b~lR,-qP&(l+~RP)~,

(6)

t; in eqn (Sa)

J =

Jk(l

where

;-RpCb+l

J

d

as

RP1!‘+&g!r.

(9)

1-R

R,=l++.

%

Wgh(L/L,)-1

(18)

$-ctgh(L/LD)

It is useful to discuss eqn (17) under certain conditions. Assuming that, due to interface states, the Fermi level of the evaporated layer is pinned above t h e midgap, n, % po. When Ap(O)/n, + 1, Rp becomes negligible whereas if Ap(O)/n, C- 1, R, tends to unity. Now, we can see from eqn (17) that J increases when Ap(O)/n, grows. If we assume that 1

Jnlx=L = @‘p(L);

(11)

(b) At x = 0 the hole current must be equal to the diffusion current injected from the n-type region. Since, the polysilicon-epitaxial junction is negatively biased, this must be a reverse saturation current, J,. =

-Jr

2

b-la, (19)

bf12’

form 1 a, < -, b

(20)

then, under these conditions, for a given value of Ap(O)/n, 4 I and consequently Rp < 1, the current tends towards infinity. In other words, it is possible to have a current as large as desired, having a limited carrier excess injected from the epitaxial layer junction. The voltage drop in the polysilicon layer may be obtained by integration of the electric field given by (6)

(12)

Ap given by (4) in eqn (6) and taking condition (a) it is obtained for

1 a,<---b+l

or in a more simplified

I

v<;= By introducing into account

+J.

(JO)

It must be noted that under high injection conditions, Ap 9 no, po, and both R, and R, tend to unity. In order to determine the carrier excess at both interfaces of the polysilicon layer, we impose the usual boundary conditions: (a) At the metal interface the electron recombination velocity is S and thus

Jplxzo

+&+,)y

(b) we

1 ---(7)

R, and R, are defined

(16)

VT/.$ 26’

With these results and using the condition can be obtain

J,=

where

(15)

sh( L/L,)

s 1.


dx

q’“pno o~+b+(b+l)---

Ap(x) no

(2’)

Switching characteristics of polysilicon MISS devices

941

I(m

. T=l00OC * + * 0

T=77OC T-53’C T-29OC T== 2OC

V(v 4

6

a

10

12

,

14

Fig. 4. Temperature effect on the I-V characteristics for a MIS diode negatively biased. Substrate n-type.

where we have neglected b-l -. b+l

the term

V *,yo + bno + (b + 1)A.G) ’ p,, + bn, + (b + l)&(O)

.

Since V, is small, an extremely high injection is needed, L@(L)& Q(O), for this term be an appreciably contribution to VG. By introducing dp given by (4) and dp(L)/n, given in eqn (13) and taking into account that Ap(O)/n, < 1 and ~,,/n, 6 1, it can be obtained

Calculating the integral[lO] and taking into account that as J increases, the second term of the integrand denominator becomes dominant [(J/J,) . (b + 1)/2]a, 9 b, the current may be expressed as J=J&

cW(

&-)$=P(

a,(b+l)$$).

(23) This relation between J and VG has the usual exponential form with an ideality coefficient given by 2 n=cc,(b+

(24)

In addition to the polysilicon voltage drop, a voltage, V,, associated with the depletion region of the n-epitaxial layer, must be taken into account. This potential could be determined by equating the depletion charge of the epitaxial region to the change of the interface trapped charge due to the injected carrier excess. This calculation is not straightforward and needs a precise knowledge of the energy distribution and capture cross sections of the interface states. However, if we take into account that Ap(O)/n,, G 1, and, thus the electron quasi-fermi level remain un-

changed, we would expect that the charge trapped at the interface should not change appreciably and thus the voltage drop at the epitaxial junction would be negligible, becoming Vb G VF. Thus, the current-voltage characteristic of the MIS device may be obtained only by equating V, with the total applied voltage, V, in relation (23). In order to prove the validity of this model, MIS diodes were fabricated by the same technological procedure used for MISS devices. For this purpose, non-epitaxial n-type slices with a carrier concentration of 10’6cm-3 were used. All the MIS diodes have similar I-V characteristics. Figure (4), shows the temperature variation of the I-V characteristic of a diode with a 0.25 pm thick polysilicon layer. By fitting the exponential regions of the characteristics we found that the pre-exponential factor is activated with an energy of about 0.37 eV, very similar to the 0.39 eV value found in MISS devices. This energy may be related with the pre-exponential factor of eqn (23) where the only term which changes appreciably with temperature is Jk Repeating here eqn (14)

Jd=FVTno= d it is noted

qN,exp(

T),

(25)

that E, - EFo = 0.37 eV,

(26)

and, thus, the neutral Fermi level at the interface lies 0.75 eV above the valence band. From the slopes of the fitted straight lines, a value of n N 100 is obtained for this temperature range. According to the definition of n given in eqn (24) and assuming a value of b ir: 2.5 (similar to that for monocrystalline silicon), a value of c(, N 6 x 10m3 can be calculated. The case of a MIS diode with p-type silicon may be treated in a similar way. In this case, under normal operating conditions of the MISS devices, the MIS

942

J. MART&Z and J. PIQUERAS

diode is positively biased. Now the boundary condition (b) says that the electron current, at the interface between the polysilicon and the base, must be equal to the saturation current, -J,, injected from the base. An equation similar to eqn (17) can be derived

reaching

the polysilicon-base

interface

Jplx =

has the form

%J,

0 =

(31)

being CI~the common base current gain of a transistor. By changing condition (b) of a MIS diode by relation (31) it is found that

J = (32)

where a,={[SR+ctgh/(L/Ld)]sh(L/L,)}~‘, If the following

condition

is fulfilled

(28)

co

and

a,+-<---2

&ctgh(u~d) +1

J,=J

d

(29)

d s,+ctgh(L/L,)

or, rearranging

1

b - 1 CC,

b+l

bf12’

terms,

However, according to the definition of R, given by eqn (lo), when Ap(O)/n,, Q 1 then R, N b + l/b and eqn (27) simplifies to

d-

(34) then we arrive at the same situation as in MIS diode with Ap(O)/n, & 1 and the current-voltage relation will have the same form

/ Ap(O)+J J=-

s no

(30)

l-a,/2

J=Jd&

Now, when J increases, Ap(O)/n, becomes negative. The maximum negative value that Ap(0) can reach is -pa and thus the current tends to saturate. This behavior has been found experimentally as shown in Fig. (5). This I-V characteristic corresponds to a MIS diode with a 0.2 pm thick polysilicon layer evaporated on a substrate of carrier concentration around 2 x lOi cm-‘. (b) M-I-N-P+ devices In the normal operating mode the P+-N junction is directly biased. Thus the hole injection current

x

8 7 . 6 5 .

ct&( &-)$exp(a,(b+l)$$). (35)

Since the voltage drop at the P+-N junction is negligible compared with V, we can use the same arguments as in the MIS case to equate V, with the total applied voltage, I’. Equation (35) describes the behavior of the device in the OFF state. Since in the polysilicon near to the interface with the n-type base Ap/no Q 1, a large voltage drop in the polysilicon is needed to have an appreciable current. More detailed calculations show that there are many factors which affect the a2 value when the current changes, but, in general, ~1~increases with the applied voltage and the current across the device[l 11. If there is some current value for which the relation (33) is not fulfilled we have, from eqn (32), that Ap(O)/n, can increase with the current and may become much larger than unity. In this case RP N 1, and eqn (32) may be rewritten as

4 -

dbtl

J= cl2 +

2 -

V(v) ‘0

26 AP(O)

J,

3 .

I

I

I

4

Fig. 5. I-V characteristics

8

12

16

(33)

20

for a MIS diode positively ased. Substrate p-type.

bi-

u,

A

n, h

b+l

-__

1 .

(36)

bfl

Thus, a linear relation between the current and the carrier excess exists. In this situation, the carrier excess in all the polysilicon layer is higher than the equilibrium carrier concentration, and the voltage drop may be derived in the same way as in eqn (21).

Switching characteristics of polysilicon MISS devices

943

an inversion layer will be formed and the voltage needed to compensate the trapped charge becomes small. These situations are schematically represented by the band diagrams in equilibrium, ON and OFF states as shown in Fig. (6). 5. CONCLUSIONS

As mentioned above the polysilicon voltage drop must be larger than the remaining drops, that is, the polysilicon-base voltage, I’,, and the P+-N voltage, I$ Otherwise, an exponential relation between current and voltage couldn’t be obtained in the OFF state. This situation is different from that of a thin SiOr MISS device in which case the largest voltage drops in the depletion region of the n-type base. Furthermore C-V measurements do not show the typical behavior associated with a depletion region formation in the base. The thermal activation of the pre-exponential factor, in the I-V characteristics of MISS devices, defines the neutral Fermi level of the interface states as it occurs in the MIS diodes. The ideality factor of the I-V curves is given by

q 'G

2 n = ___ = -?(S, - ctgh(L/Ld))sh(L/Ld). a,@ + 1) b + 1

Si -p

Si -17

Si - poly

Metal

Fig. 6. Band diagram of the MISS device in (a) equilibrium, (b) OFF state, (c) ON state.

Considering @(0)/n,, 9 1 and Ap(L)/q, age may be expressed as

Thus, n will increase with polysilicon layer thickness in agreement with experimental results. From the discussion in the above section the switching condition may be written as

$ 1, the volt-

Because of the experimentally found values of n > 100, the first term on the left hand side of the above equation becomes dominant. Thus the switching condition may be simply expressed as 1 a2=6+1.

(37) By introducing Ap(0) from (36) and Ap(L) from (13) an analytical expression for the current-voltage relation can be obtained. Because Ap(0) and Ap(L) are both proportional to J, eqn (37) states that Vc does not depend on J except for the dependance of c(~upon J. We can identify this situation with the ON state of the device. Furthermore, in the ON state, the voltage drop is lower than that in the OFF state, because in the last case there is a large voltage drop in the region where Ap/q, < 1, while in the ON state Ap/n, % 1 and thus the voltage drop becomes smaller. Now, we will consider what happens in the n-type base region. When the carrier excess at the interface increases, more interface states become charged. Consequently, a depletion layer will increase and the voltage drop at the interface, Vb, will become important. Notwithstanding, if Ap(0) becomes larger than ND, the donor concentration in the base region,

This important is essentially semi-insulating experimentally depends only (see Table 1).

result states that the switching current independent of c(, and thus of the layer characteristics. This is proved by the fact that the switching current on the P+-N (N+-P) characteristics

Acknowledgements-The Bux6 and A. Adam discussions.

for

authors their

wish to thank Drs. J. helpful suggestions and

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and H. Morimoto,

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A. El-Badry and J. G. Simmons, Solid-St Electron. 20, 963 (1977). 3. J. Bux6, A. E. Owen, G. Sarrabayrouse and J. P. Sebaa, Revue de Physique AppliquP 13, 761 (1978). 2.

944

J. MART&Z

4. H. Kroger

H. Wegener,

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K. Dobos,

6. 7. 8.

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PIQUERAS

9. K. A. Duncan, P. D. Tonner, J. G. Simmons and L. Faraone, Solid-St. Electron. 24, 941 (1981). 10. See for example I. S. Gradshteyn and I. M. Ryzhik, Tables of Integrals Series and Products, p. 107 (2441.3). Academic Press (196.5). 11. E. S. Yang and bl. C. koulgaria, Solid-St. Electron. 10, 641 (1967).