Synthesis and design of constant phase elements based on the multiplication of electronically controllable bilinear immittances in practice

Synthesis and design of constant phase elements based on the multiplication of electronically controllable bilinear immittances in practice

Accepted Manuscript Regular paper Synthesis and Design of Constant Phase Elements Based on the Multiplication of Electronically Controllable Bilinear ...

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Accepted Manuscript Regular paper Synthesis and Design of Constant Phase Elements Based on the Multiplication of Electronically Controllable Bilinear Immittances in Practice Roman Sotner, Jan Jerabek, Jiri Petrzela, Ondrej Domansky, Georgia Tsirimokou, Costas Psychalinos PII: DOI: Reference:

S1434-8411(17)30310-2 http://dx.doi.org/10.1016/j.aeue.2017.05.013 AEUE 51884

To appear in:

International Journal of Electronics and Communications

Received Date: Revised Date: Accepted Date:

11 February 2017 26 April 2017 8 May 2017

Please cite this article as: R. Sotner, J. Jerabek, J. Petrzela, O. Domansky, G. Tsirimokou, C. Psychalinos, Synthesis and Design of Constant Phase Elements Based on the Multiplication of Electronically Controllable Bilinear Immittances in Practice, International Journal of Electronics and Communications (2017), doi: http://dx.doi.org/ 10.1016/j.aeue.2017.05.013

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Synthesis and Design of Constant Phase Elements Based on the Multiplication of Electronically Controllable Bilinear Immittances in Practice

Roman Sotnera,b, Jan Jerabekb, Jiri Petrzelaa, Ondrej Domanskya, Georgia Tsirimokouc, Costas Psychalinosc

a

Department of Radio Electronics, Faculty of Electrical Engineering and Communication, Brno University of Technology, Technicka 3082/12, 61600 Brno, Czech Republic b

Department of Telecommunications, Faculty of Electrical Engineering and Communication, Brno University of Technology, Technicka 3082/12, 61600 Brno, Czech Republic c

Department of Physics, Electronics Laboratory, University of Patras, GR-26504, Rio Patras, Greece

Abstract:

The main aim is the investigation of practical aspects of synthesis of so-called active constant phase elements (CPE). The proposed synthesis is based on the multiplication of partial bilinear immittance segments with electronically adjustable locations of zero and pole. An overview of already known methods for the synthesis of active types of CPE is given and explained as the initial motivation of this work. This work introduces a solution of new simplified two-active-elements-based bilinear immittance and investigates its implementation in loop of operational-transconductance-amplifiers-based impedance converter operating as a general immittance multiplier of a theoretically infinite number of partial immittance segments. The presented results show practical consequences of applying these bilinear immittance segments in CPE synthesis. The most important advantages of the presented proposal are: simplified circuitry of a partial bilinear segment and mutually independent electronic and linear control of zero and pole frequencies allowing electronic reconfiguration of the order of CPE. The design is accompanied by a detailed analysis of real behavior and practical recommendations for design. Real non-ideal features of active elements have significant impact on CPE operation. Therefore, a detailed study of practical aspects has been prepared and supported by Matlab calculations. Conclusions resulting from analyses are supported by PSpice simulations and real experiments.

Keywords:

Bilinear immittance; constant phase element; electronic reconfiguration; fractional-order synthesis; immittance multiplication.

1

1. Introduction

Fractional-order systems are receiving increasing attention from research groups throughout the scientific society due to the character of behavior reflecting many natural physical systems [1]. Analog electronic systems may represent fractional-order behavior quite precisely and create credible models for various areas of scientific research [2], [3]. Therefore, various methods for synthesis of electronic circuits are very important for modeling and representation of fractional-order systems, especially in the case of organic matter (fruit [4], [5], for example). Discussion of an ideal pure fractional-order device is possible only in the theoretical sphere of abstraction and fractional-order behavior can only be approximated in real cases. In other words, a detailed description of fractional-order systems requires precise knowledge and implementation of advanced mathematical tools or, in many cases, an analytical solution does not even exist. However, it is not strictly required if some simpler and valid approaches are sufficient for these purposes. The degree of simplification always depends on the acceptable level of accuracy of the real description of fractional-order behavior in a limited section of observed dependence. Theoretical works discussing how to approximate fractional-order behavior by integer-order polynomial expressions have been reported. This approach is suitable for the field of electronic circuits and systems (for example [6]-[11]). The simplest fractional-order electronic device (in terms of a two-terminal element) is known as the so-called constant phase element (CPE). The CPE device can be generally characterized as immittance (impedance or admittance) with fractional-order character, i.e. ZC_inductance(s) = sαLα, ZC_capacitance(s) = sαCα-1, where α = {0, ±1}, i.e. resistor for α = 0, integer-order inductance for α = 1 or capacitance for α = −1. An ideal CPE behaves as impedance with increasing /decreasing magnitude (for ZC_ind or ZC_cap) with slope ±20⋅α dB/dec and constant phase response ±90⋅α degree for 0 < α < 1. Note that some references understand CPE as a device with character of capacity character having negative phase shift. Nevertheless, “constant phase” response of the immittance function is also available in the case of inductive character having positive phase shift and an increasing magnitude slope character). There were several attempts to create CPE (for example [12]-[15] from recent years) in the form of a two-terminal packaged device. These fabricated devices have organic and inorganic groundwork in the form of, for example: electrochemical materials [12], [13], polymer composites [14], thick film layers of resistive, dielectric and insulating materials on silicon [15], etc. However, their fabrication can be very demanding from a technological point of view; their features and parameters may have certain time stabilization (shown in [13]), etc. Therefore, implementation of these devices into practice is very complicated and none from the reported devices are available on the market. Due to unavailability of true CPEs, researchers are using approximating methods of CPE synthesis based on the representation of a two-terminal device by networks of integer-order passive elements. These methods of synthesis are based on specific types of ladder structures (RC, RL). Many approaches have been presented in recent years, see for example [16]-[20] and references cited therein. This type of approximation leads directly to a fraction-order device (CPE) with certain accuracy (phase ripple or error) in limited frequency bandwidth dependent on the complexity of the overall solution of CPE that is dependent on the number of passive elements. Unfortunately, when such a passive CPE is fabricated (for example in accordance to approaches described in [16]-[20]), no further change of CPE character is possible (fractional inductance→capacitance, value of α, etc.). Therefore, methods of synthesis of CPEs with active elements are beneficial due to the possibility of changing the features of the CPE electronically. However, overall circuitry can be very extensive as well as its power consumption. Paper [21] indicates the possibility of obtaining CPE from cascade of bilinear sections (first-order transfer responses with independently adjustable zero and pole frequency) and feedback of output voltage through the voltage-to-current converter directly to the input

2

terminal. The synthesis introduced in [22]-[25] utilizes features of fractional-order filtering response obtained from a method based on approximation of a fractional-order filter by a standard integer-order structure of nd rd higher order (2 and 3 order in many cases). This filtering response at the output terminal is taken as feedback back to the input terminal in the form of current after V→I conversion. Works [22] and [25] utilize current feedback operational amplifiers (CFOAs) [26] in the filter stage as well as for V→I conversion. Works [23] and [24] employ a very similar method of synthesis but with controllable operational transconductance amplifiers (OTAs) [26] that offer electronic control of parameters of the created CPE. The expected behavior of the solution in [24] was verified experimentally as an IC prototype fabricated in the AMS 0.35 µm CMOS design process. Study [27] brings another approach of CPE synthesis with active elements. The presented method supposes operation of multiplication performed for partial grounded bilinear immittance segments (first-order immittance with independent control of zero and pole frequency) instead of transfer sections. This method requires the creation of a high-order immittance function (some examples can be found in [28] and references cited therein). However, direct application of methods shown in [28] is not suitable for intended purposes. Therefore, a special type of impedance converter allowing general multiplication of infinite number of grounded immittances (ZC(s) = Z1(s)·Z2(s)·Z3(s)…) based on OTAs has been used. Each bilinear immittance segment utilizes three OTAs and a grounded capacitor. Detailed information about all discussed methods are organized in Tab. 1. Concluding the previous discussion, we can summarize that practically utilized methods of synthesis of active CPE are based on: a) transfer response of fractional-order two-port created from cascade of bilinear transfer sections with V→I conversion to input terminal [21], b) fractional-order transfer response based on a multi-loop feedback structure (approximation of fractional-order filter by integer-order filter of higher order) and subsequent V→I conversion of output response to input terminal [22]-[25], c) multiplication of bilinear immittance segments by a specific type of impedance converter (multiplying structure) [27]. Our approach and development presented in this paper deals with the last method because it has several degrees of freedom consisting larger variability and very simple modification of phase ripple and bandwidth of approximation by a simply changing the number of bilinear segments in the frame of the impedance converter. We should also note that works [29] and [30] where the character (inductance/capacitance) of fractional-order impedance can be changed by utilizing a specific type of Antoniou general impedance converter (Antoniou GIC [31]) and proper positions of passive elements in the structure. However, CPE used in the Antoniou converter itself is approximated by a passive structure (RC), therefore electronic control of α, etc. is not supposed. The important benefit of this approach is the simple way of creating a fractional-order inductor from a fractional-order capacitor [29] or operating passive CPE in all quadrants of the argument impedance plot [30].

Tab. 1. Comparison of relevant solutions and methods for synthesis of CPE based on active elements

3

Phase ripple

Order of approximation

Operational frequency range of approximation [kHz]

Simulation/Experiment

Method of synthesis

Simple/intuitive extension of approximation bandwidth (additional section only) Differential-mode possibility

Electronically controllable CPE character

Electronic control

Change between inductance/ capacitance character of CPE

Intended (tested) α /phase [-/deg]

Tested character of CPE

Number of active (type)/ passive devices

Work

0.25/22.5 [21]

3 (CFOAs)/12

ZC_ind

0.5/45

N/A

No

No

Yes

No

1

Yes/No

0.1→100

3

1 deg

*

No

No

No

Yes

2

Yes/No

0.13→7

2

10 %

2

5 deg

0.75/67.5 0.5/45 [22]

6 (CFOAs)/13

both

Yes −0.5/−45 −0.2/−18 −0.3/−27

simulated: −0.4/−36 [23], [24]

0.01→1 8 (OTAs)/2

ZC_cap

−0.5/−45

N/A

**

Yes

Yes

No

Yes

2

Yes/Yes measured:

−0.6/−54 0.03→0.5 −0.7/−63 −0.8/−72 0.5/45 [25]

6 (CFOAs)/13

both

*

No

No

No

Yes

2

Yes/Yes

0.1→6

2

10 %

**

Yes

Yes

Yes

No

3

Yes/No

0.03→100

7

1.5 deg

Yes

Yes

Yes

Yes

3

Yes/Yes

Yes −0.5/−45

[27]

29 (8+7 x 3 OTAs)/7

ZC_ind

0.5/45

this

17 (6+5 x 2 +1 + OTAs)/5

ZC_cap

−0.5/−45

N/A

measured: Yes

2.2→380 0.25/22.5

this

16 (6+5 x 2 ++ OTAs)/5

4.5 deg/ 10% 5

both

−0.25/−22. 5

measured: 0.056→219 Yes

Yes

Yes

Yes

Yes

3

Yes/Yes 0.070→95

−0.75/−67. 5

0.202→45

Explanations:

4

2.25 deg/ 10% 5 6.75 deg/ 10%

1

Cascade of bilinear transfer sections (filters) including V→I conversion back to the input terminal in single closed loop, operational frequency bandwidth dependent on the number of used bilinear sections 2

V→I conversion of fractional order-filtering transfer response approximated by integer-order filter of higher order (multi-feedback filtering system - inverting follow the leader structure) back to the input terminal, operational frequency range dependent on bandwidth of fractional-order filtering transfer response 3

Immittance multiplication of partial bilinear immittances in high-impedance nodes of single closed loop of impedance converter (behaving as multiplier), operational frequency bandwidth dependent on number of used bilinear sections *

Character of CPE can be changed only by using different values of passive elements

**

+

Character of CPE can be theoretically changed electronically because the proposed circuitry sets α electronically, but it was not tested

Additional dummy section (OTA7) is required in the presented example

++

Different sets of zero and pole frequencies used in order to verify simple change of α, operational bandwidth and frequency shift

The rest of this paper has the following organization: Section 2 introduces the general bilinear immittance segment definition, discussion of features of previously reported solutions, the newly proposed solution and its verification by simulation and experiment. Section 3 explains the used method step-by-step and provides an example of synthesis of CPE based on the newly proposed solution of bilinear immittance (segment) with capacitive character. Section 4 deals with investigation of the most important parasitic features caused by active elements in these structures of CPE. Section 5 shows simulation and experimental results. Selected examples operate with different α and character (capacitive/inductive) of CPE when real parasitic features of circuitry are neglected and also under unsuitable conditions where real features cannot be omitted. Section 6 provides a discussion of additional features and applications of CPE and Section 7 concludes the presented research.

2. Bilinear Immittance

The bilinear immittance (impedance or admittance) has the first-order polynomial form with roots of the numerator and denominator that are mutually independently settable. The simplest example of a general bilinear impedance segment has the following symbolical form:

Z i (s) =

1 s + ωZi , = Yi ( s ) s + ω Pi

(1)

where ωZi and ωPi are transfer zeroes and poles, respectively. These types of immittances may serve for intentional forming of magnitude and phase response of the immittance in the case of their proper interconnection similarly as cascade of bilinear transfer sections in [21], [32], [33] form magnitude and phase of transfer response of the two-port device. These immittances Zi(s) are usually suitable for synthesis of CPEs

5

because they ensure the possibility to set zero and pole frequency with some spacing to each other in order to create a theoretically unlimited row of alternating roots (zero1→pole1→zero2→pole2→… for ZC_ind(s) or pole1→zero1→pole2→ zero2→… for ZC_cap(s)) on the real axis in the complex plane. The number of pairs of roots from each segment and their mutual distances predetermine phase ripple and bandwidth of the approximated CPE where these immittance segments are properly utilized in complex chains providing immittance multiplication.

2.1 Discussion of previously reported solutions of bilinear immittances

Attempts to implement bilinear immittance by various types of active devices accompanied by passive elements [21] have been introduced. These passive elements serve simultaneously also for setting zero and pole positions. Such an approach has some benefits and also limitations. Utilization of minimal number of active elements decreases power consumption as well as complexity. Unfortunately, any change in the system (modification of α for example) requires a partial change of each individual Zi(s) that leads to changing the value of passive elements. This is not an easy task because very accurate values of passive components are required and capacitors and resistors are available in fabrication series (E12, E24, …). This leads to their serial/parallel combination. Electronic configuration of Zi(s) is therefore very important for future design. In addition, advanced control, reconfiguration (even change of character – from capacitive to inductive, i.e modification of α) are preferred to be controlled from some system producing control voltages or currents (outputs of D/A converters, for instance). It may serve for immediate reconfiguration of the system as shown for example in [34]. Of course, resistors can be replaced also by MOSFETs in triode regime or by digital potentiometers, however, these approaches cause other problems as dynamical and linearity restrictions, bandwidth limitation, etc. Especially stepwise change of resistance (in the case of digital control) with a wide distance of values (available number of bits for control) cannot be accepted if high accuracy is necessary. Therefore, the design of pure electronically controllable Zi(s) is welcomed. Electronically controllable Zi(s) offers simple and independent setting of zero and pole frequency by two DC control voltages or currents. Such circuitry of Zi(s) must contain electronically adjustable active element(s) or electronically adjustable elements replacing the function of passive elements in simple single active element based solutions [21], for instance. The first suitable circuit for construction of electronically tunable grounded bilinear immittance was introduced in [27]. However, the resulting bilinear immittance segment is quite complex (it consists of three OTAs and a grounded capacitor). Our research of new bilinear immittance has three goals which have thus far been unresolved. The first one is to develop a simpler solution of Zi(s) with respect to already published solutions. The second goal is to obtain simple and linear control of zero and pole frequencies of Zi(s). The last goal includes the study of real behavior of newly developed bilinear immittance in CPE synthesis and practical impacts of its implementation.

2.2 Design of improved bilinear immittance based only on two OTAs

The first reported OTA-based controllable bilinear immittance was presented in [27] (circuitry is shown in completely redrawn form in Fig. 1(a) for direct comparison with the new solution). Its symbolical impedance has the form:

6

g mYi Ci Z i (s) =  g g mZi  s + mXi Ci  s+

.

(2)

  

Presence of the non-essential (at this stage of explanation) gmZi parameter in (2) causes a certain increase of complexity of the overall CPE circuitry (see comparison of [27] and this work in Tab. 1) but it also has some qualitative benefits for synthesis as discussed in further text. We synthesized improved and simplified bilinear immittance circuitry that is shown in Fig. 1(b). The proposed bilinear immittance has the following symbolical expression with only two adjustable parameters:

Ci gmYi , Zi (s) = sCi + gmXi 1+ s

(3)

where zero and pole frequencies are given by ωZi = gmYi/Ci and ωPi = gmXi /Ci. It is obvious that gmYi and gmXi control zero frequency and pole frequency, respectively. Two OTAs and a single grounded capacitor provide the required immittance function (3). A pseudo-differential solution (more information on this topic can be found in [35] for example) suitable for differential systems can be utilized as shown in Fig. 1(c) where only an additional differential voltage buffer (DVB) and additional terminals of OTAs are required. This solution has the exact same impedance as (3), the only difference is that it represents a floating element.

a)

b)

c)

Fig. 1. Electronically controllable bilinear immittance segments based on OTAs: a) single-ended solution from [27] employing three OTAs, b) new single-ended solution based on two OTAs, c) pseudo-differential prototype of solution from Fig. 1(b).

In order to preliminarily verify the concept by available components without expensive fabrication of an integrated circuit, circuitry from Fig. 1(b) can be based on electronically controllable current conveyors (ECCIIs) [26] under commercial designation EL2082. The most important feature of EL2082 is its linear control of current gain B (B ≅ VSETB) and also high linearity of its transfer characteristic Iout = f(Vinp). Standard electronically controllable OTAs have a highly limited and nonlinear transfer characteristic Iout = f(Vinp). Implementation of these devices brings modified expression (3) in the form:

7

R R gmYi Ci 1 + sC i gmYi 1 + sC i B V g mYi gmYi SETB _ gmYi , Z i (s) = = ≅ B gmXi VSETB _ gmXi sC i + g mXi sC i + sC i + R gmXi R gmXi 1+ s

(4)

where electronically adjustable time constants (by current gains B) allow simple linear control of zero and pole frequency ωZi = BgmYi/(RgmYiCi) and ωPi = BgmXi/(RgmXiCi). The circuit structure is shown in Fig. 2 where three ECCIIs and two additional resistors are used and it represents practical implementation of the solution from Fig. 1(b).

Fig. 2. Practically implemented linearly electronically controllable bilinear immittance segment based on ECCIIs for practical experiments.

2.3 Verification of proposed bilinear immittance

Verification of the proposed immittance emulator was provided not only by simulations in PSpice, but also by experimental measurement in laboratory. Our design supposes values of selected components as follows: Ci = 100 nF, RgmYi = 520 Ω (330 + internal 2 x 95 Ω), RgmXi = 315 Ω (220 + internal 95 Ω), VSETB_gmYi = 0.27 V and VSETB_gmXi = 0.1 V. Zero and pole frequencies are set to fZi = 826 Hz and fPi = 505 Hz theoretically (fZi > fPi). Results obtained from experiments and simulations are shown in Fig. 3 where magnitude and phase responses of a single segment, designed in accordance to previously noted parameters, are given. Theoretical values of resistances at low and high frequencies are given very simply by the following equations (s = jω): Z i (ω → 0 ) = lim Z i ( s ) = ω→0

R gmXi

,

VSETB _ gmXi

Z i (ω → ∞ ) = lim Z i ( s ) = ω →∞

R gmYi

,

(5), (6)

VSETB _ gmYi

and it yields |Zi ( ω→0)| ≅ 3.15 kΩ and |Zi (ω→∞)| ≅ 1.93 kΩ for the above noted parameters. Simulation results are compared with measurement results in Fig. 3. Differences between simulated and measured resistance in low- and high-frequency corners of impedance plot are due to uncertainty of the value of internal ECCII resistances of current input terminals (X) and their comparable values to external resistances RgmYi and RgmXi and by mismatching both current gains (ECCIIs) influencing the accuracy of gmYi (OTAYi) controlled by a single VSETB_gmYi. The internal resistance of the X terminal of ECCII (nominal value 95 Ω) may achieve a value from 75 to 115 Ω (see EL2082 datasheet).

8

a)

b)

Fig. 3. An example of verification of a single segment of bilinear immittance Zi(s): a) magnitude response, b) phase response.

3. Implementation of bilinear immittance in CPE synthesis

3.1 Immittance multiplication

The presented bilinear immittances (Fig. 1) serve for the synthesis of CPE elements (or CPE emulating circuits in other words), as was already indicated in [21] and shown in [27]. The type of CPE synthesis, used in this approach, is based on multiplication of impedances. It means multiplication of each segment specifying zero and pole location by another segment with different coordinates of zero and pole. Therefore it creates a series (row) of mutually alternating zeros and poles on the real axis in complex plane. Their number and spacing depends on the allowed phase ripple and bandwidth of approximation. The most known so-called Antoniou impedance converter [31] has not received significant utilization in these approaches of CPE synthesis because its expression for overall impedance of CPE ZC(s) = Z1(s)⋅Z3(s)⋅Z5(s)/(Z2(s)⋅Z4(s)) [31] includes floating impedances. Therefore, the resulting system would be very complicated. Figure 4(a) shows a singleended solution of the circuit for immittance multiplication based on OTAs for a generalized number n of Zi(s) segments. This structure will be discussed in further text as an example of utilizing bilinear immittance segments from Fig. 1. Hatched grounded elements Z1(s)…Zn(s) in Fig. 4 represent bilinear immittance segments from Fig. 1 (segments from Fig. 2 in real experiments respectively). The solution of CPE can be utilized as a floating component in circuit synthesis due to really very simple modification of the system to pseudodifferential mode (Fig. 4(b)).

9

gmn gmn+1

Zn OTAn

ZC(s) OTAn+1

gm1 gm2

Z1 OTA1

Z2 OTA2

segment 1

gm3 Z3 OTA3

section 1 a)

b)

Fig. 4. General example of CPE synthesis based on impedance multiplication in feedback chain of OTAs and grounded bilinear impedances for n segments: a) single-ended solution, b) pseudo-differential solution.

Overall generalized impedance ZC(s) of the circuit in Fig. 4 considering n segments Zi(s) can be expressed as:

1

Z C ( s) =

.

n

(7)

g mn +1 ∏ g mi Z i ( s ) i =1

3.2 Discussion of features of both types of bilinear immittance in CPE synthesis

Based on proper selection of bilinear immittance from Fig. 1(a) or Fig. 1(b), there are two ways how to express ZC(s). When the immittance multiplier (Fig. 4) utilizes the solution of bilinear immittance (2) from Fig. 1(a), then ZC(s) results in:

Z C ( s) =

1    s + g mYi    Ci g mn+1 ∏ g mi   i =1  g mZi  s + g mXi     Ci    



g mC = g mn+1 = g mi = g mZi for i = 1...n

n

⇒ Z C ( s) =

1

. (8)

n

g mC ∏ Z i ( s) i =1

Note that gmZi is now excluded from Zi(s) in the final form of (8) for simplicity (comparing to definition (2)). Applying the bilinear immittance emulator from Fig. 1(a) brings an interesting modification of (7) because partial immittance Zi(s) offers own independent gmZi parameter compensating the effect of gmi-s in the process of impedance multiplication (Fig. 4) if equality of all gmi-s (except those gmYi and gmXi controlling zero/pole locations) is supposed. The ratios of gmi and gmZi (partially also gmn+1) offer to influence the “middle” resistance (middle value, RC_middle) of ZC(s) when ωZi = ωPi:

10

1

RC _ middle =

g g mn+1 ∏ mi i =1 g mZi

1 g mC

⇒ RC _ middle =

n

.

(9)

g mC = gmZi = g mi = g mn+1 for i =1... n

gmYi = gmXi for i =1... n

Analysis of the theoretical range of available impedance magnitude provides: n

∏g

mXi

,

i =1

Z C (ω → 0) =

Z C (ω → ∞) =

n

g mC ∏ g mYi

1 . g mC

(10), (11)

i =1

When the second solution (3) of segment Zi(s) (Fig. 1(b)) is considered, equation (7) modifies to the form:

Z C ( s) =

g = g mn+1 = gmi 1 1 . ⇒ mC ⇒ Z C ( s) = n Ci  for i = 1...n  n +1 (g mC ) ∏ Zi (s)  1+ s  n g mYi  i =1 g mn+1 ∏ gmi    sC + g i =1 i mXi    

(12)

Result of (12) yields the middle resistance as:

1

RC _ middle =

⇒ RC _ middle =

n

g mn+1 ∏ g mi i =1

1

.

(g mC )n+1 gfor i==g1...n= g mC

mi

(13)

mn +1

g mYi = gmXi for i =1... n

The theoretical range of impedance magnitude can be found as: n

Z C (ω → 0) =

∏g

n

n

∏g

mXi

i =1 n+1

∏g

= mi

mXi

i =1

(g )

n+1

ZC (ω → ∞) =

,

∏g

mYi

i =1

(g )

n+1

.

(14), (15)

mC

mC

i =1

Analysis of the middle value of overall resistance (for condition ωZi = ωPi) reveals that the first solution of bilinear immittance (Fig. 1(a)) in the CPE application offers a magnitude range of expected impedance values settable in dependence of gmi and gmZi especially. In other words, RC_middle and therefore also maximum and minimum of magnitude (vertical position of magnitude response in impedance vs. frequency plot) can be easily influenceable, i.e. the presence of gmZi in each section of chain may reduce the effects of gmi-s. When gmC is set in units of mS then RC_middle results in shifting impedance slope in the range of units of kΩ for example. The second solution (Fig. 1(b)) in the CPE application indicates that the RC_middle value can be expected to be very high (indirectly proportional to multiples of gmi-s, i.e. (gmC)n+1 supposing gm1 = gm2 = … = gmn+1) that could cause problems with physical feasibility in some cases (very high values of impedance magnitude expected as proportional to 1/(gmC)n+1). These values are above real parts of nodal impedances in circuitry that results in significant influence and damage of required operation due to their low values. High impedances and high gains of sections may also limit dynamical range. On the other hand, implementation of the first solution (Fig. 1(a)) in CPE needs 4n+1 OTAs whereas implementation of the second variant (Fig. 1(b)) takes 3n+1 OTAs and both n capacitors in total. Therefore, n active devices (one OTA per section) can be saved which means

11

significant reduction of power consumption. Further discussion about additional features regarding the previously indicated problems will be provided in the text focused on the study of parasitic effects in the designed CPE example.

3.3 Design example of CPE with capacitive character

We selected the design of ZC_cap(s) with α = −0.5 as the subject of our interests. This example of ZC_cap(s) supposes utilization of the newly proposed grounded bilinear segments from Fig. 1(b) in multiplication process (Fig. 4(a)). The resulting ZC_cap(s) has the form:

Z C ( s) =

1 . g m 6 ( g m1Z1 g m 2 Z 2 g m 3 Z 3 g m 4 Z 4 g m 5 Z 5 )

(16)

Supposing equal values of each transconductance (simplification gm1 = gm2 = … = gm6 = gmC) eq. (16) reduces to:

Z C (s ) =

1 . 6 g mC Z1Z 2 Z 3 Z 4 Z 5

(17)

Maximal and minimal value of available magnitude of ZC_cap(s) determined by (16) is expected between:

Z C (ω → 0) = lim Z C ( s ) =

g mX 1 g mX 2 g mX 3 g mX 4 g mX 5 , 6 g mC

(18)

Z C (ω → ∞ ) = lim Z C ( s ) =

g mY 1 g mY 2 g mY 3 g mY 4 g mY 5 . 6 g mC

(19)

ω →0

and

ω →∞

The detailed design steps (Fig. 5) of CPE are separated to the following two partial tasks (searching for zero/pole coordinates and the design of the circuitry):

a) searching for zero/pole coordinates (Matlab script): 1) selection of order α; 2) selection of phase ripple; 3) selection of operational bandwidth (with respect to roll-off effects of active elements used in the design) → the number of sections + coordinates of zeros and poles (method implemented by Valsa et al. [17], [18]). Theoretical impedance characteristic should be plotted to see min. and max. reachable values of magnitude in dependence on frequency in order to avoid problems with insufficient impedance features of active elements in the design (if they contribute to overall nodal impedances significantly – low input/output impedances of used OTAs; decision about the necessity to use a dummy section in the OTA chain – this will be explained later). Operational bandwidth can be adjusted via application of frequency norm and magnitude can be shifted up and down by introducing impedance norm.

12

b) design of the circuitry: 1) known coordinates of zeros and poles; 2) proper selection of capacitors (to reach physically settable values of gm-s of OTAs); 3) calculation of gm-s (derivation of DC control voltages or currents) → a set of parameters for acƟve devices (bilinear segments); 4) proper selecƟon of gm-s of OTAs in the impedance multiplication procedure (chain). Simultaneous change of all capacitors values (frequency scaling given by multiplication of all values by the same constant) is required to shift operational bandwidth. The only limitations imposed at very low and high frequency zones are originated from the values of capacitors and maximum frequency of operation of active elements, respectively.

Fig. 5. Design flowchart.

Based on the above steps, we calculated the zero/pole coordinates required for 5 sections (order of approximation n = 5) with the help of Matlab. Design of CPE is always a trade-off of the accuracy of CPE approximation in frequency domain expressed by phase ripple, number of sections (complexity of final circuit solution) and operational frequency range. The number of sections (and maximal allowed phase ripple) directly determines operational bandwidth (high phase ripple = lower number of sections for the same bandwidth theoretically; low ripple = higher number of section in the same bandwidth). This value of n results from the initial requirement on operational bandwidth at least 2 decades with phase ripple tolerance max. ± 4.5 degrees (10%). The zero and pole coordinates can be distributed to overall impedance ZC_cap(s) from (17) as: α = − 0 .5

Z C _ cap ( s ) n = 5

=

1  s + 13201  s + 60495  s + 277271  s + 1.271 ⋅ 10 6  s + 18.850 ⋅ 10 6  ,      6  6  g mC  s + 6158  s + 28255  s + 129628  s + 599278  s + 3.581 ⋅ 10 

(20)

where these coordinates serve for choice of appropriate C1-5, RgmY1-5 and RgmX1-5 and calculation of parameters VSETB_gmY1-5 and VSETB_gmX1-5 in accordance to:

13

            1  sC1 + g mX 1  sC 2 + g mX 2  sC 3 + g mX 3  sC4 + g mX 4  sC5 + g mX 5  , ZC (s) n =5 = 6 g mC  1 + s g mY 1  1 + s g mY 2  1 + s g mY 3  1 + s g mY 4  1 + s g mY 5   C1  C 2  C3  C 4  C5  

(21)

or

Z C ( s ) n =5

V   sC1 + SETB _ gmX 1 R gmX 1 1  ≅ 6  R gmY 1 g mC  1 + sC1  V SETB _ gmY 1 

V   sC 2 + SETB _ gmX 2 R gmX 2   R gmY 2  1 + sC 2  V SETB _ gmY 2 

V    sC 3 + SETB _ gmX 3 R gmX 3   R gmY 3   1 + sC 3  V SETB _ gmY 3 

V    sC 4 + SETB _ gmX 4 R gmX 4   R gmY 4   1 + sC 4  V SETB _ gmY 4 

V   sC 5 + SETB _ gmX 5 R gmX 5   R gmY 5  1 + sC 5  V SETB _ gmY 5 

  ,(22)     

respectively, because of practically implementable solution of the Zi(s) segment from Fig. 2. Equations (21) and (22) were obtained by (4) substituted into (17). All capacitors (C1-5) and auxiliary resistors (RgmY1-5, RgmX1-5) were selected properly to partial Zi(s) operation in appropriate sub-bandwidths. Parameters BgmYi and BgmXi (VSETB_gmYi, VSETB_gmXi) were calculated from (20) for required coordinates of pole and zero for each subsection. All selected values of parameters and results of the design calculations based on roots in (20) and expressed parameters from (22) are given in tabular form (Tab. 2).

Tab. 2. Design selection and calculation of required parameters for α = −0.5 (internal input resistance of EL2082 is taken into account) Section (i) 1 2 3 4 5 g m1-6 (gmC) [mS]

Selected parameters Ci [nF] 470 100 47 10 1 2.10

Calculated parameters

BgmXi [-] (control of zeros)

BgmYi [-] (control of poles)

1.95 (RgmX1 = 220+95) →gmX1 = 6.20 mS

1.51 (RgmY1 = 330+2·95)→gmY1 = 2.89 mS

1.91 (RgmX2 = 220+95) →gmX2 = 6.05 mS

1.47 (RgmY2 = 330+2·95)→gmY2 = 2.83 mS

2.54 (RgmX3 = 100+95) →gmX3 = 13.03 mS

1.77 (RgmY3 = 100+2·95)→gmY3 = 6.09 mS

2.48 (RgmX4 = 100+95) →gmX4 = 12.71 mS

1.74 (RgmY4 = 100+2·95)→gmY4 = 5.99 mS

2.68 (RgmX5 = 47+95) →gmX5 = 18.85 mS

1.04 (RgmY5 = 100+2· 95)→gmY5 = 3.58 mS

The OTAs (gm1-gmn+1) in the general structure from Fig. 4(a) specified for n = 5 suppose fixed value of gm. They can be created by the diamond transistor OPA860 as shown in Fig. 6. Partial transconductance is adjusted manually as the value of degradation resistors Rdegi = 1/gmi.

Fig. 6. Implementation of the diamond transistor OPA860 as OTA (only OTA1-n+1) having fixed values of gm1 -gmn+1 in the structure from Fig. 4a.

14

The resulting ideal characteristics (Matlab calculations of eq. (22)) for all Zi(s) are shown independently for reference in Fig. 7(a). Figure 7(b) indicates the evolution of the impedance plot when partial Zi(s) segments are sequenced in the feedback loop (Fig. 4a) from independent Z1 to full chain (from Z1 to Z5). Note that the higher (than for others) peak of Z5 in Fig. 7(a) is a consequence of intentional modification in the used approximation [17], [18] in order to extend high-frequency limit keeping a reasonable value of phase ripple in the real case (experiment). This additional effect may help with high-frequency behavior of real CPE where parasitic elements of real circuitry start to be dominant. Additional section (Z6) has no sense in this specific case (interference of real parasitic roots of circuitry to operational bandwidth) as will be shown in the sections describing study of real effects and experimental results. In other words, our intentions were focused on possibility how to save components (reduce complexity) at the expense of increased phase ripple in ideal case (it is evident from ideal impedance plots in this chapter). Simultaneously, certain extension of operational bandwith was expected from this modification in real case. Moreover, additional section Z6 will not be helpful in our specific case because of very close location of parasitic root (zero – Rp6, Cp6) to „useful“ roots of section Z6, see chapter 4.2.

a)

b)

Fig. 7. Impedance plots of CPE: a) frequency responses of partial segments Zi(s), b) overall impedance ZC_cap(s) formed from partial impedances Zi(s).

3.4 Electronic reconfigurability of the order

Simple reconfiguration of order α of the CPE (as shown for example in [24]) is also possible in our case for several different sets of gmXi and gmYi that are controlled electronically. The possibility of changing the character of CPE ZC_cap(s)→ZC_ind(s) and vice versa can also be easily managed by the presented structure. Such a modification requires only a simple interchange of zero and pole locations as shown in Fig. 8(a) (it means only interchanging roots (gmXi↔gmYi) in every Zi(s)). Figure 8(b) introduces the example of ideal Matlab calculations for (22) where poles and zeros were interchanged.

15

a)

b)

Fig. 8. Explanation of simple interchange between ZC_cap(s) and ZC_ind (s): a) illustration of zero and pole locations, b) resulting impedance responses for ideal case and parameters from (22).

4. Parasitic analysis of the proposed solution

Full small-signal parasitic analysis of such complicated systems (Fig. 4(a)) does not provide simply understandable information. Note that the limited bandwidth of the used active devices as well as small values (pF) of parasitic capacitances in high-impedance nodes make the full analysis unreadable and useless for practice. Therefore this analysis can be divided to two of the most important situations sufficient for basic overview of the most important problems in operating the band of ZC_cap(s) supposed deep in the useful frequency range of active devices. All results in this section were obtained from Matlab simulations with ideal values and parameters of passive and active elements shown in Tab. 2 in order to investigate the partial parasitic effect. All parasitic elements noted in the text below are supposing values and parameters given in datasheets of devices used for the experimental part of this work (OPA860, EL2082).

4.1 Real parts of parasitic impedances in nodes of the Zi(s) connection to the impedance converter

We are supposing the existence of only real resistive part of parasitic nodal impedances where Zi(s) bilinear segments are connected. Then, the ideal equation (8) extends to:

ZC/ _ cap (s) =

(Z + R )(Z 1

p1

+R

2 p2 6 mC 1 2 3

)(Z

3

+ Rp3 )(Z 4 + Rp 4 )(Z5 + Rp5 )

g Z Z Z Z4 Z5 Rp1Rp2 Rp3 Rp 4 Rp5

,

(23)

where Rp1 – Rp5 are parasitic elements in nodes of the Z1 – Z5 connection. Range of impedance magnitude is determined by: ZC/ _ cap (ω → 0) =

(R

g

p1 mX 1

+ 1)(Rp 2 g mX 2 + 1)(Rp3 gmX 3 + 1)(Rp 4 gmX 4 + 1)(Rp 5 g mX 5 + 1) , 6 Rp1Rp 2 R p3 Rp 4 R p5 gmC

16

(24)

and ZC/ _ cap (ω → ∞) =

(R

g

p1 mY1

+ 1)(Rp 2 g mY 2 + 1)(Rp 3 g mY 3 + 1)(R p 4 g mY 4 + 1)(R p5 g mY 5 + 1) .

(25)

6 R p1R p 2 Rp 3 Rp 4 Rp 5 gmC

These resistive parts Rp1 – Rp5 have insignificant effect on the magnitude and phase response of the overall / impedance ZC _cap if their values are selected as at least 10 kΩ. Their identical values are used for Matlab calculations (Rp1 = Rp2 = … = Rp5 = Rp = 45 kΩ as estimated from datasheets of used active devices whose terminals are connected in parallel). However, if approximately similar values of Rp1-5 are not ensured, the deviations of phase and magnitude in partial sub-bands are observed. We tested it in the results shown in Fig. 9(a). These results explain the specific case where Rp3 (the middle section Z3) has a hundred-times lower value then the rest of Rpi-s. Note that only a significant decrease of these parasitic Rpi-s (in comparison to others) causes the mentioned problems.

4.2 Real part of parasitic impedance in input node of impedance converter

A finite input resistance of the system causes the worst problems. We have to simplify this analysis because the full expression for impedance including all Rpi-s is very complex. This simplification supposes omission of Rp1-5 in Zi(s) nodes. New parasitic resistance in the input node is marked as Rp0. Then, (8) including this parameter, modifies to:

ZC// _ cap (s) =

Rp 0 , 1 + g Z Z Z3Z4 Z5 Rp0

(26)

6 m 1 2

where the range of impedance magnitude is obtained between: Z C// _ cap (ω → 0) = R p0 −

6 R 2p 0 g mC

Rp0 g

6 mC

,

(27)

.

(28)

+ g mX 1 g mX 2 g mX 3 g mX 4 g mX 5

and Z C// _ cap (ω → ∞) = R p 0 −

6 R 2p0 g mC

R p0 g

6 mC

+ g mY 1 g mY 2 g mY 3 g mY 4 g mY 5

The results of Matlab simulation are shown in Fig. 9(b) for this case of investigation. We can see that quite a high value of Rp0 causes significant problems. Similar problems are visible even for Rp0 values about 1 MΩ (typical nodal resistances of high-impedance nodes in common electronic circuits achieve maximal units of MΩ). Results for Rp0 = 45 kΩ (estimated input resistance of the CPE) are shown in Fig. 9(b). Both magnitude and phase responses are significantly damaged. This fact complicates this method of CPE design greatly.

17

a)

b)

Fig. 9. Influence of parasitic features in the CPE structure on impedance responses: a) impact of Rp3 (node of Z3 ), b) impact of Rp0 (input node).

Fortunately, the problem of the finite input resistance Rp0 of the real circuit can be solved. However, it means an additional “dummy” gmi OTA section in cascade (Fig. 4) having its high-impedance node disconnected (no Zi(s)). In other words, it means additional gm6 + Rp6 (instead of Z6) segment in our case. Note that Rp6 assumes a very large value (practically parasitic resistance available in high-impedance node). This modification slightly increases overall complexity of CPE, 3n+2 OTAs are required now. Setting gm6 (gm6 >> gmC) and Rp6 to very large values improves the behavior damaged by Rp0 substantially. A high value of the product gm6Rp6 helps to overcome unfavorable conditions given by a low value of Rp0. The resulting impedance of the CPE now has the form:

ZC///_ cap (s) =

Rp 0 6 mC 1

.

(29)

1 + g Z Z 2 Z3 Z4 Z5 Rp0 gm6 Rp6

Magnitude limits are now defined as: Z C///_ cap (ω → 0) =

R p0 g mX1 g mX 2 g mX 3 g mX 4 g mX 5

,

(30)

.

(31)

6 R p 0 R p6 g m6 g mC + g mX1 g mX 2 g mX 3 g mX 4 g mX 5

Z C///_ cap (ω → ∞) =

R p0 g mY1 g mY 2 g mY 3 g mY 4 g mY 5 6 R p0 R p 6 g m6 g mC + g mY1 g mY 2 g mY 3 g mY 4 g mY 5

The effect of this additional section gm6Rp6 (gm6 has at least a 10 times higher value than the rest of gmC) can be seen in Fig. 10 where values Rp6 = 49 kΩ and gm6 = 48 mS (trade-off between the highest gm, dynamics and linearity of OPA860 DIP version - Rdeg = 10 Ω) were used. Only magnitude shift (vertical shift of observed min.max. range) of ZC_cap(s) to low values happens now but, fortunately, trace and phase shapes remain unchanged. In other words, the additional section has a significant impact on Cα. Due to the effect of gm6Rp6 we can simplify eqs. (30) and (31) to:

ZC///_ cap(ω → 0) ≅

gmX1gmX 2 gmX 3 gmX 4 gmX 5 , 6 Rp6 gm6 g mC

and

18

(32)

ZC///_ cap(ω → ∞) ≅

g mY1gmY 2 g mY 3 gmY 4 g mY5 , 6 Rp6 g m6 gmC

6

(33)

6

because Rp0Rp6gm6gmC >> gmX1gmX2gmX3gmX4gmX5 and Rp0Rp6gm6gmC >> gmY1gmY2gmY3gmY4gmY5 are supposed when gm6Rp6 achieves a high value. The effect of Rp0 can be generalized for the structure in Fig. 4(a) and for n segments as follows:

Z C///_ cap (s) =

Rp0 1 + Rp0 gmn+1Rpn+1 (gmC )

n+1

.

n

∏ Z ( s) i

i =1

(34)

gmC = g mi for i =1...n

Then the middle value RC_middle for ωZi = ωPi approximates to:

RC///_ middle =

Rp0 1 + Rp 0 gmn+1Rpn+1 (gmC )

n+1

gmYi =gmXi gmC =g mi for i =1...n

⇒ RC///_ middle ≅ Rp0

. for n +1 Rp 0gmn+1Rpn+1 ( g mC ) 〈〈1

(35)

6

In fact, the presence of gm6Rp6 only increases the impact of Rp0Rp6gm6gmC in the denominator of (29) in order to make the product of all Zi(s) dominant. However, the term Rp0Rp6gm6gmC6 has a lower value than 1 in the case without the effect of Zi(s), i.e. all ωZi = ωPi. Therefore Rp0 outweighs in RC_middle (35). We may note these conclusions: a) the real Rp0 value in basic CPE from Fig. 4(a) (without additional gmn+1Rpn+1 section) including n segments of Zi(s) must be larger than the maximal value of overall impedance ZC_cap(s), i.e. larger than |ZC_cap(ω→0)|, b) if this is not fulfilled, then an additional “dummy” section gmn+1Rpn+1 must be included in order to avoid dramatic damage of expected impedance plot. Unfortunately, specific real solutions (mainly OTAs) may not fulfill the requirements for a sufficiently high Rp0 value in many cases. In fact, the dummy section is shifting the Cα value which is the price of the discussed method.

Fig. 10. Impact of additional dummy section (gm6Rp6 ) on CPE operation influenced by Rp0.

The lowest corner frequency (starting point of bandwidth where the approximation of ZC_cap(s) is valid) is given by Z1 (in fact ωP1 = gmY1/C1). As we can see from Fig. 12 (detail of the comparison between the experiment, simulation and Matlab calculations in the following chapter), high-frequency limitation of a valid

19

approximation starts at a lower frequency than expected (Fig. 10). It is the consequence of an additional section without the Zi(s) segment in ZC_cap(s) (29) required for suppressing the effect of Rp0. Parasitic capacitance Cp6 in this new node cannot be neglected and influences overall ZC_cap(s) by an additional zero as visible in:

ZC////_ cap (s) =

Rp 0 (1 + sC p6 Rp6 ) 6 1 + sCp6 Rp6 + gmC Z1Z2 Z3 Z4 Z5 Rp0 gm6 Rp 6

.

(36)

The impact of an additional pole in the denominator of (36) is located above the operational bandwidth (similarly as pole created by Cp0 if this parameter is considered) is many-times higher than the highest “useful” location of the roost of the segment Z5 with the highest zero and pole pair (ωZ5 = gmX5/C5, ωP5 = gmY5/C5). However, an additional zero frequency can be expressed as ωZ6 = 1/Rp6Cp6 and its value falls into the operational bandwidth of CPE (segment Z5 is influenced). Therefore, phase starts to decrease absolute value rapidly earlier than in the theoretical case (ωZ5 and ωZ6 are close to each other) and the high-frequency band is limited in comparison to theory. The indicated behavior is shown in Fig. 12 where experiment, simulation, theory and discussed Matlab estimation based on (36) are shown. Overall ZC_cap(s), taking all discussed parasitic and “useful” additional components into account, can be generally expressed as:

ZC////_ cap (s) =

Rp 0 (1 + sC pn+1 Rpn+1 )

.

1 + sC pn+1Rpn+1 + Rp 0 g mn+1Rpn+1 (g mC )

n+1

(37)

n

∏ Z ( s) i

i=1

gmC =gmi for i=1... n

Figure 11 shows positions of the most influencing real parasitic features in the structure of the final version of the solved CPE. The following comparison table (Tab. 3) indicates features of the proposed CPE in ideal and modified form taking real features of the circuit into account.

Fig. 11. Final structure of CPE consisting all required and additional elements (added to eliminate the impact of the most important parasitic components) for valid estimation of real operation.

Tab. 3. The main parameters of the proposed CPE (ZC_cap/ind)

20

Ideal

Ideal

Modified to avoid problems with Rp0

/Zi(s) from Fig. 1(a)/

/Zi(s) from Fig. 1(b)/

/Zi(s) from Fig. 1(b)/

4n+1

3n+1

3n+2

1

1

R p 0 (1 + sC pn+1 Rpn +1 )

number of active elements

ZC(s) [Ω]

n

n

(g mC )n+1 ∏ Z i (s)

g mC ∏ Z i ( s) i =1

1 + sC pn+1 Rpn +1 + R p 0 g mn+1R pn+1 ( g mC )

n+1

i =1

(g mC )

n

ZC(ω→0) [Ω]

Rp0

n +1

condition: g mC = g mZi = g mi = g mn+1

∏g

for i = 1...n

1

1 g mC

n

∏g

∏ g mXi

i =1

g mC ∏ g mYi

(g )

1 g mC

∏g

( )

n +1

g mn +1 R pn +1 g mC

mC

i =1

n

ZC(ω→∞) [Ω]

n

( )

(g )

n+1

i =1

2 1 + Ci2 / g mYi 2 g mXi + Ci2

n n +1 g mC ∏ i =1

mYi

i =1

i =1

condition: g mC = g mZi = g mi = g mn+1

g mC ∏

n +1

n

∏g

mYi

g m 6 R p 6 g mC

mC

Cα (Lα)

mXi

i =1

i =1

n

for n +1 R p 0 g mn+1 R pn+1 ( g mC ) 〈〈 1

for i = 1...n and g mXi = g mYi

n mXi

i

i =1

condition: g mC = g mZi = g mi = g mn+1

RC_middle [Ω]

n

∏ Z ( s)

2 1 + Ci2 / g mYi 2 g mXi + Ci2

n +1

for i = 1...n

ideal units coming from SI table

F sec1+α ( sec1−α F

)

5. Design examples and their verification

Figure 12 shows experimental results of the CPE solution from Fig. 11 (in accordance to parameters in Tab. 2 and section 3.3 and discussions in section 4) compared with simulated and calculated (Matlab) traces. Note that all performed measurements and simulations in Fig. 12 were using the above noted concept (Fig. 11) to avoid the effect of Rp0 (gm6 dummy section was connected). This example of operation was intentionally given in order to verify expected behavior with the max. impedance of CPE (ZC_cap) larger than real (parasitic) impedances in active circuitry (Rp0 especially), see Fig. 10 where the ideal (nominal) impedance plot is not disturbed by real features of active devices, damaged response by Rp0 and the effect of the dummy section are highlighted.

21

However, the dummy section is not necessary when the discussed synthesis uses a different set of zero and pole coordinates instead of the previously given by (20) in Tab. 2. This is allowed by the max. value of impedance magnitude |ZC(s)| that now has a significantly lower value than the real parasites in the circuitry. Therefore, the theoretical impedance plot of CPE based on (21) must be studied in order to evaluate the range of the required impedance magnitude and compared to expected parasitic nodal resistances in CPE circuitry before starting the design. The following zero and pole frequencies were obtained for n = 5 and α = −0.25: α = − 0.25

Z C _ cap ( s ) n = 5

=

1  s + 628  s + 5215  s + 43637  s + 363608  s + 4.398 ⋅ 10 6  .      6  6  g mC  s + 352  s + 3079  s + 25824  s + 221168  s + 2 .262 ⋅ 10 

(38)

The calculated parameters from (38) are included in Tab. 4 for the same values of working capacitors all the time. Note that operational bandwidth was also intentionally changed. Therefore, electronic reconfiguration of the order also means the possibility of setting operational bandwidth and its frequency shift (only multiplication constant for all roots of (38) for example). Moreover, precise setting of particular VSET voltages allows to provide manual optimization of its characteristic if necessary. The results of the new setting (new in operational bandwidth, order and horizontal shift to lower frequencies) are shown in Fig. 13. Practical note: It is really important to pay attention to available ranges of controllable parameters (in our case gmXi, gmYi controlled by VSET) because some sets of zero/pole frequency coordinates may lead to physically unavailable values of gms. Values lower than units of µS or higher than tens of mS are not practically feasible in most cases. The restriction imposed by OTA is also related to its maximum frequency of operation (OPA860 – approximately 80 MHz). It can be influenced by properly selecting Ci but also their values have physical restrictions. Therefore, real features of active devices limit the available value of Cα (Lα).

Tab. 4. Design selection and calculation of required parameters for α = −0.25 (internal input resistance of EL2082 is taken into account)

Section (i)

Selected parameters

Calculated parameters

Ci [nF]

BgmXi [-] (control of zeros)

BgmYi [-] (control of poles)

1

470

0.09 (RgmX1 = 220+95)→gmX1 = 0.30 mS

0.09 (RgmY1 = 330+2·95) →gmY1 = 0.17 mS

2

100

0.16 (RgmX2 = 220+95)→gmX2 = 0.52 mS

0.16 (RgmY2 = 330+2·95) →gmY2 = 0.31 mS

3

47

0.40 (RgmX3 = 100+95)→gmX3 = 2.05 mS

0.35 (RgmY3 = 100+2·95) →gmY3 = 1.21 mS

4

10

0.71 (RgmX4 = 100+95)→gmX4 = 3.64 mS

0.64 (RgmY4 = 100+2·95) →gmY4 = 2.21 mS

5

1

0.62 (RgmX5 = 47+95)→gmX5 = 4.40 mS

0.66 (RgmY5 = 100+2·95) →gmY5 = 2.26 mS

gm1-6 (gmC) [ mS]

2.10

Changing the order (α) as well as character of the CPE is a very simple operation due to electronic control of the presented CPE. Two additional sets of zero and pole frequencies are given in order to achieve α = 0.25 and α = −0.75 as follows:

Z C _ ind ( s )

α = 0. 25 n=5

=

1  s + 352  s + 3079  s + 25824  s + 221168    6  g mC  s + 628  s + 5215  s + 43637  s + 363608

22

 s + 2.262 ⋅ 10  6  s + 4.398 ⋅10 6

,  

(39)

Z C _ cap ( s )

α = −0 .75 n =5

=

1 6 g mC

 s + 628  s + 5215  s + 43637  s + 363608      s + 66  s + 1100  s + 9431  s + 82750

 s + 4.398 ⋅10   s + 691150

6

.  

(40)

Parameters calculated from (39) and (40) are included in Tab. 5 and Tab. 6. Figure 14 shows verification of these designs. Table 7 summarizes obtained features of CPE operating in the discussed modes (α = ±0.25, −0.5 and −0.75).

Tab. 5. Design selection and calculation of required parameters for α = 0.25 (internal input resistance of EL2082 is taken into account) Section (i) 1 2 3 4 5 gm1-6 (gmC) [mS]

Selected parameters Ci [nF] 470 100 47 10 1 2.10

Calculated parameters

BgmXi [-] (control of zeros)

BgmYi [-] (control of poles)

0.05 (RgmX1 = 220+95)→gmX1 = 0.17 mS

0.16 (RgmY1 = 330+2·95) →gmY1 = 0.30 mS

0.10 (RgmX2 = 220+95)→gmX2 = 0.31 mS

0.27 (RgmY2 = 330+2·95) →gmY2 = 0.52 mS

0.24 (RgmX3 = 100+95)→gmX3 = 1.21 mS

0.59 (RgmY3 = 100+2·95) →gmY3 = 2.05 mS

0.43 (RgmX4 = 100+95)→gmX4 = 2.21 mS

1.06 (RgmY4 = 100+2·95) →gmY4 = 3.64 mS

0.32 (RgmX5 = 47+95)→gmX5 = 2.26 mS

1.28 (RgmY5 = 100+2·95) → gmY5 = 4.40 mS

Tab. 6. Design selection and calculation of required parameters for α = −0.75 (internal input resistance of EL2082 is taken into account) Section (i) 1 2 3 4 5 gm1-6 (gmC) [mS]

Selected parameters Ci [nF] 470 100 47 10 1 2.10

Calculated parameters

BgmXi [-] (control of zeros)

BgmYi [-] (control of poles)

0.09 (RgmX1 = 220+95)→gmX1 = 0.30 mS

0.02 (RgmY1 = 330+2·95) →gmY1 = 0.03 mS

0.16 (RgmX2 = 220+95)→gmX2 = 0.52 mS

0.06 (RgmY2 = 330+2·95) →gmY2 = 0.11 mS

0.40 (RgmX3 = 100+95)→gmX3 = 2.05 mS

0.13 (RgmY3 = 100+2·95) →gmY3 = 0.44 mS

0.71 (RgmX4 = 100+95)→gmX4 = 3.64 mS

0.24 (RgmY4 = 100+2·95) →gmY4 = 0.83 mS

0.62 (RgmX5 = 47+95)→gmX5 = 4.40 mS

0.20 (RgmY5 = 100+2·95) →gmY5 = 0.69 mS

a)

b)

Fig. 12. Comparison of impedance plots of ZC_cap(s) having α = −0.5 for simulation, experiment and Matlab estimation: a) magnitude responses, b) phase responses.

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a)

b)

Fig. 13. Comparison of impedance plots of ZC_cap (s) having α = −0.25 for simulation, experiment and theory: a) magnitude responses, b) phase responses.

Fig. 14. Demonstration of change of CPE character (inductive/capacitive) and α control based on parameters in Tab. 4-6.

Tab. 7. Evaluation of simulated and measured operational frequency ranges of CPE for different α.

α = −0.5 (−45 deg)

operational range [kHz] phase ripple [deg]

α = −0.25 (−22.5 deg)

α = 0.25 (22.5 deg)

α = −0.75 (−67.5 deg)

simulated

measured

simulated

measured

simulated

measured

simulated

measured

3.0→269

2.2→380

0.048→52

0.070→95

0.056→219

0.201→735

0.035→54

0.202→45

±4.5 / 10%

±2.25 / 10%

±2.25 / 10%

±6.75 / 10%

Loss of operational bandwidth observed especially for α = -0.75 is given by parasitic features of real circuitry, mainly by a high-frequency parasitic roots located above operational bandwidth that is very close to the zero and pole locations of the last section. Note that this effect, can be avoided by shifting (renormalization) of operational bandwidth to low frequencies.

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Phase ripple is connected with sensitivity of the circuit arising for alfa closing to 0 or 1. Most approximations available in the literature are optimized for alfa = 0.5. The reason for that was that fractional calculus has been initially applied in biomedicine where the order of tissue impedance is about 0.5. In addition, phase ripple increases for low and high values of α (−0.25 and −0.75 for example) in the real case. This behavior is given by the increased sensitivity of CPE when these orders are required (very close to ideal resistor or ideal capacitor). Very precise setting of zero/pole coordinates is required. Any small deviation from the ideally determined value of control voltage means a quite significant increase of phase ripple. The practical limit of realizable operational bandwidth (constant phase zone) of the proposed approach is given: a) at low frequencies by selection of values of capacitor(s) especially for the lowest pair zero/pole (approximation, especially for α close to 0 or 1, may lead to absurd/unreasonable values of capacitors or passive elements in the case of very low frequency location of the first zero/pole pair), b) at high frequencies by real features of used active devices (active circuitry contributes to nodal impedances significantly) respecting the selection of working capacitors for high frequency area (the highest zero/pole pair).

All impedance measurements were performed by Agilent 4294A impedance analyzer operating from 40 Hz (reason for low-frequency limitation of measured responses). Sine-wave excitation source of impedance analyzer was set between 140-430 mVpeak-peak in order to avoid nonlinear effects in all measurements. Maximal allowed input voltage should not exceed low hundreds of mVpeak-peak. Proposed CPE concept with OTA elements is better than passive RC implementation of CPE from the point of view of loading effect (theoretically zero current sink at the input of CPE and well-defined current source at the CPE output – connected together). Influence of other parts connected to this active CPE would be minimal. The fabricated prototype is shown in Fig. 15. Power consumption of the proposed experimental prototype reaches 4.2 W (420 mA, 5 V per supply branch) which is a very high value but appropriate for the selected way of experimental verification utilizing commercially available devices.

Fig. 15. Fabricated prototype based on commercially available devices (EL2082, OPA860 DIP versions) for experimental tests.

6. Discussion

25

The presented concept of CPE synthesis allows to use the Orcad PSpice Optimizer tool as shown in [32]. Since there is the possibility to specify several fitness functions it can be used to define tolerance channel for argument (phase) frequency response. This optimization provides results in the form of locations of zero and pole frequencies which can be, in some situations, better (e.g. phase ripple) than sets of coordinates used in previously presented designs (from mathematical approximation [17], [18]). Another way to synthesize of CPE, supposing implementation of biquadratic (second-order) transfer functions, was presented in [36]. Several biquadratic two-port blocks with low quality factor and band-pass and band-reject character can be used in fractional-order synthesis (synthesis of active constant phase blocks – fractional-order integrators and differentiators). These blocks also allow zero and pole frequency control and offer certain simplification of circuitry because each block has one pair of poles and one pair of zeros that can be set properly as in Fig. 8(a). Creating a fractional-order CPE from a cascade of two-ports can be easily provided by V→I conversion, as already shown in [21]-[25]. However, the presented method has not been elaborated in detail and tested. Passive and active solutions of CPE have widespread application field in fractional-order filters where are used instead of standard integer-order accumulating elements (L, C). Recently, several novel examples of mutual transformation between accumulating (reactive) elements using standard op-amp based Antoniou GIC and the passive solution of CPE have been presented by Adhikary et al. [37]-[39]. Current conveyors also have beneficial features for these transformations as presented by Soltan et al. [40]. The presented methods allow to obtain nonstandard obtuse phase angles (shifts) of CPEs for various applications in filters and resonators. Tsirimokou et al. [41] focused attention on mutual interconnection of CPE elements with capacitive character and the study of real behavior of these arrangements. A great overview of units and physical dimensions of fractional-order devices (CPEs) has been summarized in [42], [43]. Recent findings in literature indicate enormous attractiveness of this area for many researchers from various fields. For example works [44]-[48] are implementing passive solutions of CPE in filtering applications (two CPEs with capacitive character in most cases). However, passive CPEs are not suitable only for filters. Kadlcik et al. [49] presented a solution of a voltage regulator including an error amplifier with a fractional-order device in its feedback. Similarly, Dimeas et al. [50] used the fractional-order approach in a novel type of controller for a DC motor. As already discussed in the introduction, fractional-order filters can be approximated by integer-order transfer functions of higher-order than the intended fractional-order solution. These proposals have been used very often (for example [51]-[54]). Many of the presented circuits utilizes third-order structures (three standard integer-order capacitors) but approximating bandwidth is not very extensive [51], [52] for example. However, there are also solutions implementing filters of higher-order than 3rd [52]-[54] but their complexity is also high [53].

7. Conclusion

An example and a detailed study of the implementation of OTA-based bilinear immittance segments used for CPE synthesis employing their multiplication was presented in this paper. The bilinear immittance segments from Fig. 1(a), applied in CPE based on the structure in Fig. 4a, offer the possibility of intentionally setting the middle resistance to a suitable range in comparison to the version in Fig. 1(b). However, overall complexity (number of active elements) of CPE with bilinear segments from Fig. 1(a) is higher than the complexity of CPE with segments from Fig. 1(b). Precise non-ideal analysis of CPE including new bilinear

26

segments from Fig. 1(b) indicates problems with real feasibility when input impedance (resistive part Rp0) of CPE have a low value. That is the price for the discussed simplification. This drawback can be solved by implementing OTA (gm1 and gmn+1 especially) with sufficiently high input and output impedance. Otherwise, proper selection of Cα (Lα) based on a specified form of (21) and theoretical impedance plot of |ZC(s)| (observed in the required operational frequency band), having maximal value of magnitude sufficiently below expected parasitic nodal resistances (Rp0 especially), must be ensured. Nevertheless, we found and verified how this problem can be easily solved also in cases when sufficiently high input and output impedances of used OTAs are not available. This involves only an insignificant complication of CPE by an additional dummy section (see Fig. 11) of OTA (without bilinear segment) in comparison to full engagement of bilinear segments from Fig. 1(a) in Fig. 4. Therefore, the newly introduced concept of a bilinear segment of immittance (Fig. 1(b)) seems to be suitable for reducing overall complexity of this type of CPE synthesis. CPEs with n = 5 and α = −0.5, ±0.25 and −0.75 were selected as design examples. Their behavior was verified by PSpice simulations and also experimentally based on laboratory measurements with commercially available components. In conclusion, we can summarize the features of the newly presented bilinear Zi(s) segment, the approach to CPE design and results included to this paper as follows: a) simplified circuitry of Zi(s) – only two OTAs, b) linear electronic control of Zi(s) – pole and zero independently, c) lower complexity of CPE synthesis (required 3n+1(2) active devices instead of 4n+1 in the overall circuitry of CPE), d) verified reconfiguration of α (simple interchange of zero↔pole frequency by gmYi ↔gmXi in the frame of Zi(s)) of CPE, e) intuitive method for theoretical extension of accuracy and bandwidth of approximation of CPE (only inclusion of additional section(s) with Zi(s) segment(s)), f) detailed analysis of influences of real devices in the multiplication process on CPE operation and concluding practical recommendations. This topic of CPE synthesis offers further challenges, for example, research for new and improved methods of impedance multiplication allowing simpler overall circuitry. We also suppose implementing such bilinear segments Zi(s) for immittance response or transfer response equalization [33], [36].

8. Acknowledgements

Research described in this paper was financed by Czech Ministry of Education in frame of National Sustainability Program under grant LO1401. For research, infrastructure of the SIX Center was used. Research described in the paper was supported by Czech Science Foundation project under No. 15-22712S. The acknowledgment also goes to COST Action CA15225, a network supported by COST (European Cooperation in Science and Technology).

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