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Systematic design language an advanced layout tool for artwork
458
WORLD
ABSTRACTS
ON MICROELECTRONICS
AND RELIABILITY
large scale production. It is termed "controlled collapse" and is based on limiting the module land solderable area so that the surface tension of the molten pad and land solder support the device. T h e resulting joints show high reliability; the devices are sturdy and testable; and the processes are economical, automatable, and offer latitude in required controls.
T h e c h o i c e o f r e f l o w s o l d e r i n g m e t h o d . A. J. MAYHEWand A. S. CALDER,Proc. Tech. Prog. INTER/NEPCON 1959, Brighton, 14-16 October (1969), p. 328. Lap joints are finding increasing applications in modern electronic engineering. For the most part these reduce to two broad types, soldering and the various forms of welding. This work had led to the choice of soldering. In addition to being adequate in all other respects, soldered joints are repairable. Moreover they can be made in multiple by high-capacity step-and-repeat or continuous machines. The best known example is the wave soldering machine for components mounted with their leads through printed boards. Soldered lap-joints are usually made by reflow methods of which there are many, but all rely on the same simple fundamental principle. If two clean 50/40 tin/lead coated surfaces are placed in intimate contact and their temperature raised beyond the melting point of solder (183-188°C), on cooling an electrical joint must result. The differences lles in the method of applying the heat. These include parallel-gap, indirect resistance heating, hot gas, oil-immersion, infra-red and soldering iron. Applications include flatpacks, dual-in-line packages, axial components, flexibles and semiconductor chips. These last are a special case owing to their very small size, calling for microscopes and micromanipulators for manual work and very high volume to justify automatic production machinery. They therefore deserve a paper to themselves and this one concerns itself with the other cases. F l i p - c h i p / b e a m - l e a d m i c r o b o n d i n g t e c h n i q u e s . M. B. SHAMASH, P~oc. Tech. Prog. INTER/NEPCON, Brighton, 14-16 October (1969), p. 346. New techniques for microbonding and interconnections of integrated circuit chips are essential to improve the reliability and reduce the cost of microelectronic system packaging. With the many types of devices currently available, the flying wire technique of interconnection is still dominating. Among the several methods of fabricating semiconductor devices, the flip-chip and beam-lead techniques certainly meet the objectives of reducing both the number of interconnections and the cost of assembly. The processing steps and materials chosen to fabricate and assemble the flip-chip and beam-lead devices have a great influence on the final circuit performance. The substrate preparation, its metallization materials, and thickness selections are also essential to achieve good bonding with these devices. The above mentioned parameters (i.e. fabrication processes of flip chip and beam-leads with a passivating oxide, substrate preparation, metallization material, and compatibility with silicon devices) and the microbonding processes are all discussed in this paper. To support these techniques, mechanical and electrical test data are also presented, along with considerations of maintainability and repairability, which are important factors for modular or system assembly. M i c r o - w i r e w r a p p i n g at 1.27 m m centres. W. MAcLEoD Ross. Proc. Tech. Prog. INTER/NEPCON 1969, Brighton, 14-16 October (1969), p. 352. A survey of the literature of wire-wrapping shows that the major effort has been directed towards the use of wrapped joints at centres of 2-54 m m and above. That the wire-wrapped joint is of very high reliability is undisputed and it has been recognized for some time that the development of a system which would permit closer spacing, was highly desirable. Several workers have produced wraps using fine wires (usually tinned copper) and small stakes, but not at small centres. At the last Inter-Nepcon meeting (Brighton 1969), we did however see one paper suggesting that a wrapping system was available for use at 1.27 m m centres, followed immediately by one regretting that such a system was not availablef In 1967, collaboration between the Ministry of Technology, Royal Radar Establishment, Malvem, and the Plessey Company produced a programme aimed at the development of a practical system of wire-wrapping at 1.27 m m centres. It was decided that the major aim should be to produce satisfactory secondary wraps, binding typical flat-pack devices to suitable posts. The programme fell naturally into the following stages: (1) Study of materials, finishes, dimensions, and tolerances; (2; Design of prototype tools and final selection of materials ; (3) Design of powered wrapping tools ; (4) Assessment of the reliability of wrapped joints. S y s t e m a t i c d e s i g n l a n g u a g e a n a d v a n c e d l a y o u t tool for artwork. C. M. OAULLINE,JR., S. P. RHODES, P. ENGLEBRETSON and S. LOVINGGOOD. Proc. Tech. Prog. 1NTER/NEPCON 1969, Brighton, 14-16 October, (1969), p. 367. Within the past decade numerically-controlled drafting machines and powerful computing facilities have become available to even small size companies either through purchase or on a service bureau basis. With equipment so readily available it would be expected that drafting would become rapidly mechanized. Two industries have led the way toward this goal : (1) the engineering design and construction companies with their large volumes of drawings ; and (2) the electronics companies with a need for precision artwork. G e n e r a t i n g IC artwork a u t o m a t i c a l l y s a v e s t i m e , p r e v e n t s c o s t l y errors. A. K. PASCHERand K. KOLLER,
Electronics, 24 November (1969), p. 117. A computer program minimizes the number of coordinates needed to describe the geometry of an IC, while most of the errors associated with manual methods are eliminated.
WORLD
ABSTRACTS
ON MICROELECTRONICS
AND RELIABILITY
large scale production. It is termed "controlled collapse" and is based on limiting the module land solderable area so that the surface tension of the molten pad and land solder support the device. T h e resulting joints show high reliability; the devices are sturdy and testable; and the processes are economical, automatable, and offer latitude in required controls.
T h e c h o i c e o f r e f l o w s o l d e r i n g m e t h o d . A. J. MAYHEWand A. S. CALDER,Proc. Tech. Prog. INTER/NEPCON 1959, Brighton, 14-16 October (1969), p. 328. Lap joints are finding increasing applications in modern electronic engineering. For the most part these reduce to two broad types, soldering and the various forms of welding. This work had led to the choice of soldering. In addition to being adequate in all other respects, soldered joints are repairable. Moreover they can be made in multiple by high-capacity step-and-repeat or continuous machines. The best known example is the wave soldering machine for components mounted with their leads through printed boards. Soldered lap-joints are usually made by reflow methods of which there are many, but all rely on the same simple fundamental principle. If two clean 50/40 tin/lead coated surfaces are placed in intimate contact and their temperature raised beyond the melting point of solder (183-188°C), on cooling an electrical joint must result. The differences lles in the method of applying the heat. These include parallel-gap, indirect resistance heating, hot gas, oil-immersion, infra-red and soldering iron. Applications include flatpacks, dual-in-line packages, axial components, flexibles and semiconductor chips. These last are a special case owing to their very small size, calling for microscopes and micromanipulators for manual work and very high volume to justify automatic production machinery. They therefore deserve a paper to themselves and this one concerns itself with the other cases. F l i p - c h i p / b e a m - l e a d m i c r o b o n d i n g t e c h n i q u e s . M. B. SHAMASH, P~oc. Tech. Prog. INTER/NEPCON, Brighton, 14-16 October (1969), p. 346. New techniques for microbonding and interconnections of integrated circuit chips are essential to improve the reliability and reduce the cost of microelectronic system packaging. With the many types of devices currently available, the flying wire technique of interconnection is still dominating. Among the several methods of fabricating semiconductor devices, the flip-chip and beam-lead techniques certainly meet the objectives of reducing both the number of interconnections and the cost of assembly. The processing steps and materials chosen to fabricate and assemble the flip-chip and beam-lead devices have a great influence on the final circuit performance. The substrate preparation, its metallization materials, and thickness selections are also essential to achieve good bonding with these devices. The above mentioned parameters (i.e. fabrication processes of flip chip and beam-leads with a passivating oxide, substrate preparation, metallization material, and compatibility with silicon devices) and the microbonding processes are all discussed in this paper. To support these techniques, mechanical and electrical test data are also presented, along with considerations of maintainability and repairability, which are important factors for modular or system assembly. M i c r o - w i r e w r a p p i n g at 1.27 m m centres. W. MAcLEoD Ross. Proc. Tech. Prog. INTER/NEPCON 1969, Brighton, 14-16 October (1969), p. 352. A survey of the literature of wire-wrapping shows that the major effort has been directed towards the use of wrapped joints at centres of 2-54 m m and above. That the wire-wrapped joint is of very high reliability is undisputed and it has been recognized for some time that the development of a system which would permit closer spacing, was highly desirable. Several workers have produced wraps using fine wires (usually tinned copper) and small stakes, but not at small centres. At the last Inter-Nepcon meeting (Brighton 1969), we did however see one paper suggesting that a wrapping system was available for use at 1.27 m m centres, followed immediately by one regretting that such a system was not availablef In 1967, collaboration between the Ministry of Technology, Royal Radar Establishment, Malvem, and the Plessey Company produced a programme aimed at the development of a practical system of wire-wrapping at 1.27 m m centres. It was decided that the major aim should be to produce satisfactory secondary wraps, binding typical flat-pack devices to suitable posts. The programme fell naturally into the following stages: (1) Study of materials, finishes, dimensions, and tolerances; (2; Design of prototype tools and final selection of materials ; (3) Design of powered wrapping tools ; (4) Assessment of the reliability of wrapped joints. S y s t e m a t i c d e s i g n l a n g u a g e a n a d v a n c e d l a y o u t tool for artwork. C. M. OAULLINE,JR., S. P. RHODES, P. ENGLEBRETSON and S. LOVINGGOOD. Proc. Tech. Prog. 1NTER/NEPCON 1969, Brighton, 14-16 October, (1969), p. 367. Within the past decade numerically-controlled drafting machines and powerful computing facilities have become available to even small size companies either through purchase or on a service bureau basis. With equipment so readily available it would be expected that drafting would become rapidly mechanized. Two industries have led the way toward this goal : (1) the engineering design and construction companies with their large volumes of drawings ; and (2) the electronics companies with a need for precision artwork. G e n e r a t i n g IC artwork a u t o m a t i c a l l y s a v e s t i m e , p r e v e n t s c o s t l y errors. A. K. PASCHERand K. KOLLER,
Electronics, 24 November (1969), p. 117. A computer program minimizes the number of coordinates needed to describe the geometry of an IC, while most of the errors associated with manual methods are eliminated.