Tensile fracture of integrated single-crystal silicon nanowire using MEMS electrostatic testing device

Available online at www.sciencedirect.com

ScienceDirect Available online www.sciencedirect.com Available online at at www.sciencedirect.com Structural Integrity Procedia 00 (2016) 000–000

ScienceDirect ScienceDirect

Procedia Structural 2 (2016) 1405–1412 Structural IntegrityIntegrity Procedia 00 (2016) 000–000

www.elsevier.com/locate/procedia

www.elsevier.com/locate/procedia

21st European Conference on Fracture, ECF21, 20-24 June 2016, Catania, Italy

Tensile fracture of integrated single-crystal silicon nanowire using XV Portuguese Conference on Fracture, PCF 2016, 10-12 February 2016, Paço de Arcos, Portugal MEMS electrostatic testing device Thermo-mechanical modeling of a high pressure turbine blade of an Toshiyuki Tsuchiya*, Tetsuya Hemmi, Jun-ya Suzuki, Yoshikazu Hirai, Osamu Tabata airplane gas turbine engine Department of Micro Engineerng, Kyoto University, Kyotodaigaku-Katsura C3, Nishikyo-ku, Kyoto 615-8540, Japan Abstract

a

P. Brandãoa, V. Infanteb, A.M. Deusc* Department of Mechanical Engineering, Instituto Superior Técnico, Universidade de Lisboa, Av. Rovisco Pais, 1, 1049-001 Lisboa,

Portugal Tensile testing of single-crystal silicon (SCS) nanowire integrated into electrostatic micro electro mechanical system (MEMS) b IDMEC, Department of Mechanical Engineering, Instituto Superior Técnico, Universidade de Lisboa, Av. Rovisco Pais, 1, 1049-001 Lisboa, device was conducted. The nanowire was fabricated using batchPortugal process for future integration of nanowires to MEMS sensors or c actuators. TheDepartment tensile specimen of SCS nanowireInstituto has a circular section of 100detoLisboa, 200 nm diameter, 5 1049-001 μm long.Lisboa, The CeFEMA, of Mechanical Engineering, Superior cross Técnico, Universidade Av. in Rovisco Pais, 1, Portugal wires fabricated using electron beam lithography. The diameter was controlled by oxidizing 800-nm square cross-section oxidizing thinning process also reduced the surface roughness. On-chip tensile testing using an electrostatic actuator and sensor was conducted for the specimen of 190 nm in cross-section size. The tensile strength of the wire was 2.6 GPa. The strength and Abstract fracture properties were discussed by comparing with a silicon nanowire fabricated using two-step Bosch process to examine the difference in surface finishing. During their operation, modern aircraft engine components are subjected to increasingly demanding operating conditions, Copyright © 2016 The Authors. by Elsevier B.V.Such This isconditions an open access BY-NC-ND license especially the high pressurePublished turbine (HPT) blades. causearticle theseunder partsthe to CC undergo different types of time-dependent © 2016 The Authors. Published by Elsevier B.V. (http://creativecommons.org/licenses/by-nc-nd/4.0/). degradation, oneresponsibility of which is creep. model using the finite Peer-review under of theAScientific Committee of element ECF21. method (FEM) was developed, in order to be able to predict Peer-review responsibility of theblades. Scientific Committee of ECF21. the creepunder behaviour of HPT Flight data records (FDR) for a specific aircraft, provided by a commercial aviation company, were used to obtain thermal and mechanical data for three different flight cycles. In order to create the 3D model Keywords: Silicon, Nanowire, Tensile testing, Fracture, MEMS needed for the FEM analysis, a HPT blade scrap was scanned, and its chemical composition and material properties were obtained. The data that was gathered was fed into the FEM model and different simulations were run, first with a simplified 3D rectangular block shape, in order to better establish the model, and then with the real 3D mesh obtained from the blade scrap. The 1. overall Introduction expected behaviour in terms of displacement was observed, in particular at the trailing edge of the blade. Therefore such a model can be useful in the goal of predicting turbine blade life, given a set of FDR data.

Silicon nanowire has attracted great attentions as a semiconductor nanostructure component for a wide range of © 2016 Thebecause Authors.of Published by Elsevier B.V. and electrical properties and the capability to downscale the whole its excellent mechanical applications Peer-review under responsibility of the Scientific of PCF 2016. (Park et al. (2010) and Gao et al. (2007)) are device. As one of these applications, chemical Committee and biological sensors expected utilizing the extremely high surface-to-volume ratio of silicon nanowires. In the previous reports, a silicon Keywords: High Pressure Turbine Blade; Creep; Finite Element Method; 3D Model; Simulation. nanowire was directly fabricated on its substrate surface. To improve the sensitivity and response time, a free-

* Corresponding author. Tel.: +81-75-383-3691; fax: +81-75-383-3738. E-mail address: [email protected] 2452-3216 © 2016 The Authors. Published by Elsevier B.V. * Corresponding Tel.: +351of218419991. Peer-review underauthor. responsibility the Scientific Committee of ECF21. E-mail address: [email protected] 2452-3216 © 2016 The Authors. Published by Elsevier B.V.

Peer-review under responsibility of the Scientific Committee of PCF 2016.

Copyright © 2016 The Authors. Published by Elsevier B.V. This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/). Peer review under responsibility of the Scientific Committee of ECF21. 10.1016/j.prostr.2016.06.178

Toshiyuki Tsuchiya et al. / Procedia Structural Integrity 2 (2016) 1405–1412 Author name / Structural Integrity Procedia 00 (2016) 000–000

1406 2

standing silicon nanowire is required because the functionalized surface area increases and the influence of the substrate reduces. Therefore, the integration of a free-standing silicon nanowire to microelectronics or MEMS (Micro Electro Mechanical Systems) is strongly demanded. However, in order to realize that, complicated fabrication and assembly process are needed, such as a local CVD growth by He et al. (2006) and pick-and-place assembly using focused ion beam processing by Fujii et al. (2013). In this research, we have proposed a new integration process of a free-standing silicon nanowire to MEMS using combination of anisotropic and isotropic dry etching of silicon and oxidation thinning. The advantages of this process are as follows, (1) Batch fabrication is realized unlike conventional techniques, (2) Complicated handling operation after making is not necessary, and (3) Using thermal oxidation thinning process, smooth surface is obtained with its dimensional control. In order to apply these process for a device to be commercialized, the structural integrity should be examined. In this report, two approaches for the integration were examined by measuring the tensile strength of 100-nm indiameter silicon nanowires fabricated to 5 μm thick silicon-on-insulator (SOI)-MEMS structures. By comparing these two fabrication processes, the fracture behavior of the silicon nanowires were discussed. 2. Fabrication of Silicon Nanowire 2.1. Basic idea Combination of anisotropic and isotropic etching is used to integrate nanowires to the device layer of SOI wafer. The anisotropic etching is called as Bosch process, which is a combination of an isotropic etching step of silicon using SF6 and a sidewall passivation step using C4F8. These two steps are repeated to form a vertical sidewall. Then, the isotropic etching using SF6 is followed. Since the etching proceeds along lateral direction as well as vertical direction, line patterns which have etching windows on both side are undercut. If the etching depth is larger than the half length of the pattern width, the line pattern will be released. The sidewall of the line pattern is protected by the passivation film that was formed during the Bosch process, but the bottom surface formed by undercutting is etched to upward direction. Therefore, the etching depth of each etching should be controlled precisely. Fig. 1 shows schematic drawing of the nanowire fabrication process. The dimensions written in the figure shows optimized parameters for fabricating a silicon nanowire of 800-nm-square cress section.

EB resist

800nm

800nm 1.7μm

Si SiO2

5 μm

2 μm

(a) EB lithography

(b) Bosch process

(c) Isotropic etching

(d) Resist removal

Fig. 1. Basic idea for fabricating single crystal silicon nanowire in the micrometer thick device layer of SOI wafer (one-step Bosch).

2.2. Two-step Bosch process The above basic idea has an issue of thickness control, since the released nanowire is thinned during isotropic etching. If there is thickness variation of the device layer, the change of isotropic etching time may affect the thickness of the fabricated nanowire. Therefore a combination of two different recipes of Bosch process has been proposed, as shown in Fig. 2. The first step is the Bosch process with a recipe for fine scallops to the desired thickness of nanowire. Then the recipe is switched to that for coarse scallops, which is usually used for through wafer etching. The depth of scallops is larger than the half width of nanowire, so the nanowire is fully undercut by



Toshiyuki Tsuchiya et al. / Procedia Structural Integrity 2 (2016) 1405–1412 Author name / Structural Integrity Procedia 00 (2016) 000–000

1407 3

the etching step. In this etching step, the bottom of released nanowire is covered with a passivation film. Finally the isotropic etching is followed to shorten the whole processing time. EB resist 5 μm

Si SiO2

Nanowire

2 μm

(a) EB lithography

(b) Bosch process (fine scallops)

(c) Bosch process (coarse scallops)

(d) Isotropic etching

Fig. 2. Two-step Bosch process for fabricating 100-nm wide silicon nanowire on SOI substrate.

2.3. Oxidation thinning The other approach for fabricating nanowire is thinning by oxidation. An 800-nm-wide silicon wire which is fabricated by the basic process is thermally oxidized, shown in Fig. 3b. Then the grown oxide is removed by etching using hydrofluoric (HF) acid, as shown in Fig. 3c. Oxide thickness and consumed silicon thickness is precisely controlled by the oxidation temperature and time. For better controllability of wire thickness and shorter time for processing time, we repeated the process twice at 1000°C; the first oxidation is 6 hour and the second is 2 hours. In order to reduce damage on the fragile nanowire, vapor phase HF etching is used.

(a) 800nm nanowire

(b) Thermal oxidation

(c) Oxide removal

Fig. 3. Oxidation thinning process. 800-nm nanowire is fabricated using basic process.

2.4. Nanowire fabrication results The three types of silicon nanowire fabrication processes were examined using bulk silicon wafers. Diced 5-mmsquare chips were used. A positive type resist (ZEP-520A, ZEONREX) was applied on the chips and exposures were done using an electron beam (EB) lithography tools (ELS-F125HS, Elionix). Dose was 250 μC/cm2. The isotropic and anisotropic etching of silicon was done using inductively coupled plasma reactive ion etching (ICPRIE), (RIE-800iPB, Samco). The etching rates of the fine and coarse scallops, and isotropic etching were 100 nm/cycle, 500 nm/cycle and 3μm/min, respectively. A rapid thermal annealing furnace (MILA-5000, ULVAC) was used for oxidation, and then a custom made vapor HF etching set-up was used for removing oxide film. Fabricated silicon nanowires are shown in Figure 4. Both the one- and two-step Bosch process nanowires have scallops on the sidewalls, whereas the oxide tinning one has smooth surfaces. The thickness of the one-step nanowire looks thicker than expected but in the bright lower part the passivation film seemed remained and the silicon has etched, as seen in the rounded part of the specimen.

Toshiyuki Tsuchiya et al. / Procedia Structural Integrity 2 (2016) 1405–1412 Author name / Structural Integrity Procedia 00 (2016) 000–000

1408 4

Top view Onestep Bosch Process

45° tilt

785nm

3 μm

3 μm

Twostep Bosch

1 μm

151 nm

135 nm

2 μm

2 μm

500 nm

147nm

Oxide thinning 3μm

3μm

1 μm

Fig. 4. Fabricated silicon nanowire on bulk silicon substrate using three different approaches.

3. SOI-MEMS Tensile Testing Device with Integrated Silicon Nanowire Silicon nanowires were integrated to an SOI-MEMS device for measuring the tensile properties, which was designed as a modification of a device developed for a fullerene nanowire testing by Tsuchiya et al. (2012). The schematic design of the device is shown in Fig.5. The device consists of a parallel plate capacitance for generating tensile force and a differential displacement sensor using parallel plate capacitance and suspending beams. The device structure was designed to adopt a silicon nanowire of 100 nm in diameter. The estimated force and displacement to test 5-μm-long specimen were 30 μN and 90 nm, respectively.

Specimen specification

Fixed

Diameter (nm) Parallel plate actuator

Displacement sensor

Suspending beams

SiNW

100

Length (μm)

5

Fracture strength (GPa)

3

Young’s modulus (GPa)

168.9

Required force (μN)

30

Fracture displacement (nm)

90

Device specification Force at 20 V(μN)

50

Displacement resolution (nm)

1

Force resolution (μN)

0.12

Fig. 5 Schematic of SOI-MEMS tensile testing device. Dark blue regions are fixed to substrate and light blue regions are released and moving along tensile direction indicated with orange arrow. Target specification of nanowire specimen and device characteristics are listed in table.



Toshiyuki Tsuchiya et al. / Procedia Structural Integrity 2 (2016) 1405–1412 Author name / Structural Integrity Procedia 00 (2016) 000–000

1409 5

The device structure was fabricated first, using UV photolithography and Bosch process, as shown in Figs. 6a and 6b, using 4-inch SOI wafer. The patterned device layer was passivated with SiO 2 using plasma enhanced chemical vapor deposition (pCVD) to protect the device structure during nanowire fabrication and the SiO2 firm of the area where nanowires were fabricated was etched (Figs. 6c and 6d). Further process steps was done after the wafer was diced into 7-mm square chips. After silicon nanowire was fabricated using one of the aforementioned processes, aluminum electrodes are deposited using electron beam deposition with a stencil mask. Finally, the buried oxide layer was etched using vapor HF to release the structure. Fabricated device is shown in Fig. 7. Nanowires are integrated to SOI-MEMS testing device without any apparent damage on the device structure. Photoresist

Si

Passivation

Device fabrication

SiO2

(a) Resist patterning

(b) Si DRIE

(c) pCVD SiO2

(d) SiO2 etch

EB resist SiNW

(e) EB resist application

(f) SiNW process

Metal

(g) Al Electrode

(h) Release

Fig. 6 Fabrication process of SOI-MEMS tensile testing device integrated silicon nanowire to its device layer.

Fig. 7. Fabricated device. Nanowire was integrated at encircled portion (left). Parallel plate capacitor for actuation (center), and Capacitive displacement sensor (right).

The fabricated device was mounted on a ceramic package and connected to drive and capacitance readout circuits. The readout circuit (AT-1006, ACT-LSI) has a sensitivity of 150 V/pF and the noise level is around 10 mV, which corresponds to 0.1-fF capacitance change. Tensile testing was conducted in the air under a video microscope observation. The actuation voltage for the electrostatic actuator was slowly increased with monitoring the output voltage of the capacitance readout circuit. 4. Tensile Testing Results 4.1. Two-step Bosch process A silicon nanowire of 164 nm wide and 317 nm thick was fabricated, as shown in Fig. 8. In this fabrication process a photoresist was used for passivation instead of pCVD SiO 2 film, the edges of the device layer were damaged during nanowire fabrication step. In addition the thickness of the wire was larger than we designed. The wire has a lot of contaminations and the cross sectional dimensions are not uniform through the wire. Fracture was observed at the actuation voltage of 42 V. Since the displacement sensor was also damaged, only fracture strength was evaluated. The tensile force calculated from measured dimensions of the device structures and

Toshiyuki Tsuchiya et al. / Procedia Structural Integrity 2 (2016) 1405–1412 Author name / Structural Integrity Procedia 00 (2016) 000–000

1410 6

theoretical modulus was at fracture as 80.5 μN and the fracture strength was 1.55 GPa. The value is relatively low compared to previous reports on silicon nano and micro beams.

Fig. 8 Tensile testing specimen fabricated using two-step Bosch process. Before testing (left). After testing (center and right).

4.2. Thinning by Oxidation Fig. 9 shows the integrated silicon nanowire as a tensile test specimen, which was thinned by one-time oxidation for 8 hours at 1000°C. The voltage change of the capacitance readout circuit during tensile testing is shown in Fig.10a. The specimen fractured at 35 V of the actuation voltage. At the moment, the displacement of the device suddenly increased and the output voltage was saturated. The center part of the specimen is missing after testing. It is difficult to identify the fracture origin location. After the testing, the displacement sensor was calibrated using the video microscope image. The measured displacement sensitivity was 11.4 mV/nm. The dimensions of the device were checked by scanning electron microscope (SEM) observation and the measured dimensions were used for calculation of the actuation force. The width and thickness was measured as 190 nm and 152 nm, respectively. Since the corners of the specimen were rounded during oxidation, we assumed the cross-section as an ellipsoidal shape. Finally we obtained the stress-strain curve as shown in Fig. 10b, in which the rounded part of the both end of the specimen was taken into account. The fracture strength and strain was 2.6 GPa and 1.5%, respectively, which is much better than the two-step Bosch process specimen, but is lower than the other reports on silicon nanowires. The Young’s modulus was 164 GPa, which is closed the theoretical value, which confirms the correctness and accuracy of the testing device and measurement process. The fracture surface was observed as shown in Fig. 11. The fracture surface is a (111) plane and the fracture initiated from the bottom surface of the specimen.

3 μm

3 μm

Fig. 9Tensile testing specimen fabricated using oxide thinning process. Before testing (left). After testing (center and right).

Author name / Structural (2016) 000–000 Toshiyuki Tsuchiya et al. / Integrity ProcediaProcedia Structural00Integrity 2 (2016) 1405–1412

3

1.5

Stress （GPa)

Output voltage change (V)



1.0

0.5

0.0

0

10

20 Voltage(V)

30

7 1411

y = 163.6 x

2

1

0

0

0.005

0.01 Strain

0.015

0.02

Fig. 10 Tensile testing result for silicon nanowire thinned by oxidation. a) displacement sensor output voltage as a function of voltage applied to electrostatic actuator. b) stress-strain plot.

Fig. 11 Fracture surface of silicon nanowire.

4.3. Discussion Both the two-step Bosch process and oxide thinning process were successful in integrating 100-nm silicon nanowire to micrometer scale SOI device structures. The process will be useful for realizing nanoscale electrical and mechanical devices, such as nanowire gas sensors and resonators. The strength of the nanowires are higher than 1 GPa and would be high enough for these applications. However, the strength can be improved by modifying the process conditions, since the strength of silicon microstructures is mostly dominated by the roughness of size of defects on the surface where fracture initiates. For the two-step Bosch process, the scallops generated by the repetition of etching and passivation was one of the main factors of the lower strength. Though the scallops are small as 100 nm, it is comparable to dimensions of the nanowire, which reduces the strength significantly. Bosch process with much finer scallops or Cryogenic process will increase strength. For oxide thinning, we found that the thickness was not uniform throughout the specimen, which is seen in Fig. 9. This was originated from the thickness non-uniformity in the one-step Bosch process. The reason would be the upward etching during the isotropic etching step. We need to consider a similar bottom surface passivation during the second Bosch process in the two-step type. 5. Conclusion The tensile strength of single crystal silicon nanowire integrated to 5-μm-thick SOI-MEMS device structures were measured using the electrostatically driven and detected testing device. The two types of silicon nanowire fabrication process was examined; the two-step Bosch process with fine and coarse scallop following the isotropic

1412 8

Toshiyuki Tsuchiya et al. / Procedia Structural Integrity 2 (2016) 1405–1412 Author name / Structural Integrity Procedia 00 (2016) 000–000

process, and thinning by oxidation for 800-nm wire fabricated by the one-step Bosch process. The fabricated nanowires were 150~200 nm in cross-section size and 5μm long. The tensile strength of the two-step Bosch and oxidation thinned specimens were 1.6 and 2.6 GPa, respectively. Both the fractures would be caused by the surface defects originated from fabrication imperfections, which gives us a direction for improving strength of silicon nanowires. The proposed batch nanowire integration process to micro-scale MEMS will be useful for realizing a new nanoscale sensing or actuating device. Acknowledgements This work was supported by JSPS KAKENHI Grant Number 26600062 and JKA. A part of this work was supported by Kyoto University Nano Technology Hub in "Nanotechnology Platform Project" sponsored by the Ministry of Education, Culture, Sports, Science and Technology (MEXT), Japan. The authors would like to thank to Dr. K. Ishikawa and Prof. T. Sumigawa for their help on SEM observation. References Fujii, T., Sudoh, K., Sakakihara, S., Naito, M., Inoue S., Namazu, T., 2013. Nano-Scale Tensile Testing and Sample Preparation Techniques for Silicon Nanowires. Japanese Journal of Applied Physics 52, 110118. Gao, Z., Agarwal, A., Trigg, A.D., Singh, N., Fang, C., Tung, C.-H., Fan, Y. Buddharju, K.D., Kong J., 2007. Silicon Nanowire Arrays for LabelFree Detection of DNA. Analytical Chemistry 79, 3291. He, R., Yang, P., 2006. Giant piezoresistance effect in silicon nanowires. Nature Nanotechnology 1, 42. Park, I., Li, Z., Pisano, A.P., Williams, R.S, 2010, Top-down fabricated silicon nanowire sensors for real-time chemical detection. Nanotechnology 21, 015501. Tsuchiya, T., Ura, Y., Sugano K., Tabata, O., 2012. Electrostaic tensile testing device with nanonewton and nanometer resolution and its application to C60 nanowire testing. Journal of Microelectromechanical Systems 21, 523.