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Tetraethylorthosilicate SiO2 films deposited at a low temperature
Microelectronics Reliability 40 (2000) 621±624
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Tetraethylorthosilicate SiO2 ®lms deposited at a low temperature A.N.R. da Silva a,*, N.I. Morimoto a, O. Bonnaud b,1 b
a L.S.I. ± EPUSP, S~ ao Paulo, CEP 05508-900, S.P., Brazil GMV-UPRESA 6076, University de Rennes I, 33042 Rennes Cedex, France
Abstract In this work, we present the results obtained on the characterization of silicon oxide thin ®lms deposited by plasma enhanced chemical vapor deposition using tetraethylorthosilicate (TEOS) as a silicon source. The in¯uence of the reaction kinetics in the deposition process was analyzed. The RF power enhances the O* generation in the plasma increases the TEOS oxidation process in the gas phase. Also, the oxidation reaction and sub-products elimination, from the surface during solid phase reaction, are improved. The wafer holder temperature contributes to the volatile subproducts elimination from the substrate surface. There is no evidence of Si±OH and OH bonds in the Fourier transform infrared spectra from the ®lms deposited above 300°C. The densi®cation process improved the electrical characteristics of the ®lm showing an elimination of the trapped charges promoted by the thermal treatment. Ó 2000 Elsevier Science Ltd. All rights reserved.
1. Introduction Silicon oxide is widely used in thin ®lm technologies. Plasma enhanced chemical vapor deposition (PECVD), using tetraethylorthosilicate (TEOS) as the silicon source, is a well-known technique to deposit silicon oxide thin ®lms [1,2]. This technique presents the advantage of using a low temperature in the deposition process allowing the deposition over dierent types of substrates. We are developing a silicon oxide thin ®lm deposition process to be applied as well in the integrated technology for metal interlevel dielectrics as in the large area technology for gate oxide of thin ®lm devices [3]. This work presents the main results obtained by optical emission spectroscopy (OES) and Fourier transform infrared spectroscopy (FTIRS) of silicon oxide thin ®lms, in order to understand the physical and chemical
* Corresponding author. Tel.: +55-11-818-5666; fax: +55-11818-5665. E-mail addresses: [email protected] (A.N.R. da Silva), [email protected] (N.I. Morimoto), [email protected] (O. Bonnaud). 1 Tel.: +33-2-99-28-60-71; fax: +33-2-99-28-16-74.
mechanisms involved in the deposition process to get a dielectric layer with a suitable electrical behavior. C±V and I±E measurements were performed in MOS capacitors to obtain the electrical characteristics of the deposited silicon oxide.
2. Experimental The PECVD home-made cluster tool system, used in this study, has three process chambers, a load lock and a sample manipulation robot arm [4]. Silicon wafers (1 0 0), p-type, 10±20 X cm, 75 mm in diameter were used as the substrate. The experiments were carried out using a gas mixture of the TEOS and oxygen in the basic following conditions: 5 sccm TEOS, 500 sccm of O2 , a wafer holder temperature of 360°C, a pressure of 1 Torr, a RF power of 400 W and a distance between electrodes of 15 mm. We analyzed the in¯uence of RF power, wafer holder temperature and total pressure in the deposited silicon oxide layer. The gas phase was analyzed by the OES. FTIRS was performed to determine the chemical bonding states of the oxide. The deposition rate and the refractive index of deposited silicon oxide thin ®lms were determined by
0026-2714/00/$ - see front matter Ó 2000 Elsevier Science Ltd. All rights reserved. PII: S 0 0 2 6 - 2 7 1 4 ( 9 9 ) 0 0 2 9 6 - 6
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A.N.R. da Silva et al. / Microelectronics Reliability 40 (2000) 621±624
ellipsometry. For the wet etching rate measurements, we used a diluted HF solution (1:100). Aluminum contact MOS capacitors were implemented for the C±V 1 MHz and I±E measurements. The aluminum layer was annealed at 430°C in forming gas during 30 min. The ®nal capacitor test cell area is 300 300 lm2 .
3. Results and discussion 3.1. Silicon oxide thin ®lm characterization Fig. 1 shows the deposition and etching rates versus RF power. We observe an increase of the deposition rate for the RF power higher than 250 W. This behavior is explained by the high production of excited oxygen (O*) in the reactor, as observed by the OES analysis (Fig. 2), which enhances the TEOS molecules oxidation. The lower deposition rate, for an RF power higher than 350 W, can be attributed to a change in the kinetics of TEOS reaction, which is also attributed to the two slopes observed in the CO emission curves (see Fig. 2).
For RF power lower than 250 W, the energy of the plasma is too low to generate enough O* [5]. The variation of the refractive index value follows the deposition rate and is close to 1.46 for the ®lms deposited in an RF power higher than 350 W. For the ®lms deposited with a lower RF power, the refractive index is higher than 1.46 suggesting ®lms rich in silicon. Fig. 3 shows the variation of deposition and etching rates with the wafer holder temperature. This behavior is typical of adsorption controlled reactions. An increase in the temperature increases the kinetic energy of active species, which also increases the desorption probability and thus reduces the adsorption probability [6]. The refractive index value increases with the substrate holder temperature, and are close to 1.46 for the ®lms deposited above 300°C. The ®lms deposited at a lower temperature show a refractive index value ranging from 1.45 to 1.46, suggesting ®lms rich in oxygen. This observation is con®rmed by a decrease in the etching rate with temperature, which means that these ®lms are less dense. In this way, a higher silicon oxide ®lm densi®cation occurs when a higher deposition temperature is used [7]. The in¯uence of the total pressure on the deposition, etching rates and uniformity is shown in Fig. 4. The etching rate increases with the pressure and reaches a maximum at around 2 Torr. This behavior can be explained by the variation in the gas ¯ow regime in this pressure range [8]. Considering the ¯ux of gas mixture constant, when the process pressure is increased, the mean free path of the molecules and gas velocity decreases, and the residence time increases; so interactions between the species in the gas phase are improved. When the gas velocity decreases, the sub-products of surface reaction can not be well removed, and some of them remain trapped inside the ®lm. These sub-products, as reported in the literature, are mainly Si±OH and ±OH, which enhance the silicon oxide etching rate [1].
Fig. 1. Deposition and etching rates versus the RF power.
Fig. 2. Intensity of optical emission bands of oxygen IO and carbon monoxide ICO versus RF power.
Fig. 3. Deposition and etching rate versus wafer holder temperature.
A.N.R. da Silva et al. / Microelectronics Reliability 40 (2000) 621±624
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silicon oxide ®lms deposited above 300°C, contain less sub-products trapped inside the layer and they have a better structure. 3.2. Electrical characterization of SiO2 thin ®lms
Fig. 4. Deposition, etching rate and non-uniformity versus process pressure.
Also, changes in the gas velocity leads to a nonuniform distribution of the gas mixture over the substrate surface, resulting in a deposited thin ®lm with low uniformity, as we can observe in Fig. 4. The FTIRS analysis showed no evidence of Si±OH and ±OH absorbance bands at temperatures higher than 300°C, as we can observe in Fig. 5. The increase in the deposition temperature enhances the elimination of volatile sub-products of oxidation reaction of the TEOS radicals at the surface [6]. The three characteristic absorption bands due to Si±O are observed in Fig. 5. The position of the stretching absorption band has a small variation 4 cmÿ1 as a function of the temperature. Regardless of small variations, this behavior reveals a modi®cation in the silicon oxide ®lm structure when the wafer holder temperature increases. The absorption band at 1254 cmÿ1 is well de®ned in the FTIR spectra for the ®lms deposited above 300°C. This band is sensitive to the morphological changes in the silicon oxide ®lm [9]. This behavior shows that the
Fig. 5. FTIR spectra of silicon oxide thin ®lms deposited at temperatures ranging from 240±420°C. The Si±OH and OH bands were not observed in these spectra.
MOS capacitors were implemented with silicon oxide ®lm deposited in the basic condition. The silicon oxide layer was densi®ed in a RTP furnace at 1100°C, 120 s. In Fig. 6, is shown the C±V HF curves with hysteresis. These curves were obtained at room temperature. The curve obtained from densi®ed ®lms shows less displacement than the as-deposited ®lm. This displacement is proportional to the charge concentration in the oxide. The region, where the distortion appears in the C±V HF curve, is the result of presence of Dit near the valence band [10]. The densi®ed silicon oxide ®lm C±V curve shows less negative ¯at-band voltage Vfb than the as-deposited ®lm. Negative ¯at-band voltage means the positive charges in the oxide [11]. The shift in the ¯at-band voltage to the positive value indicates that the charges in the oxide are eliminated by the annealing treatment. The lower capacitance value obtained for the densi®ed ®lm con®rms that the ®lm structure modi®es with the thermal treatment. The value of the dielectric constant was obtained from the C±V HF curve and calculated according to the relation e Cox xox =e0 A; where e0 is the permittivity of free space, and the oxide thickness xox was obtained by ellipsometry. We also observe that both curves show deep depletion when they pass from a negative voltage region to a positive voltage region. Fig. 7 shows the characteristic I±E curve of the asdeposited silicon oxide ®lm as well as the densi®ed ®lm.
Fig. 6. C±V HF curves with hysteresis of MOS capacitors implemented with the silicon oxide ®lms deposited with pulsed plasma.
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A.N.R. da Silva et al. / Microelectronics Reliability 40 (2000) 621±624
Fig. 7. I±E curves of MOS capacitors. Table 1 Electrical parameters Thickness (nm) e Vfb (V) Nss (cmÿ2 ) Ileakage (A) Ebd (MV/cm)
As deposited
Densi®ed
80 4.35 )2.71 5:36 10ÿ11 4 10ÿ10 9.0
78 3.53 )0.99 1:45 10ÿ10 1:75 10ÿ11 10.5
The as-deposited ®lm shows a higher leakage current and the electron injection starts at a very low ®eld (2 MV/cm) con®rming the presence of trapped products. Table 1 summarizes the electrical parameters extracted from the C±V and I±E curves. From this table, we observe that the value of the dielectric constant e decreases after annealing. This behavior can be explained by the presence of Si±OH and ±OH contamination in the oxide layer. Although the FTIRs spectra do not show any signature for these bondings, it can be present in the ®lm. The value obtained for the densi®ed sample, lower than that reported for thermal silicon oxide, may be explained by the presence of dangling bonds into the silicon oxide, which was not completed during annealing. The densi®cation step improves the electrical characteristics of the silicon oxide ®lm, which is attributed to the elimination of trapped charges by the thermal treatment. These charges are produced during the deposition process due to the sub-products of the TEOS oxidation [12]. 4. Conclusion The RF power enhances the O* generation in the plasma increasing the TEOS oxidation process in the gas
phase. Also, the oxidation reaction and sub-products elimination, from the surface during the solid phase reaction, are improved. The wafer holder temperature contributes to the volatile sub-products elimination from the substrate surface. There is no evidence of Si± OH and OH bonds in the FTIR spectra from the ®lms deposited above 300°C. We observed a decrease in the dielectric constant e after annealing, due to the presence of Si±OH and ±OH contamination in the oxide layer. This contamination is below the detection limit of the FTIRS analysis technique. The densi®cation process improved the electrical characteristics of the ®lm showing an elimination of the trapped charges promoted by the thermal treatment.
Acknowledgements We are grateful to Carlos do Nascimento and Gilberto Nishioka for their constant help in the PECVD system, Dr. Maurõcio M. Oka, and the SOI±MOSFET group for the discussions in electrical analysis. Financial support from CAPES/COFECUB and FAPESP are gratefully acknowledged.
References [1] Fracassi A, d' Agostino R, Favia P. J Electrochem Soc 1992;139(9):2636±44. [2] Desshmukh SC, Aydil ES. J Vac Sci Technol B 1996;14(2):738±43. [3] Morimoto NI, Swart JW, Sala un A-C, Bonnaud O, Fortin B. Seventh ESPRIT, Workshop on Dielectrics in Microelectronics, Crete, Greece, 1995. [4] Morimoto NI, Swart JW. Rapid thermal and integrated processing V. MRS Symp Proc 1996;429:263±8. [5] Shareef IA, Rublo GW, Gill WN. J Vac Sci Technol B 1996;14(2):772±4. [6] Patrick WJ, Schwartz GC, Chapple-Sokol JD, Carruthers R, Olsen K. J Electrochem Soc 1992;139(9):2604±13. [7] Chin BL, Ven EPV. Solid State Technol 1988;31(4): 119±22. [8] da Silva ANR, Morimoto NI. Proceedings of the 13th SBMicro-ICMPÕ98, Curitiba, Brazil, 1998, p. 194. [9] Schliwinski HJ, Schnakenberg U, Windbracke W, Ne H, Lange P. J Electrochem Soc 1992;139(6):1730±5. [10] Schroder DK. Semiconductor material and device characterization, oxide and interface trapped charge. New York: Wiley, p. 244±94 [chapter 6]. [11] Ray SK, Maiti CK, Lahiri SK, Chakrabarti NB. J Vac Sci Technol B 1992;10(3):1139±50. [12] Viana CE, Morimoto NI. Proceedings of the 13th SBMicro-ICMPÕ98, Curitiba, Brazil, 1998, p. 388.
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Tetraethylorthosilicate SiO2 ®lms deposited at a low temperature A.N.R. da Silva a,*, N.I. Morimoto a, O. Bonnaud b,1 b
a L.S.I. ± EPUSP, S~ ao Paulo, CEP 05508-900, S.P., Brazil GMV-UPRESA 6076, University de Rennes I, 33042 Rennes Cedex, France
Abstract In this work, we present the results obtained on the characterization of silicon oxide thin ®lms deposited by plasma enhanced chemical vapor deposition using tetraethylorthosilicate (TEOS) as a silicon source. The in¯uence of the reaction kinetics in the deposition process was analyzed. The RF power enhances the O* generation in the plasma increases the TEOS oxidation process in the gas phase. Also, the oxidation reaction and sub-products elimination, from the surface during solid phase reaction, are improved. The wafer holder temperature contributes to the volatile subproducts elimination from the substrate surface. There is no evidence of Si±OH and OH bonds in the Fourier transform infrared spectra from the ®lms deposited above 300°C. The densi®cation process improved the electrical characteristics of the ®lm showing an elimination of the trapped charges promoted by the thermal treatment. Ó 2000 Elsevier Science Ltd. All rights reserved.
1. Introduction Silicon oxide is widely used in thin ®lm technologies. Plasma enhanced chemical vapor deposition (PECVD), using tetraethylorthosilicate (TEOS) as the silicon source, is a well-known technique to deposit silicon oxide thin ®lms [1,2]. This technique presents the advantage of using a low temperature in the deposition process allowing the deposition over dierent types of substrates. We are developing a silicon oxide thin ®lm deposition process to be applied as well in the integrated technology for metal interlevel dielectrics as in the large area technology for gate oxide of thin ®lm devices [3]. This work presents the main results obtained by optical emission spectroscopy (OES) and Fourier transform infrared spectroscopy (FTIRS) of silicon oxide thin ®lms, in order to understand the physical and chemical
* Corresponding author. Tel.: +55-11-818-5666; fax: +55-11818-5665. E-mail addresses: [email protected] (A.N.R. da Silva), [email protected] (N.I. Morimoto), [email protected] (O. Bonnaud). 1 Tel.: +33-2-99-28-60-71; fax: +33-2-99-28-16-74.
mechanisms involved in the deposition process to get a dielectric layer with a suitable electrical behavior. C±V and I±E measurements were performed in MOS capacitors to obtain the electrical characteristics of the deposited silicon oxide.
2. Experimental The PECVD home-made cluster tool system, used in this study, has three process chambers, a load lock and a sample manipulation robot arm [4]. Silicon wafers (1 0 0), p-type, 10±20 X cm, 75 mm in diameter were used as the substrate. The experiments were carried out using a gas mixture of the TEOS and oxygen in the basic following conditions: 5 sccm TEOS, 500 sccm of O2 , a wafer holder temperature of 360°C, a pressure of 1 Torr, a RF power of 400 W and a distance between electrodes of 15 mm. We analyzed the in¯uence of RF power, wafer holder temperature and total pressure in the deposited silicon oxide layer. The gas phase was analyzed by the OES. FTIRS was performed to determine the chemical bonding states of the oxide. The deposition rate and the refractive index of deposited silicon oxide thin ®lms were determined by
0026-2714/00/$ - see front matter Ó 2000 Elsevier Science Ltd. All rights reserved. PII: S 0 0 2 6 - 2 7 1 4 ( 9 9 ) 0 0 2 9 6 - 6
622
A.N.R. da Silva et al. / Microelectronics Reliability 40 (2000) 621±624
ellipsometry. For the wet etching rate measurements, we used a diluted HF solution (1:100). Aluminum contact MOS capacitors were implemented for the C±V 1 MHz and I±E measurements. The aluminum layer was annealed at 430°C in forming gas during 30 min. The ®nal capacitor test cell area is 300 300 lm2 .
3. Results and discussion 3.1. Silicon oxide thin ®lm characterization Fig. 1 shows the deposition and etching rates versus RF power. We observe an increase of the deposition rate for the RF power higher than 250 W. This behavior is explained by the high production of excited oxygen (O*) in the reactor, as observed by the OES analysis (Fig. 2), which enhances the TEOS molecules oxidation. The lower deposition rate, for an RF power higher than 350 W, can be attributed to a change in the kinetics of TEOS reaction, which is also attributed to the two slopes observed in the CO emission curves (see Fig. 2).
For RF power lower than 250 W, the energy of the plasma is too low to generate enough O* [5]. The variation of the refractive index value follows the deposition rate and is close to 1.46 for the ®lms deposited in an RF power higher than 350 W. For the ®lms deposited with a lower RF power, the refractive index is higher than 1.46 suggesting ®lms rich in silicon. Fig. 3 shows the variation of deposition and etching rates with the wafer holder temperature. This behavior is typical of adsorption controlled reactions. An increase in the temperature increases the kinetic energy of active species, which also increases the desorption probability and thus reduces the adsorption probability [6]. The refractive index value increases with the substrate holder temperature, and are close to 1.46 for the ®lms deposited above 300°C. The ®lms deposited at a lower temperature show a refractive index value ranging from 1.45 to 1.46, suggesting ®lms rich in oxygen. This observation is con®rmed by a decrease in the etching rate with temperature, which means that these ®lms are less dense. In this way, a higher silicon oxide ®lm densi®cation occurs when a higher deposition temperature is used [7]. The in¯uence of the total pressure on the deposition, etching rates and uniformity is shown in Fig. 4. The etching rate increases with the pressure and reaches a maximum at around 2 Torr. This behavior can be explained by the variation in the gas ¯ow regime in this pressure range [8]. Considering the ¯ux of gas mixture constant, when the process pressure is increased, the mean free path of the molecules and gas velocity decreases, and the residence time increases; so interactions between the species in the gas phase are improved. When the gas velocity decreases, the sub-products of surface reaction can not be well removed, and some of them remain trapped inside the ®lm. These sub-products, as reported in the literature, are mainly Si±OH and ±OH, which enhance the silicon oxide etching rate [1].
Fig. 1. Deposition and etching rates versus the RF power.
Fig. 2. Intensity of optical emission bands of oxygen IO and carbon monoxide ICO versus RF power.
Fig. 3. Deposition and etching rate versus wafer holder temperature.
A.N.R. da Silva et al. / Microelectronics Reliability 40 (2000) 621±624
623
silicon oxide ®lms deposited above 300°C, contain less sub-products trapped inside the layer and they have a better structure. 3.2. Electrical characterization of SiO2 thin ®lms
Fig. 4. Deposition, etching rate and non-uniformity versus process pressure.
Also, changes in the gas velocity leads to a nonuniform distribution of the gas mixture over the substrate surface, resulting in a deposited thin ®lm with low uniformity, as we can observe in Fig. 4. The FTIRS analysis showed no evidence of Si±OH and ±OH absorbance bands at temperatures higher than 300°C, as we can observe in Fig. 5. The increase in the deposition temperature enhances the elimination of volatile sub-products of oxidation reaction of the TEOS radicals at the surface [6]. The three characteristic absorption bands due to Si±O are observed in Fig. 5. The position of the stretching absorption band has a small variation 4 cmÿ1 as a function of the temperature. Regardless of small variations, this behavior reveals a modi®cation in the silicon oxide ®lm structure when the wafer holder temperature increases. The absorption band at 1254 cmÿ1 is well de®ned in the FTIR spectra for the ®lms deposited above 300°C. This band is sensitive to the morphological changes in the silicon oxide ®lm [9]. This behavior shows that the
Fig. 5. FTIR spectra of silicon oxide thin ®lms deposited at temperatures ranging from 240±420°C. The Si±OH and OH bands were not observed in these spectra.
MOS capacitors were implemented with silicon oxide ®lm deposited in the basic condition. The silicon oxide layer was densi®ed in a RTP furnace at 1100°C, 120 s. In Fig. 6, is shown the C±V HF curves with hysteresis. These curves were obtained at room temperature. The curve obtained from densi®ed ®lms shows less displacement than the as-deposited ®lm. This displacement is proportional to the charge concentration in the oxide. The region, where the distortion appears in the C±V HF curve, is the result of presence of Dit near the valence band [10]. The densi®ed silicon oxide ®lm C±V curve shows less negative ¯at-band voltage Vfb than the as-deposited ®lm. Negative ¯at-band voltage means the positive charges in the oxide [11]. The shift in the ¯at-band voltage to the positive value indicates that the charges in the oxide are eliminated by the annealing treatment. The lower capacitance value obtained for the densi®ed ®lm con®rms that the ®lm structure modi®es with the thermal treatment. The value of the dielectric constant was obtained from the C±V HF curve and calculated according to the relation e Cox xox =e0 A; where e0 is the permittivity of free space, and the oxide thickness xox was obtained by ellipsometry. We also observe that both curves show deep depletion when they pass from a negative voltage region to a positive voltage region. Fig. 7 shows the characteristic I±E curve of the asdeposited silicon oxide ®lm as well as the densi®ed ®lm.
Fig. 6. C±V HF curves with hysteresis of MOS capacitors implemented with the silicon oxide ®lms deposited with pulsed plasma.
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A.N.R. da Silva et al. / Microelectronics Reliability 40 (2000) 621±624
Fig. 7. I±E curves of MOS capacitors. Table 1 Electrical parameters Thickness (nm) e Vfb (V) Nss (cmÿ2 ) Ileakage (A) Ebd (MV/cm)
As deposited
Densi®ed
80 4.35 )2.71 5:36 10ÿ11 4 10ÿ10 9.0
78 3.53 )0.99 1:45 10ÿ10 1:75 10ÿ11 10.5
The as-deposited ®lm shows a higher leakage current and the electron injection starts at a very low ®eld (2 MV/cm) con®rming the presence of trapped products. Table 1 summarizes the electrical parameters extracted from the C±V and I±E curves. From this table, we observe that the value of the dielectric constant e decreases after annealing. This behavior can be explained by the presence of Si±OH and ±OH contamination in the oxide layer. Although the FTIRs spectra do not show any signature for these bondings, it can be present in the ®lm. The value obtained for the densi®ed sample, lower than that reported for thermal silicon oxide, may be explained by the presence of dangling bonds into the silicon oxide, which was not completed during annealing. The densi®cation step improves the electrical characteristics of the silicon oxide ®lm, which is attributed to the elimination of trapped charges by the thermal treatment. These charges are produced during the deposition process due to the sub-products of the TEOS oxidation [12]. 4. Conclusion The RF power enhances the O* generation in the plasma increasing the TEOS oxidation process in the gas
phase. Also, the oxidation reaction and sub-products elimination, from the surface during the solid phase reaction, are improved. The wafer holder temperature contributes to the volatile sub-products elimination from the substrate surface. There is no evidence of Si± OH and OH bonds in the FTIR spectra from the ®lms deposited above 300°C. We observed a decrease in the dielectric constant e after annealing, due to the presence of Si±OH and ±OH contamination in the oxide layer. This contamination is below the detection limit of the FTIRS analysis technique. The densi®cation process improved the electrical characteristics of the ®lm showing an elimination of the trapped charges promoted by the thermal treatment.
Acknowledgements We are grateful to Carlos do Nascimento and Gilberto Nishioka for their constant help in the PECVD system, Dr. Maurõcio M. Oka, and the SOI±MOSFET group for the discussions in electrical analysis. Financial support from CAPES/COFECUB and FAPESP are gratefully acknowledged.
References [1] Fracassi A, d' Agostino R, Favia P. J Electrochem Soc 1992;139(9):2636±44. [2] Desshmukh SC, Aydil ES. J Vac Sci Technol B 1996;14(2):738±43. [3] Morimoto NI, Swart JW, Sala un A-C, Bonnaud O, Fortin B. Seventh ESPRIT, Workshop on Dielectrics in Microelectronics, Crete, Greece, 1995. [4] Morimoto NI, Swart JW. Rapid thermal and integrated processing V. MRS Symp Proc 1996;429:263±8. [5] Shareef IA, Rublo GW, Gill WN. J Vac Sci Technol B 1996;14(2):772±4. [6] Patrick WJ, Schwartz GC, Chapple-Sokol JD, Carruthers R, Olsen K. J Electrochem Soc 1992;139(9):2604±13. [7] Chin BL, Ven EPV. Solid State Technol 1988;31(4): 119±22. [8] da Silva ANR, Morimoto NI. Proceedings of the 13th SBMicro-ICMPÕ98, Curitiba, Brazil, 1998, p. 194. [9] Schliwinski HJ, Schnakenberg U, Windbracke W, Ne H, Lange P. J Electrochem Soc 1992;139(6):1730±5. [10] Schroder DK. Semiconductor material and device characterization, oxide and interface trapped charge. New York: Wiley, p. 244±94 [chapter 6]. [11] Ray SK, Maiti CK, Lahiri SK, Chakrabarti NB. J Vac Sci Technol B 1992;10(3):1139±50. [12] Viana CE, Morimoto NI. Proceedings of the 13th SBMicro-ICMPÕ98, Curitiba, Brazil, 1998, p. 388.