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CdS solar cells
Thin Solid Films 515 (2007) 7364 – 7369 www.elsevier.com/locate/tsf
The formation of different phases of CuxTe and their effects on CdTe/CdS solar cells ☆ J. Zhou a,⁎, X. Wu a , A. Duda a , G. Teeter a , S.H. Demtsu b a
b
National Renewable Energy Laboratory (NREL), Golden, CO 80401, USA Department of Physics, Colorado State University, Fort Collins, CO 80523, USA
Received 12 May 2006; received in revised form 12 February 2007; accepted 12 March 2007 Available online 20 March 2007
Abstract Material studies and device applications of CuxTe in an NREL-developed CdTe solar cell structured as glass/Cd2SnO4/ZnSnOx/CdS/CdTe are presented. The CuxTe primary back contact was formed by evaporating a Cu layer with various thicknesses at room temperature on HNO3/H3PO4 (NP) solution etched CdTe layer. A post-annealing was then followed. The structural evolution and electrical properties of CuxTe were investigated. Cu/Te ratio and post-annealing temperature are two processing parameters in this study. The CuxTe phases are mainly controlled by the Cu/Te ratio. After a post-annealing at a low temperature, such as 100 °C, no CuxTe phase transformation from its as-deposited phase was observed. A post-annealing treatment at a higher temperature, such as 250 °C, can reveal the stoichiometric CuxTe phases based on the Cu/Te ratio used in the devices. But a post-annealing at a further higher temperature, such as 400 °C, resulted in a complicated CuxTe phase appearance. CuTe, Cu1.4Te, and Cu2Te are three major phases detected by X-ray diffraction (XRD) for different Cu thickness application annealed at 250 °C. Application of Cu thicker than 60 nm degrades open-circuit voltage (Voc) and shunting resistance (Rsh), but increases series resistance (Rs). The correlation between device performance and the CuxTe back contact illustrates that the process used for forming the Cu2Te back contact failed to produce good fill factor (FF) and also introduced higher barrier height. The best device was observed for a back contact with a mixed Cu1.4Te and CuTe phases. Published by Elsevier B.V. Keywords: Cadmium telluride; Copper telluride; Back contact; Solar cells
1. Introduction The thin-film cadmium telluride/cadmium sulfide (CdTe/ CdS) solar cell has shown sustained potential to become an economical and efficient photovoltaic (PV) technology. Formation of the ohmic contact on the CdTe thin absorber layer is well known as a critical technical issue because of CdTe's high work
☆ This work has been authored by an employee or employees of the Midwest Research Institute under Contract No. DE-AC36-99GO10337 with the U.S. Department of Energy. The United States Government retains and the publisher, by accepting the article for publication, acknowledges that the United States Government retains a non-exclusive, paid-up, irrevocable, worldwide license to publish or reproduce the published form of this work, or allow others to do so, for United States Government purposes. ⁎ Corresponding author. Tel.: +1 303 384 6547; fax: +1 303 384 7600. E-mail address: [email protected] (J. Zhou).
0040-6090/$ - see front matter. Published by Elsevier B.V. doi:10.1016/j.tsf.2007.03.032
function and the difficulty of obtaining high p doping in the back region. The back contact for CdTe has been prepared by various techniques. In general, prior to forming the contact, the back surface of CdTe is treated to produce a p+ type Te-rich layer, either by the solution method (wet) [1] or the dry method (e.g., evaporation or sputter) [2]. Then, the copper source is applied, followed by the secondary contact. The copper can be deposited directly by a method such as evaporation, or supplied from a Cucontaining back contact, such as C:CuxTe paste. Copper has been found to be a necessary element and is used for most highefficiency cells. It plays two important, though opposite, roles in device performance. The advantages are that it produces a back contact with low resistivity by forming highly degenerated p+ copper telluride (CuxTe) compounds, and it dopes the bulk CdTe, thus achieving higher carrier concentration. However, copper is a fast diffuser in CdTe, which leads to unstable back contacts. Excess Cu can form shunting paths in the CdTe device, resulting
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in performance degradation. Cu segregation near the CdS/CdTe junction has also been reported [3]. Many processing parameters have been studied to investigate the effects of copper, including Cu thickness, Cu deposition rate [4], and annealing temperature [5]. It is widely reported that the formation of Cu2Te is correlated with good device performance [6]. The Cu–Te system is the most complex among the copper– chalcogen systems, as shown in the Cu–Te phase diagram [7]. In the literature, different processing techniques required different applications of Cu, e.g., pure Cu or carbon dag mixed with CuxTe and HgTe. Is there any common rule to determine the amount of Cu that should be used? The electrical properties of CuxTe compounds span a wide range. The resistivity of CuxTe compounds can vary from ∼ 101 to 10− 4 Ω cm. Is the CuxTe compound with the lowest resistivity the best one for device performance? In this paper, we form the primary contact of CuxTe by evaporating a Cu layer on NP solution etched CdTe. The study is divided into two parts. The first part involves partially completed devices without a secondary back contact. The aim is to study CuxTe material properties using a process similar to that used for making CdTe/CdS devices. The second part focuses on the effects of the primary CuxTe contact on device performance. Device performance was broadly correlated with the CuxTe structure formed at the back of the CdTe absorber. 2. Experimental details The procedures for making the Corning 7059 glass/CTO/ ZTO/CdS/CdTe device have been described elsewhere [8]. In this paper, sputtered oxygenated nanocrystalline cadmium sulfide [9] replaced chemical-bath-deposited (CBD) CdS as the window layer. The major differences are at the back contact. After CdCl2 vapor treatment, the surface of the CdTe was treated with NP solution to form a Te-rich layer with a thickness of about 150 nm. Although wet processing can penetrate along grain boundaries, it does not produce a new interface (the dry Te evaporation process introduces a new interface between Te and CdTe). A Tamescal BJD-1800 E-beam evaporator was then used to deposit the Cu layer with various thicknesses on the NPetched CdTe surface. The Cu film thickness was monitored by an Inficon crystal monitor and calibrated by a Dektak depth profiler. Some of these samples were saved for the CuxTe material study. The others were processed continuously to complete the devices. Pure carbon paste was then applied to the device samples as the secondary contact. The set of samples for material study were annealed at three different temperatures of 100, 250, and 400 °C for 30 min in an He environment. This experiment located the optimized annealing temperature for device processing. A silver layer was brushed onto the carbon-paste surface to complete the secondary contact, which was then heated at 100 °C for 1 h. The solar cell was defined by blade-removal of the CdTe to beyond the silver contact. Finally, indium was applied on the exposed Cd2SnO4 front contact. The device results of high-efficiency transparent 7059 glass/ CTO/ZTO/nano-CdS:O/CdTe/CuxTe/ITO/Ni–Al grid cells [10] will be mentioned in Section 3.4. to compare the results with
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those of the devices fabricated as aforementioned. The transparent device also uses CuxTe as the back contact. But the layer of CuxTe in this application needs to be ultra-thin so bromine– methanol method (BM) was used to etch the CdTe before the evaporation of a Cu layer. The ultra-thin CuxTe layer was prepared by a three-step process: 1). Prepare a thin Te layer by BM etching, (2). Deposit a thin Cu layer, and 3). Post-heat-treat at 250 °C to form a thin CuxTe layer. The other procedures for making the transparent cells can be found in Ref. [10]. X-ray diffraction (XRD) measurements were made with a Scintag XGEN-4000 system. A Scintag PTS diffractometer with a Cu Kα tube operated at 45 kV and 100 mA was used to study the CuxTe structure. Wide-angle 2θ scan from 20 to 60° taken at a 0.03° step was used to identify the phases present. Sheet resistance was measured using the Keithley four-point probe. Dark and light current density–voltage (J–V ) measurements were carried out to analyze device performance. 3. Results and discussion 3.1. Effect of post-annealing on the structure of CuxTe compounds The structures of copper telluride compounds vary before and after post-annealing. Post-annealing temperature was found to impact the phase change of CuxTe compounds. A series of diffraction patterns for samples before post-annealing is illustrated in Fig. 1. All samples were prepared by NP etching, and different thicknesses of Cu film were evaporated onto the etched CdTe surface at 0, 10, 30, 60, and 130 nm. All the peaks noted by “A” come from polycrystalline CdTe, whereas “B” peaks come from the Te-rich layer. Cu2Te peaks noted by “C” can be observed when more than 30 nm of Cu was applied (JCPDS file 49–1411) [11]. The appearance of more peaks related to Cu2Te compound when more Cu was applied verifies the assignment of the 24.7° peak to the (006) reflection of Cu2Te. Due to the broadness of the peaks noted by “C” and consistent Cu2−xTe XRD patterns with Cu2Te, the existence of
Fig. 1. XRD patterns for NP-etched CdTe samples using different amounts of Cu before annealing.
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phase Cu2−xTe could not be left out of consideration. Peak intensity indicates that Cu2Te or a mixed Cu2Te and Cu2−xTe is the dominant CuxTe phase for samples using Cu from 30 to 130 nm before post-annealing. Annealing was conducted for one set of samples with 50 nm of Cu applied. The samples were annealed for 30 min in He under temperatures of 100, 250, and 400 °C. Fig. 2 includes XRD patterns for one sample without post-annealing (the bottom curve) and three samples annealed at the above three temperatures. Annealing at 100 °C had no effect on CuxTe phase transformation. Cu2Te (noted by “B”) is the dominant copper telluride compound phase for the as-deposited sample and the sample annealed at 100 °C. The dominant phase changes to Cu1.4Te (noted by “A”) for the sample annealed at 250 °C (JCPDS file 85-0606). Two preferred orientations of Cu1.4Te correspond to the (101) plane at 26.7° and the (112) plane at 43.7°. Fig. 3 also shows that when annealed at high temperature, such as 400 °C, multiple copper telluride phases appear and previous single peaks split into multiple ones. Most of these peaks could be attributed to more complicated CuxTe phases with different x values, such as Cu1.8Te (E) (JCPDS file 451285) or Cu4Te3 (H) (JCPDS file 42-1253). Some peak values for CuxTe compounds are very close or overlapped, so that it is not easy to distinguish them. Annealing was also conducted to other samples with different copper thicknesses, which will be described in Section 3.2. When 100 nm and 200 nm of Cu were applied, the dominant phase became Cu2Te after annealing at a temperature of 250 °C. It is found that the stoichiometry of the dominant phase of copper telluride compound for samples annealed at 250 °C from XRD is as same as the calculated possible stoichiometry based on the Te and Cu layers being used. Annealing at 250 °C is sufficient for the complete Cu/Te reaction. In Section 3.3, the electrical properties of CuxTe phases will be discussed. It can be seen that the resistance increased with annealing temperature from 250 °C to 400 °C, which is especially significant when a small amount of Cu was applied. It might be explained that annealing at 400 °C could induce more Cu diffusion to the front
Fig. 3. XRD patterns for annealed CdTe samples with back contacts at different Cu/Te ratios.
of the device. Therefore we conclude that annealing at 250 °C best suits our experiments. Our devices were processed at one annealing temperature of 250 °C, whose results will be discussed in Section 3.4. Without a post-anneal or anneal at 100 °C, only Cu2Te is the dominant copper telluride compound phase in our experimental range. This might be due to the surface phenomenon. The evaporated copper accumulated on the surface, which caused a high Cu/Te ratio. Annealing at temperatures higher than 250 °C causes Cu redistribution in the Te layer. Therefore, Cu and Te are better mixed so that they can react according to their elemental ratio. It was reported that Cu diffusion occurs during the Cu evaporation process, rather than only during subsequent heat treatment [4]. Therefore, whatever dominant phase of CuxTe formed at the back contact could be determined by the Cu/Te ratio applied and the degree of Cu diffusion to the front region of the CdTe/CdS cell. 3.2. Structure of CuxTe compounds
Fig. 2. XRD patterns for treated CdTe samples with 50 nm of Cu and different anneal temperatures.
Seven CdS/CdTe samples were prepared and etched by NP solution. A thin copper layer was evaporated onto the treated CdTe surface at thicknesses of 0, 10, 50, 95, 110, 130, and 200 nm. All samples were annealed at 250 °C for 30 min in He. The XRD results are shown in Fig. 3, and the Cu thickness is in the increasing direction from the bottom to the top curve. For the sample prepared without intentionally adding copper, only peaks corresponding to CdTe (noted as “E”) and Te (noted as “A”) are easily observed. After 10 nm of Cu was deposited and post-annealed at 250 °C for 30 min, two more peaks appeared. The peak at 2θ of 26.7° corresponds to the (101) plane of Cu1.4Te (C), whereas the small peak at 25.6° corresponds to the (002) plane of CuTe (B) compound (JCPDS file 22-0252). This device was continuously annealed at 250 °C for 3 more hours. More peaks related to CuTe compound started to appear. So in this case, we assign the peak at 25.6° to the (002) reflection of CuTe. With a 50 nm of copper, the phase of CuTe disappears
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and the peaks for Cu1.4Te become stronger. The additional peaks that correspond to the phase Cu1.4Te are indicated in Fig. 1 as for the sample of 95 nm of copper. The intensity of peaks (101) for Cu1.4Te reaches a maximum at 95 nm of copper. The peak for the Te (101) plane overlaps with the peak for the Cu2Te (D) (106) plane at 2θ of 27.6°. Because the intensity of the peak at 27.6° decreases with adding more copper to a thickness of 95 nm, we assume that the peak at 27.6° belongs to Te in this case. With more copper (≥ 110 nm) deposited, phases corresponding to Cu2Te begin to appear, which become strongest at 130 nm of copper. The peak assignment corresponding to Cu2Te is arguable. The spectrum patterns for Cu2Te and Cu2−xTe are very similar for the peaks labeled as Cu2Te in Fig. 3. However, the peak positions of the (006), [220], and (306) plane for Cu2Te (JCPDS file 49-1411) are slightly higher than the (200), (119), and (209) positions of Cu2−xTe (JCPDS file 10−0421). For the case of 110 nm of Cu, the peak at 24.7° tends to correspond to Cu2Te (006) reflection with the XRD step increase at 0.03°. The other two peaks labeled “D” are very broad. But they have higher intensity at positions close to the [220] and (306) peaks of Cu2Te. So we assigned the peaks labeled “D” corresponding to Cu2Te. It was also observed that the peak position at 24.7° for the application of 110 nm of Cu shifted to 2θ of 24.6° for 130 nm of Cu. The possibility of mixed Cu2Te and Cu2−xTe phases exists when a high amount of Cu was used. When too much copper was applied, such as the 200 nm case, the structure stoichiometry became complicated. Some Cu2−xTe compounds were detected, e.g., Cu0.656Te0.344 (H). Peaks became broader and resolved into multi-peaks. We suspect that some peaks were related to copper or copper oxides. NP etching produced a Te-rich layer at a similar thickness for all of these samples, which was about 150 nm. If we assume that this 150-nm Te is uniform and has the same density as the Te crystal, then we can approximate that the Cu thickness needed to form the Cu2Te compound is about 110 nm. The Fig. 3 shows that Cu2Te has been formed with 110 nm of Cu, which means that our measurements are quantitatively reasonable. These results are repeatable and can be shown in our other series of experiments. Different CuxTe phases can be obtained when applying different amounts of Cu, as illustrated in Fig. 3. In other words, the XRD results support the conclusion that the CuxTe phases can be controlled by varying the Cu/Te ratio. Chou's group also reported the effects of Cu on CdTe/CdS heterojunction solar cells [4]. However, all cells were shorted after using 30 nm of Cu. Clearly our device structure with a buffer layer ZTO gives our devices more tolerance to the usage of Cu. The buffer layer can effectively decrease the shunting possibilities caused by the contact of TCO with the front-diffused Cu. Besides, they used metallorganic chemical vapor deposition (MOCVD) technique to deposit ∼2.6 μm thick of CdTe thin-film at a temperature of 400 °C. Their CdCl2 solution treatment temperature at 400 °C was lower than ours. These processing differences can result in different chemical and physical properties of CdTe thin film, such as grain size and defect densities, which definitely can cause the different diffusion effect of Cu in CdTe. Importantly, before their metallization, no any surface etching treatment was performed to the
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CdTe layer. Even though they claimed that high Au/Cu deposition rate on the contact enhanced the Cd/Te ratio, it is hard to say their devices formed a CuxTe layer at the back contact. This observation may indicate that the formation of CuxTe back contact is a good way to retain Cu at the back side of a CdTe/ CdS device. 3.3. Electrical properties of CuxTe compounds As we have discussed concerning CuxTe compounds formed during CdTe cell processing, it is worthwhile to know their electrical properties. In our samples, the CuxTe compounds are formed on the surface region of CdTe. It is well known that the carrier concentration of a p-type CdTe absorber is in the range from 1014 to 1015 cm− 3, whereas CuxTe is a p+ highly degenerate material. We then assumed that the CuxTe layer is the conducting path when a four-point probe is used to measure the sheet resistance. The sheet resistance measured by the fourpoint probe is listed in Table 1. Each example has its own dominant CuxTe phase. The sheet resistance of the Cu1.4Tedominated layer is 4 or 5 orders of magnitude higher than that of the Cu2Te-dominated layer. These measurements are consistent with the literature-reported resistivity value for Cu2Te1.025 [12]. We have discussed the validity of the peak assignments to Cu2Te or Cu2−xTe in the previous two sections. From our electrical property measurements, we can see that the electrical properties for Cu2Te or mixed Cu2Te and Cu2−xTe dominated layers are very similar. So in this paper, we use the Cu2Tedominated term to represent the layer having this complicated structure. Table 1 shows that sheet resistance is similar for the Cu2Te-dominated layer formed at different annealing temperatures. However, the Cu1.4Te-dominated layer has a higher resistance for 400 °C post-annealing compared with the resistance at 250 °C post-annealing. It might be because more Cu could diffuse into the front region along grain boundaries and through CdTe defects at higher post-annealing conditions. The CuTe can be detected for samples annealed at 400 °C, as shown in Fig. 2, which suggests that the Cu/Te ratio drops during annealing. Our long-term annealing experiments also show that CuTe could become the dominant phase, replacing Cu1.4Te after 92 h of annealing at 250 °C for samples using 50 nm of Cu. The Cu diffusion and CuxTe phase transformation have been previously reported by McCandless at the Institute of Energy Conversion [13]. A transformation of the Cu2Te phase to CuTe has been
Table 1 Sheet resistivity for NP-etched samples with different Cu/Te ratios under different post-annealing treatments Cu thickness (nm)
Post-annealing temperature (°C)
Dominant CuxTe
Sheet resistance (Ω/sq.)
50 100 200 50 100 “Dry” sample
250 250 250 400 400 250
Cu1.4Te Cu2Te Cu2Te Cu1.4Te Cu2Te Cu2Te
7.1 × 105 21.0 18.2 3.3 × 106 22.7 17.9
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Fig. 5. Dark and light J–V curves for transparent CdTe/CdS cells.
Fig. 4. Dark and light J–V curves for devices applying different thicknesses of Cu.
observed and has been suggested as a possible reason for back contact degradation of CdTe/CdS devices. To confirm our electrical property measurement, the “dry” method was used to fabricate Cu2Te compounds. Te and Cu layers were deposited sequentially from effusion cells on glass. The system background pressure was 2 × 10− 9 Torr. Substrate temperature was kept below 80 °C during deposition. Postannealing was followed at 250 °C in ultra-high vacuum for 30 min. The sample (referred to as “dry” sample in Table 1) is detected by XRD to be Cu2Te-dominated. Its sheet resistance is measured to be 17.9 Ω/sq., which is of the same magnitude as the Cu2Te resistance formed by our “wet” process. 3.4. Effect of CuxTe contact on PV properties of CdS/CdTe cell The tunneling effect is reported as the transport mechanism for the back contact of the CdTe/CdS cell [14]. If Cu front-diffusion
is not taken into consideration, better electrical material should produce a better ohmic contact. Therefore, from theory, the back contact material with better electrical property can achieve better device performance. However, this was not shown in our experiments. The Cu2Te compound possesses the best electrical properties among the CuxTe compounds. However, the process of forming a Cu2Te-dominated layer induces some detrimental effects on device performance. Fig. 4 summarizes the dark and light J–V curves for samples using different amounts of copper. All of these devices were annealed in He at 250 °C for 30 min. It has been discussed above that applying different amounts of Cu formed different CuxTedominated phases, which should also apply to our device samples. The analyzed cell parameters are listed in Table 2. In it, ϕb represents the barrier height, Voc the open-circuit current, Jsc the short-circuit current, FF the fill factor, Rs the series resistance, Rsh the shunting resistance, A the ideality factor, and J0 the saturated diode current. It shows that the best of the three parameters of Voc, FF, and Efficiency (Eff.) is for the sample using 10 nm of Cu. Its shunting resistance is at the highest level among the samples. Both CuTe and Cu1.4Te phases can be detected for this sample, but no Cu2Te compound is found. It might be surmised that the process for forming a Cu2Te back contact is not conducive to device performance. The formation of Cu2Te using a large amount of Cu failed to produce good Rs, opposite to what we expected. The large Cu gradient can also provide more Cu diffused into the front region along the grain boundaries, which should be the major reason for the increased shunting at higher Cu devices. The shunting degrades the device performance by decreasing FF and Voc.
Table 2 Device parameters for CdTe/CdS cells with different amounts of Cu Thickness of Cu (nm)
Voc (V)
Jsc (mA/cm2)
FF (%)
Eff. (%)
Rs (Ω cm2)
Rsh (Ω cm2)
A
J0 (mA/cm2)
ϕb (eV)
0 10 60 95 110 130
0.733 0.797 0.783 0.767 0.761 0.725
23.0 22.7 23.2 22.7 22.2 18.8
59.8 71.3 68.0 67.2 65.5 53.2
10.1 12.9 12.1 11.7 11.1 7.3
0.83 1.09 1.76 0.27 1.06 3.47
749.3 1875.2 878.6 696.3 612.2 159.5
3.6 2.1 2.2 2.6 2.6 2.6
9.4 × 10− 3 1.2 × 10− 5 2.9 × 10− 5 3.5 × 10− 4 2.8 × 10− 4 3.6 × 10− 4
0.53 0.48 0.50 0.51 0.52 0.54
J. Zhou et al. / Thin Solid Films 515 (2007) 7364–7369 Table 3 Device parameters for transparent CdTe/CdS cells with different Cu thicknesses Thickness of Cu (nm)
Voc (V)
Jsc (mA/cm2)
FF (%)
Eff. (%)
Rs (Ω cm2)
Rsh (Ω cm2)
0.8 1.7
0.810 0.710
21.4 18.0
66.4 29.8
11.6 3.8
3.30 25.60
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Another important phenomenon is the barrier height (rollover) in the J–V curves, which varies with the Cu thickness applied. Without intentionally adding Cu, the roll-over is explained by the Schottky back barrier for blocking the carrier flow, which is typically around 350 meV. After adding a small amount of Cu, such as 10 nm, the roll-overs for both dark and light curves are only present at high forward voltage, which is consistent with the literature report [2]. However, the good diode characteristics did not persist to the devices using larger amounts of Cu. High-Cu devices show the trends of lowered shunting resistance and fill factor, and increased series resistance. We used a model of a reverse diode in series with the main junction [15] to analyze our J–V data. The results are shown in Table 2. The barrier heights for all devices are higher than 350 meV, which might be one reason for the lower Voc of these devices. The barrier height reaches the lowest for the device with 10 nm of Cu, but increases with the amount of Cu used in the back contact. It is apparent that excess Cu degrades device performance, not only through increasing the carrier recombination due to excess Cu diffusing to the front region, but also, through its effect on the barrier height. The phenomenon that large Cu/Te ratios cause severe rollover in the J–V curves was also observed in our transparent CdTe/CdS devices, which were developed for the thin-film tandem cell project [10]. Bromine–methanol etchant was used to etch the CdTe, and it left a Te-rich layer of ∼ 2 nm thick [2]. Two thicknesses (0.8 and 1.7 nm) of Cu layers were then evaporated. The J–V curves and device parameters are summarized in Fig. 5 and Table 3, respectively. The J–V curve in Fig. 5 for 1.7 nm of Cu exhibits severe “roll-over.” Table 3 shows the larger Rs of 1.7 nm of Cu compared with Rs for the device using 0.8 nm of Cu. It could be said that the 1.7 nm of Cu apparently provides extra Cu for the Te layer formed by bromine–methanol etching to form Cu2Te. Device performances for both our normal and transparent devices demonstrate that control of the Cu/Te ratio is a critical parameter in device manufacturing when CuxTe was used as a back contact. More research is under way to understand the detrimental effect of a Cu2Te-dominated back contact on device performance. 4. Conclusions The procedures of CdTe surface solution etching and evaporating a Cu layer onto it can readily form CuxTe phases. Three
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major CuxTe phases: CuTe, Cu1.4Te, and Cu2Te, could be detected by XRD measurements. The CuxTe phases are controlled mainly by the Cu/Te ratio. Post-annealing temperature is one important parameter to control the Cu front diffusion. After postannealing in He at 250 °C for 30 min, a mixed CuTe and Cu1.4Tedominated CuxTe phase achieves the best device performance. The process for forming Cu2Te-dominated is not beneficial to CdTe device performance. By controlling the Cu/Te ratio, the proper back contact can be formed, and the damage caused by excessive Cu diffusion to the front region and high barrier height formed at high Cu/Te ratio can be limited. Acknowledgements This research was performed at NREL and was supported by the U.S. Department of Energy under Contract No. DEAC36GO10337. References [1] T.L. Chu, S.S. Chu, C. Ferekides, C.Q. Wu, J. Britt, C. Wang, J. Appl. Phys. 70 (1991) 7608. [2] S.S. Hegedus, B.E. McCandless, Sol. Energy Mater. Sol. Cells 88 (2005) 75. [3] D. Grecu, A.D. Compann, Appl. Phys. Lett. 75 (1999) 361. [4] H.C. Chou, A. Rohatgi, E.W. Thomas, S. Kamra, A.K. Bhat, J. Electrochem. Soc. 142 (1995) 254. [5] H. Uda, S. Ikegami, H. Sonomura, Sol. Energy Mater. Sol. Cells 50 (1998) 141. [6] B.E. McCandless, S.S. Hegedus, R.W. Birkmire, D. Cunningham, Thin Solid Films 431–432 (2003) 249. [7] A.S. Pashinkin, V.A. Fedorov, Inorg. Mater. 39 (2003) 647. [8] X. Wu, J.C. Keane, R.G. Dhere, C. Dehart, D.S. Albin, A. Duda, T.A. Gessert, S. Asher, D.H. Levi, P. Sheldon, 17th European Photovoltaic Solar Energy Conference, Munich, Germany, October 22–26, 2001, p. 995. [9] X. Wu, Y. Yan, R.G. Dhere, Y. Zhang, J. Zhou, C. Perkins, B. To, Phys. Status Solidi, C 1 (2004) 1062. [10] X. Wu, J. Zhou, A. Duda, J.C. Keane, T.A. Gessert, Y. Yan, R. Noufi, Mater. Res. Soc. Symp. Proc. 865 (2005) 347. [11] X-ray diffraction (XRD) database, PCPDFWIN, Version 2.2, JCPDSICDD, 2001. [12] O.P. Astakhov, L.I. Berger, K. Dovletov, K. Tashliev, Izv. Akad. Nauk Turkm. SSR, Ser. Biol. Nauk 4 (1973) 108 (in Russian). [13] S.S. Hegedus, B.E. McCandless, R.W. Birkmire, 28th IEEE PVSC Proc., 2000, p. 535. B.E. McCandless, K.D. Dobson, Solar Energy 77 (2004) 839. [14] F. Debbagh, E.L. Ameziane, M. Azizan, M. Brunel, T.T.A. Nguyen, Mater. Sci. Eng., B, Solid-State Mater. Adv. Technol. 38 (1996) 223. [15] S.H. Demtsu, J.R. Sites, Thin Solid Films 510 (2006) 320.
The formation of different phases of CuxTe and their effects on CdTe/CdS solar cells ☆ J. Zhou a,⁎, X. Wu a , A. Duda a , G. Teeter a , S.H. Demtsu b a
b
National Renewable Energy Laboratory (NREL), Golden, CO 80401, USA Department of Physics, Colorado State University, Fort Collins, CO 80523, USA
Received 12 May 2006; received in revised form 12 February 2007; accepted 12 March 2007 Available online 20 March 2007
Abstract Material studies and device applications of CuxTe in an NREL-developed CdTe solar cell structured as glass/Cd2SnO4/ZnSnOx/CdS/CdTe are presented. The CuxTe primary back contact was formed by evaporating a Cu layer with various thicknesses at room temperature on HNO3/H3PO4 (NP) solution etched CdTe layer. A post-annealing was then followed. The structural evolution and electrical properties of CuxTe were investigated. Cu/Te ratio and post-annealing temperature are two processing parameters in this study. The CuxTe phases are mainly controlled by the Cu/Te ratio. After a post-annealing at a low temperature, such as 100 °C, no CuxTe phase transformation from its as-deposited phase was observed. A post-annealing treatment at a higher temperature, such as 250 °C, can reveal the stoichiometric CuxTe phases based on the Cu/Te ratio used in the devices. But a post-annealing at a further higher temperature, such as 400 °C, resulted in a complicated CuxTe phase appearance. CuTe, Cu1.4Te, and Cu2Te are three major phases detected by X-ray diffraction (XRD) for different Cu thickness application annealed at 250 °C. Application of Cu thicker than 60 nm degrades open-circuit voltage (Voc) and shunting resistance (Rsh), but increases series resistance (Rs). The correlation between device performance and the CuxTe back contact illustrates that the process used for forming the Cu2Te back contact failed to produce good fill factor (FF) and also introduced higher barrier height. The best device was observed for a back contact with a mixed Cu1.4Te and CuTe phases. Published by Elsevier B.V. Keywords: Cadmium telluride; Copper telluride; Back contact; Solar cells
1. Introduction The thin-film cadmium telluride/cadmium sulfide (CdTe/ CdS) solar cell has shown sustained potential to become an economical and efficient photovoltaic (PV) technology. Formation of the ohmic contact on the CdTe thin absorber layer is well known as a critical technical issue because of CdTe's high work
☆ This work has been authored by an employee or employees of the Midwest Research Institute under Contract No. DE-AC36-99GO10337 with the U.S. Department of Energy. The United States Government retains and the publisher, by accepting the article for publication, acknowledges that the United States Government retains a non-exclusive, paid-up, irrevocable, worldwide license to publish or reproduce the published form of this work, or allow others to do so, for United States Government purposes. ⁎ Corresponding author. Tel.: +1 303 384 6547; fax: +1 303 384 7600. E-mail address: [email protected] (J. Zhou).
0040-6090/$ - see front matter. Published by Elsevier B.V. doi:10.1016/j.tsf.2007.03.032
function and the difficulty of obtaining high p doping in the back region. The back contact for CdTe has been prepared by various techniques. In general, prior to forming the contact, the back surface of CdTe is treated to produce a p+ type Te-rich layer, either by the solution method (wet) [1] or the dry method (e.g., evaporation or sputter) [2]. Then, the copper source is applied, followed by the secondary contact. The copper can be deposited directly by a method such as evaporation, or supplied from a Cucontaining back contact, such as C:CuxTe paste. Copper has been found to be a necessary element and is used for most highefficiency cells. It plays two important, though opposite, roles in device performance. The advantages are that it produces a back contact with low resistivity by forming highly degenerated p+ copper telluride (CuxTe) compounds, and it dopes the bulk CdTe, thus achieving higher carrier concentration. However, copper is a fast diffuser in CdTe, which leads to unstable back contacts. Excess Cu can form shunting paths in the CdTe device, resulting
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in performance degradation. Cu segregation near the CdS/CdTe junction has also been reported [3]. Many processing parameters have been studied to investigate the effects of copper, including Cu thickness, Cu deposition rate [4], and annealing temperature [5]. It is widely reported that the formation of Cu2Te is correlated with good device performance [6]. The Cu–Te system is the most complex among the copper– chalcogen systems, as shown in the Cu–Te phase diagram [7]. In the literature, different processing techniques required different applications of Cu, e.g., pure Cu or carbon dag mixed with CuxTe and HgTe. Is there any common rule to determine the amount of Cu that should be used? The electrical properties of CuxTe compounds span a wide range. The resistivity of CuxTe compounds can vary from ∼ 101 to 10− 4 Ω cm. Is the CuxTe compound with the lowest resistivity the best one for device performance? In this paper, we form the primary contact of CuxTe by evaporating a Cu layer on NP solution etched CdTe. The study is divided into two parts. The first part involves partially completed devices without a secondary back contact. The aim is to study CuxTe material properties using a process similar to that used for making CdTe/CdS devices. The second part focuses on the effects of the primary CuxTe contact on device performance. Device performance was broadly correlated with the CuxTe structure formed at the back of the CdTe absorber. 2. Experimental details The procedures for making the Corning 7059 glass/CTO/ ZTO/CdS/CdTe device have been described elsewhere [8]. In this paper, sputtered oxygenated nanocrystalline cadmium sulfide [9] replaced chemical-bath-deposited (CBD) CdS as the window layer. The major differences are at the back contact. After CdCl2 vapor treatment, the surface of the CdTe was treated with NP solution to form a Te-rich layer with a thickness of about 150 nm. Although wet processing can penetrate along grain boundaries, it does not produce a new interface (the dry Te evaporation process introduces a new interface between Te and CdTe). A Tamescal BJD-1800 E-beam evaporator was then used to deposit the Cu layer with various thicknesses on the NPetched CdTe surface. The Cu film thickness was monitored by an Inficon crystal monitor and calibrated by a Dektak depth profiler. Some of these samples were saved for the CuxTe material study. The others were processed continuously to complete the devices. Pure carbon paste was then applied to the device samples as the secondary contact. The set of samples for material study were annealed at three different temperatures of 100, 250, and 400 °C for 30 min in an He environment. This experiment located the optimized annealing temperature for device processing. A silver layer was brushed onto the carbon-paste surface to complete the secondary contact, which was then heated at 100 °C for 1 h. The solar cell was defined by blade-removal of the CdTe to beyond the silver contact. Finally, indium was applied on the exposed Cd2SnO4 front contact. The device results of high-efficiency transparent 7059 glass/ CTO/ZTO/nano-CdS:O/CdTe/CuxTe/ITO/Ni–Al grid cells [10] will be mentioned in Section 3.4. to compare the results with
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those of the devices fabricated as aforementioned. The transparent device also uses CuxTe as the back contact. But the layer of CuxTe in this application needs to be ultra-thin so bromine– methanol method (BM) was used to etch the CdTe before the evaporation of a Cu layer. The ultra-thin CuxTe layer was prepared by a three-step process: 1). Prepare a thin Te layer by BM etching, (2). Deposit a thin Cu layer, and 3). Post-heat-treat at 250 °C to form a thin CuxTe layer. The other procedures for making the transparent cells can be found in Ref. [10]. X-ray diffraction (XRD) measurements were made with a Scintag XGEN-4000 system. A Scintag PTS diffractometer with a Cu Kα tube operated at 45 kV and 100 mA was used to study the CuxTe structure. Wide-angle 2θ scan from 20 to 60° taken at a 0.03° step was used to identify the phases present. Sheet resistance was measured using the Keithley four-point probe. Dark and light current density–voltage (J–V ) measurements were carried out to analyze device performance. 3. Results and discussion 3.1. Effect of post-annealing on the structure of CuxTe compounds The structures of copper telluride compounds vary before and after post-annealing. Post-annealing temperature was found to impact the phase change of CuxTe compounds. A series of diffraction patterns for samples before post-annealing is illustrated in Fig. 1. All samples were prepared by NP etching, and different thicknesses of Cu film were evaporated onto the etched CdTe surface at 0, 10, 30, 60, and 130 nm. All the peaks noted by “A” come from polycrystalline CdTe, whereas “B” peaks come from the Te-rich layer. Cu2Te peaks noted by “C” can be observed when more than 30 nm of Cu was applied (JCPDS file 49–1411) [11]. The appearance of more peaks related to Cu2Te compound when more Cu was applied verifies the assignment of the 24.7° peak to the (006) reflection of Cu2Te. Due to the broadness of the peaks noted by “C” and consistent Cu2−xTe XRD patterns with Cu2Te, the existence of
Fig. 1. XRD patterns for NP-etched CdTe samples using different amounts of Cu before annealing.
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phase Cu2−xTe could not be left out of consideration. Peak intensity indicates that Cu2Te or a mixed Cu2Te and Cu2−xTe is the dominant CuxTe phase for samples using Cu from 30 to 130 nm before post-annealing. Annealing was conducted for one set of samples with 50 nm of Cu applied. The samples were annealed for 30 min in He under temperatures of 100, 250, and 400 °C. Fig. 2 includes XRD patterns for one sample without post-annealing (the bottom curve) and three samples annealed at the above three temperatures. Annealing at 100 °C had no effect on CuxTe phase transformation. Cu2Te (noted by “B”) is the dominant copper telluride compound phase for the as-deposited sample and the sample annealed at 100 °C. The dominant phase changes to Cu1.4Te (noted by “A”) for the sample annealed at 250 °C (JCPDS file 85-0606). Two preferred orientations of Cu1.4Te correspond to the (101) plane at 26.7° and the (112) plane at 43.7°. Fig. 3 also shows that when annealed at high temperature, such as 400 °C, multiple copper telluride phases appear and previous single peaks split into multiple ones. Most of these peaks could be attributed to more complicated CuxTe phases with different x values, such as Cu1.8Te (E) (JCPDS file 451285) or Cu4Te3 (H) (JCPDS file 42-1253). Some peak values for CuxTe compounds are very close or overlapped, so that it is not easy to distinguish them. Annealing was also conducted to other samples with different copper thicknesses, which will be described in Section 3.2. When 100 nm and 200 nm of Cu were applied, the dominant phase became Cu2Te after annealing at a temperature of 250 °C. It is found that the stoichiometry of the dominant phase of copper telluride compound for samples annealed at 250 °C from XRD is as same as the calculated possible stoichiometry based on the Te and Cu layers being used. Annealing at 250 °C is sufficient for the complete Cu/Te reaction. In Section 3.3, the electrical properties of CuxTe phases will be discussed. It can be seen that the resistance increased with annealing temperature from 250 °C to 400 °C, which is especially significant when a small amount of Cu was applied. It might be explained that annealing at 400 °C could induce more Cu diffusion to the front
Fig. 3. XRD patterns for annealed CdTe samples with back contacts at different Cu/Te ratios.
of the device. Therefore we conclude that annealing at 250 °C best suits our experiments. Our devices were processed at one annealing temperature of 250 °C, whose results will be discussed in Section 3.4. Without a post-anneal or anneal at 100 °C, only Cu2Te is the dominant copper telluride compound phase in our experimental range. This might be due to the surface phenomenon. The evaporated copper accumulated on the surface, which caused a high Cu/Te ratio. Annealing at temperatures higher than 250 °C causes Cu redistribution in the Te layer. Therefore, Cu and Te are better mixed so that they can react according to their elemental ratio. It was reported that Cu diffusion occurs during the Cu evaporation process, rather than only during subsequent heat treatment [4]. Therefore, whatever dominant phase of CuxTe formed at the back contact could be determined by the Cu/Te ratio applied and the degree of Cu diffusion to the front region of the CdTe/CdS cell. 3.2. Structure of CuxTe compounds
Fig. 2. XRD patterns for treated CdTe samples with 50 nm of Cu and different anneal temperatures.
Seven CdS/CdTe samples were prepared and etched by NP solution. A thin copper layer was evaporated onto the treated CdTe surface at thicknesses of 0, 10, 50, 95, 110, 130, and 200 nm. All samples were annealed at 250 °C for 30 min in He. The XRD results are shown in Fig. 3, and the Cu thickness is in the increasing direction from the bottom to the top curve. For the sample prepared without intentionally adding copper, only peaks corresponding to CdTe (noted as “E”) and Te (noted as “A”) are easily observed. After 10 nm of Cu was deposited and post-annealed at 250 °C for 30 min, two more peaks appeared. The peak at 2θ of 26.7° corresponds to the (101) plane of Cu1.4Te (C), whereas the small peak at 25.6° corresponds to the (002) plane of CuTe (B) compound (JCPDS file 22-0252). This device was continuously annealed at 250 °C for 3 more hours. More peaks related to CuTe compound started to appear. So in this case, we assign the peak at 25.6° to the (002) reflection of CuTe. With a 50 nm of copper, the phase of CuTe disappears
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and the peaks for Cu1.4Te become stronger. The additional peaks that correspond to the phase Cu1.4Te are indicated in Fig. 1 as for the sample of 95 nm of copper. The intensity of peaks (101) for Cu1.4Te reaches a maximum at 95 nm of copper. The peak for the Te (101) plane overlaps with the peak for the Cu2Te (D) (106) plane at 2θ of 27.6°. Because the intensity of the peak at 27.6° decreases with adding more copper to a thickness of 95 nm, we assume that the peak at 27.6° belongs to Te in this case. With more copper (≥ 110 nm) deposited, phases corresponding to Cu2Te begin to appear, which become strongest at 130 nm of copper. The peak assignment corresponding to Cu2Te is arguable. The spectrum patterns for Cu2Te and Cu2−xTe are very similar for the peaks labeled as Cu2Te in Fig. 3. However, the peak positions of the (006), [220], and (306) plane for Cu2Te (JCPDS file 49-1411) are slightly higher than the (200), (119), and (209) positions of Cu2−xTe (JCPDS file 10−0421). For the case of 110 nm of Cu, the peak at 24.7° tends to correspond to Cu2Te (006) reflection with the XRD step increase at 0.03°. The other two peaks labeled “D” are very broad. But they have higher intensity at positions close to the [220] and (306) peaks of Cu2Te. So we assigned the peaks labeled “D” corresponding to Cu2Te. It was also observed that the peak position at 24.7° for the application of 110 nm of Cu shifted to 2θ of 24.6° for 130 nm of Cu. The possibility of mixed Cu2Te and Cu2−xTe phases exists when a high amount of Cu was used. When too much copper was applied, such as the 200 nm case, the structure stoichiometry became complicated. Some Cu2−xTe compounds were detected, e.g., Cu0.656Te0.344 (H). Peaks became broader and resolved into multi-peaks. We suspect that some peaks were related to copper or copper oxides. NP etching produced a Te-rich layer at a similar thickness for all of these samples, which was about 150 nm. If we assume that this 150-nm Te is uniform and has the same density as the Te crystal, then we can approximate that the Cu thickness needed to form the Cu2Te compound is about 110 nm. The Fig. 3 shows that Cu2Te has been formed with 110 nm of Cu, which means that our measurements are quantitatively reasonable. These results are repeatable and can be shown in our other series of experiments. Different CuxTe phases can be obtained when applying different amounts of Cu, as illustrated in Fig. 3. In other words, the XRD results support the conclusion that the CuxTe phases can be controlled by varying the Cu/Te ratio. Chou's group also reported the effects of Cu on CdTe/CdS heterojunction solar cells [4]. However, all cells were shorted after using 30 nm of Cu. Clearly our device structure with a buffer layer ZTO gives our devices more tolerance to the usage of Cu. The buffer layer can effectively decrease the shunting possibilities caused by the contact of TCO with the front-diffused Cu. Besides, they used metallorganic chemical vapor deposition (MOCVD) technique to deposit ∼2.6 μm thick of CdTe thin-film at a temperature of 400 °C. Their CdCl2 solution treatment temperature at 400 °C was lower than ours. These processing differences can result in different chemical and physical properties of CdTe thin film, such as grain size and defect densities, which definitely can cause the different diffusion effect of Cu in CdTe. Importantly, before their metallization, no any surface etching treatment was performed to the
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CdTe layer. Even though they claimed that high Au/Cu deposition rate on the contact enhanced the Cd/Te ratio, it is hard to say their devices formed a CuxTe layer at the back contact. This observation may indicate that the formation of CuxTe back contact is a good way to retain Cu at the back side of a CdTe/ CdS device. 3.3. Electrical properties of CuxTe compounds As we have discussed concerning CuxTe compounds formed during CdTe cell processing, it is worthwhile to know their electrical properties. In our samples, the CuxTe compounds are formed on the surface region of CdTe. It is well known that the carrier concentration of a p-type CdTe absorber is in the range from 1014 to 1015 cm− 3, whereas CuxTe is a p+ highly degenerate material. We then assumed that the CuxTe layer is the conducting path when a four-point probe is used to measure the sheet resistance. The sheet resistance measured by the fourpoint probe is listed in Table 1. Each example has its own dominant CuxTe phase. The sheet resistance of the Cu1.4Tedominated layer is 4 or 5 orders of magnitude higher than that of the Cu2Te-dominated layer. These measurements are consistent with the literature-reported resistivity value for Cu2Te1.025 [12]. We have discussed the validity of the peak assignments to Cu2Te or Cu2−xTe in the previous two sections. From our electrical property measurements, we can see that the electrical properties for Cu2Te or mixed Cu2Te and Cu2−xTe dominated layers are very similar. So in this paper, we use the Cu2Tedominated term to represent the layer having this complicated structure. Table 1 shows that sheet resistance is similar for the Cu2Te-dominated layer formed at different annealing temperatures. However, the Cu1.4Te-dominated layer has a higher resistance for 400 °C post-annealing compared with the resistance at 250 °C post-annealing. It might be because more Cu could diffuse into the front region along grain boundaries and through CdTe defects at higher post-annealing conditions. The CuTe can be detected for samples annealed at 400 °C, as shown in Fig. 2, which suggests that the Cu/Te ratio drops during annealing. Our long-term annealing experiments also show that CuTe could become the dominant phase, replacing Cu1.4Te after 92 h of annealing at 250 °C for samples using 50 nm of Cu. The Cu diffusion and CuxTe phase transformation have been previously reported by McCandless at the Institute of Energy Conversion [13]. A transformation of the Cu2Te phase to CuTe has been
Table 1 Sheet resistivity for NP-etched samples with different Cu/Te ratios under different post-annealing treatments Cu thickness (nm)
Post-annealing temperature (°C)
Dominant CuxTe
Sheet resistance (Ω/sq.)
50 100 200 50 100 “Dry” sample
250 250 250 400 400 250
Cu1.4Te Cu2Te Cu2Te Cu1.4Te Cu2Te Cu2Te
7.1 × 105 21.0 18.2 3.3 × 106 22.7 17.9
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Fig. 5. Dark and light J–V curves for transparent CdTe/CdS cells.
Fig. 4. Dark and light J–V curves for devices applying different thicknesses of Cu.
observed and has been suggested as a possible reason for back contact degradation of CdTe/CdS devices. To confirm our electrical property measurement, the “dry” method was used to fabricate Cu2Te compounds. Te and Cu layers were deposited sequentially from effusion cells on glass. The system background pressure was 2 × 10− 9 Torr. Substrate temperature was kept below 80 °C during deposition. Postannealing was followed at 250 °C in ultra-high vacuum for 30 min. The sample (referred to as “dry” sample in Table 1) is detected by XRD to be Cu2Te-dominated. Its sheet resistance is measured to be 17.9 Ω/sq., which is of the same magnitude as the Cu2Te resistance formed by our “wet” process. 3.4. Effect of CuxTe contact on PV properties of CdS/CdTe cell The tunneling effect is reported as the transport mechanism for the back contact of the CdTe/CdS cell [14]. If Cu front-diffusion
is not taken into consideration, better electrical material should produce a better ohmic contact. Therefore, from theory, the back contact material with better electrical property can achieve better device performance. However, this was not shown in our experiments. The Cu2Te compound possesses the best electrical properties among the CuxTe compounds. However, the process of forming a Cu2Te-dominated layer induces some detrimental effects on device performance. Fig. 4 summarizes the dark and light J–V curves for samples using different amounts of copper. All of these devices were annealed in He at 250 °C for 30 min. It has been discussed above that applying different amounts of Cu formed different CuxTedominated phases, which should also apply to our device samples. The analyzed cell parameters are listed in Table 2. In it, ϕb represents the barrier height, Voc the open-circuit current, Jsc the short-circuit current, FF the fill factor, Rs the series resistance, Rsh the shunting resistance, A the ideality factor, and J0 the saturated diode current. It shows that the best of the three parameters of Voc, FF, and Efficiency (Eff.) is for the sample using 10 nm of Cu. Its shunting resistance is at the highest level among the samples. Both CuTe and Cu1.4Te phases can be detected for this sample, but no Cu2Te compound is found. It might be surmised that the process for forming a Cu2Te back contact is not conducive to device performance. The formation of Cu2Te using a large amount of Cu failed to produce good Rs, opposite to what we expected. The large Cu gradient can also provide more Cu diffused into the front region along the grain boundaries, which should be the major reason for the increased shunting at higher Cu devices. The shunting degrades the device performance by decreasing FF and Voc.
Table 2 Device parameters for CdTe/CdS cells with different amounts of Cu Thickness of Cu (nm)
Voc (V)
Jsc (mA/cm2)
FF (%)
Eff. (%)
Rs (Ω cm2)
Rsh (Ω cm2)
A
J0 (mA/cm2)
ϕb (eV)
0 10 60 95 110 130
0.733 0.797 0.783 0.767 0.761 0.725
23.0 22.7 23.2 22.7 22.2 18.8
59.8 71.3 68.0 67.2 65.5 53.2
10.1 12.9 12.1 11.7 11.1 7.3
0.83 1.09 1.76 0.27 1.06 3.47
749.3 1875.2 878.6 696.3 612.2 159.5
3.6 2.1 2.2 2.6 2.6 2.6
9.4 × 10− 3 1.2 × 10− 5 2.9 × 10− 5 3.5 × 10− 4 2.8 × 10− 4 3.6 × 10− 4
0.53 0.48 0.50 0.51 0.52 0.54
J. Zhou et al. / Thin Solid Films 515 (2007) 7364–7369 Table 3 Device parameters for transparent CdTe/CdS cells with different Cu thicknesses Thickness of Cu (nm)
Voc (V)
Jsc (mA/cm2)
FF (%)
Eff. (%)
Rs (Ω cm2)
Rsh (Ω cm2)
0.8 1.7
0.810 0.710
21.4 18.0
66.4 29.8
11.6 3.8
3.30 25.60
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Another important phenomenon is the barrier height (rollover) in the J–V curves, which varies with the Cu thickness applied. Without intentionally adding Cu, the roll-over is explained by the Schottky back barrier for blocking the carrier flow, which is typically around 350 meV. After adding a small amount of Cu, such as 10 nm, the roll-overs for both dark and light curves are only present at high forward voltage, which is consistent with the literature report [2]. However, the good diode characteristics did not persist to the devices using larger amounts of Cu. High-Cu devices show the trends of lowered shunting resistance and fill factor, and increased series resistance. We used a model of a reverse diode in series with the main junction [15] to analyze our J–V data. The results are shown in Table 2. The barrier heights for all devices are higher than 350 meV, which might be one reason for the lower Voc of these devices. The barrier height reaches the lowest for the device with 10 nm of Cu, but increases with the amount of Cu used in the back contact. It is apparent that excess Cu degrades device performance, not only through increasing the carrier recombination due to excess Cu diffusing to the front region, but also, through its effect on the barrier height. The phenomenon that large Cu/Te ratios cause severe rollover in the J–V curves was also observed in our transparent CdTe/CdS devices, which were developed for the thin-film tandem cell project [10]. Bromine–methanol etchant was used to etch the CdTe, and it left a Te-rich layer of ∼ 2 nm thick [2]. Two thicknesses (0.8 and 1.7 nm) of Cu layers were then evaporated. The J–V curves and device parameters are summarized in Fig. 5 and Table 3, respectively. The J–V curve in Fig. 5 for 1.7 nm of Cu exhibits severe “roll-over.” Table 3 shows the larger Rs of 1.7 nm of Cu compared with Rs for the device using 0.8 nm of Cu. It could be said that the 1.7 nm of Cu apparently provides extra Cu for the Te layer formed by bromine–methanol etching to form Cu2Te. Device performances for both our normal and transparent devices demonstrate that control of the Cu/Te ratio is a critical parameter in device manufacturing when CuxTe was used as a back contact. More research is under way to understand the detrimental effect of a Cu2Te-dominated back contact on device performance. 4. Conclusions The procedures of CdTe surface solution etching and evaporating a Cu layer onto it can readily form CuxTe phases. Three
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major CuxTe phases: CuTe, Cu1.4Te, and Cu2Te, could be detected by XRD measurements. The CuxTe phases are controlled mainly by the Cu/Te ratio. Post-annealing temperature is one important parameter to control the Cu front diffusion. After postannealing in He at 250 °C for 30 min, a mixed CuTe and Cu1.4Tedominated CuxTe phase achieves the best device performance. The process for forming Cu2Te-dominated is not beneficial to CdTe device performance. By controlling the Cu/Te ratio, the proper back contact can be formed, and the damage caused by excessive Cu diffusion to the front region and high barrier height formed at high Cu/Te ratio can be limited. Acknowledgements This research was performed at NREL and was supported by the U.S. Department of Energy under Contract No. DEAC36GO10337. References [1] T.L. Chu, S.S. Chu, C. Ferekides, C.Q. Wu, J. Britt, C. Wang, J. Appl. Phys. 70 (1991) 7608. [2] S.S. Hegedus, B.E. McCandless, Sol. Energy Mater. Sol. Cells 88 (2005) 75. [3] D. Grecu, A.D. Compann, Appl. Phys. Lett. 75 (1999) 361. [4] H.C. Chou, A. Rohatgi, E.W. Thomas, S. Kamra, A.K. Bhat, J. Electrochem. Soc. 142 (1995) 254. [5] H. Uda, S. Ikegami, H. Sonomura, Sol. Energy Mater. Sol. Cells 50 (1998) 141. [6] B.E. McCandless, S.S. Hegedus, R.W. Birkmire, D. Cunningham, Thin Solid Films 431–432 (2003) 249. [7] A.S. Pashinkin, V.A. Fedorov, Inorg. Mater. 39 (2003) 647. [8] X. Wu, J.C. Keane, R.G. Dhere, C. Dehart, D.S. Albin, A. Duda, T.A. Gessert, S. Asher, D.H. Levi, P. Sheldon, 17th European Photovoltaic Solar Energy Conference, Munich, Germany, October 22–26, 2001, p. 995. [9] X. Wu, Y. Yan, R.G. Dhere, Y. Zhang, J. Zhou, C. Perkins, B. To, Phys. Status Solidi, C 1 (2004) 1062. [10] X. Wu, J. Zhou, A. Duda, J.C. Keane, T.A. Gessert, Y. Yan, R. Noufi, Mater. Res. Soc. Symp. Proc. 865 (2005) 347. [11] X-ray diffraction (XRD) database, PCPDFWIN, Version 2.2, JCPDSICDD, 2001. [12] O.P. Astakhov, L.I. Berger, K. Dovletov, K. Tashliev, Izv. Akad. Nauk Turkm. SSR, Ser. Biol. Nauk 4 (1973) 108 (in Russian). [13] S.S. Hegedus, B.E. McCandless, R.W. Birkmire, 28th IEEE PVSC Proc., 2000, p. 535. B.E. McCandless, K.D. Dobson, Solar Energy 77 (2004) 839. [14] F. Debbagh, E.L. Ameziane, M. Azizan, M. Brunel, T.T.A. Nguyen, Mater. Sci. Eng., B, Solid-State Mater. Adv. Technol. 38 (1996) 223. [15] S.H. Demtsu, J.R. Sites, Thin Solid Films 510 (2006) 320.