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progressive scan method to reduce the switching noise caused by data pulse in a plasma display
Displays 28 (2007) 105–111 www.elsevier.com/locate/displa
The interlaced/progressive scan method to reduce the switching noise caused by data pulse in a plasma display Yongduk Kim a, Sekwang Park b
b,*
a R&D Center, Orion PDP Co. Ltd., 257 Gongdan-dong, Gumi, Kyung-buk 703-030, Republic of Korea Department of Electrical Engineering, Kyungpook National University, 1370 Sankyuk-dong, Buk-gu, Daegu 702-701, Republic of Korea
Received 31 January 2007; accepted 23 April 2007 Available online 29 April 2007
Abstract In plasma display panels, this paper deals with a new scan driving method which can reduce power consumption and which can improve the reliance of driving circuits. The IPS (interlaced/progressive scan) method as a new driving method was proposed and its efficiency was proven by experiments. This method selects a used scan method from interlaced and progressive scan methods in each subfield, according to the input image pattern. From these experimental results, the IPS driving method used less power consumption than the conventional scan method at the special image pattern as a horizontal alternative ON/OFF line pattern. We obtained the maximum decreasing rate of 18.2% regarding power consumption at a special image pattern. In addition, this method improved circuits’ reliance and lowered the amount of heating loss, because this is the driving waveforms of the address electrodes decreased switching noise, which is the high induced overshoot voltage in scan and sustain electrodes or high impulse displacement current in address electrodes. Therefore, we can expect the lower power consumption and reduction of switching noise, which is the overshoot voltage or impulse displacement current, when the proposed IPS driving method is applied to a driving PDP. 2007 Elsevier B.V. All rights reserved. Keywords: Plasma display; Scan method; Switching noise; Power consumption; Reliability
1. Introduction Driving technology has grown in leaps and bounds. In particulars, the maximum peak luminance was above 1500 cd/m2, the dark room contrast ratio was above 10,000:1, and the power consumption was between 250 and 300 W in the case of the 42 in. XGA module [1,2]. Costs have rapidly decreased due to the influence on the development of the process technology such as the multiarray process and the simple and compact circuit design. A new image processing technology, which improves the expression of a low gray-scale level, dynamic false contour noise and image sticking, the low cost circuit design and the fabrication of panel have been applied for a driving PDP
*
Corresponding author. Tel.: +82 53 950 6600; fax: +82 53 950 5606. E-mail address: [email protected] (S. Park).
0141-9382/$ - see front matter 2007 Elsevier B.V. All rights reserved. doi:10.1016/j.displa.2007.04.002
[1]. These factors lead the popularization of PDP-TVs. In many type of technologies, factor such as high luminance efficiency, improved dynamic false contour, the removal of image sticking, high density, high reliance, driving circuit safety, and low power consumption, are in greater demand. In particular, low power consumption and driving circuit reliance are the most important factors regarding consumers’. In this paper, a new method is proposed to reduce power consumption. This method is not for energy recovery circuits, which control the displacement current that appears at the switching of sustain pulses, but it is intended to improve reliance by the stable driving of COF or TCP with data-ICs [3,4]. In special image patterns such as the horizontal alternative ON/OFF line pattern (even lines designated as ON and odd lines designated as OFF), the data voltages applied to the address electrodes can be changed between low (GND) and high (VD). The high displacement
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Y. Kim, S. Park / Displays 28 (2007) 105–111
current flows through the data-ICs and high switching noises are induced in the scan and sustain electrodes. The displacement current, which is generated by switching data voltage and flows through the data-ICs, causes the generation of data-IC heat and the reduction of panels’ lifetime. The induced noise pulses at the scan and sustain electrodes cause a reduction in panel’s lifetime and unwanted impulse over-currents. This naturally appears when a cell is discharged. Because this is cell structure like a capacitor, it can not be removed but can be reduced. In this paper, to reduce this phenomenon, the IPS (interlaced/progressive scan) method, which selects interlaced or progressive scan method according to the number of VD voltage switching for addressing, will be proposed and its efficiency will be proven by experiments.
1st sub-field Reset
2nd sub-field
Address
Sustain
Vramp Vsus
Y
X A
Vylevel
Vxr
VD Fig. 2. A driving waveform for AC-PDP.
2. Pre-experiments PDP has scan (Y), sustain (X), and address (A) electrodes, as shown in Fig. 1. The scan and sustain electrodes are on the front panel and are parallel to each other. The address electrodes are on the rear panel and are perpendicular to the scan and sustain electrodes. In order to display an image, a high voltage driving waveform which is needed to discharge cells is supplied to each electrode using the driving circuit of the high voltage. Fig. 2 shows one subfield of a driving waveform for high voltage. A driving waveform is composed of one frame, which is divided by several subfields. A driving waveform is normally separated by the reset, address and sustain periods. In a sustain period, the sustain pulses for discharge are applied to the scan and sustain electrodes. In an address period, address discharges are generated so as to select the ON-cells for the discharge of the selected cells in sustain period. Address discharges are controlled using wall charges which accumulate on the dielectric layers of each electrode. In a reset period, the unstable wall charges are made uniform by using the A1 A2
…
Am
Y1 Y2 Y3 X
…
Yn
Fig. 1. The electrode structure of panel.
weak discharge in the ramp-up and ramp-down for stable discharge in the address period. The address discharge, which decides the ON-cells or OFF-cells, occurs in address period, as mentioned above. This discharge occurs as the VD voltage is applied to address electrodes and the scan pulse is applied to the scan electrodes at the same time. The waveform of VD voltage is normally a square waveform and the voltage has to be a minimum of 50 V for the driving to be stable without misaddressing. At that time, the high data voltage is synchronized with the scan pulse and fast switching occurs between low and high voltage. If the VD voltages of the current scan line and the following scan line are the same, as shown in Fig. 3(a), the switching of the VD voltage will not occur. However, when the VD voltage is alternatively changed between high and low as the horizontal alternative ON/ OFF line pattern – this pattern is ON in odd scan lines and OFF in even scan lines, this represents the worst condition. In this case, all waveforms of VD voltage in each data line switch between low (GND) and high (VD) and the number of the switching equals the number of scan lines. This generates a high displacement current on the address electrode; moreover, it does the high induced voltage and current on the scan and sustain electrodes. The displacement current generated by the applied VD increases power consumption, generates heat for data-IC and scan-IC and it has a bad influence on devices because of a plurality of switching. If the he number of switching of VD voltage waveform increases, the switching noises shall increase. For example, in the full-white pattern as shown in Fig. 3(a), the VD voltage switches to high and to low only once, as described in Fig. 3(b) and (c). In case of the horizontal alternative ON/OFF line pattern, as shown in Fig. 4(a), however, this switching is repeated in every scan line in the address period, as shown in Fig. 4(b) and (c). This is reason that the data voltage is different in each scan line. As a result, many switching noises and high displacement current are generated. This is why power consumption increases.
Y. Kim, S. Park / Displays 28 (2007) 105–111
(a) Full-white pattern
107
(a) Horizontal alternative ON/OFF line pattern
(b) Selection of ON-cells
(b) Selection of ON-cells
A1
A1
A2
A2
···
···
Am
Am Y1 Y2 Y3
···
Y n-1 Y n
Y1 Y2 Y3
···
Y n-1 Y n
(c) Applied waveforms of address electrodes
(c) Applied waveforms of address electrodes Fig. 3. The data voltage waveforms at the full-white pattern.
Fig. 4. The data voltage waveforms at the horizontal alternative ON/OFF line pattern.
In the case of a full-white pattern, after the address period starts, the VD voltage waveforms are changed to high, this status is kept until the end of the last scan line. Then the voltage waveforms are changed to low. In that situation, the VD voltage is changed only twice in one subfield. On the other hand, when the horizontal alternative ON/ OFF line pattern is displayed, as shown in Fig. 4, the data voltage of the address electrode is changed to high at the odd scan lines and changed to low at the even scan lines. In this case, the number of data voltage switching equals that of the scan lines. Fig. 5 shows the measured voltage waveform of the scan electrode and the current waveform of the address electrode for two different display patterns. When the number of VD voltage waveform switching is small, induced switching noises do not occur in the address period, the current of the address electrode flows just at the
1st (A) and last (B) scan lines, as shown in Fig. 5(a), however, when a number of VD voltage switching occurs, Fig. 5(b) and (c) show many switching noises at the scan electrode which is generated in the address period of all subfields. In particular, we can see that the large current with the overshoot noise flows through all address electrodes. The induced switching voltage, at the scan electrode, is a result of the PDP cell structure. As cell structures are well known, there are scan, sustain and address electrodes. The relationship among these electrodes is briefly expressed as an equivalent circuit with three capacitors, as shown in Fig. 6(a) [5]. VcYA(t), the cell voltage between both ends of capacitor CYA, can be explained by the voltage between the scan and address electrodes, as expressed in Eq. (1).
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X
Y CXY
CYA
CAX
A (a) An equivalent circuit of a PDP cell
VDATA Discharge current IA
Displacement current Induced voltage VY
(b) Induced voltage and current by VD switching Fig. 6. The equivalent circuit of a PDP cell and the induced voltage and current waveforms [5].
The amplitude of the induced voltage waveform is related to the number of switching which are synchronized among all address electrodes. Its maximum value can be VD voltage which is applied to the address electrodes. The induced switching noise influences the drive-IC operation and it must be reduced lifetime and reliance of driveIC because of the generation of heat and induced impulse over-currents. Fig. 5. An induced voltage waveform in a scan electrode and a displacement current waveform in an address electrode according to the displayed pattern.
V cYA ðtÞ ¼ V cY ðtÞ V cA ðtÞ
ð1Þ
When the VcY(t) voltage of the scan electrode is continuously present in the address period, and, if the applied pulses of the many address electrodes change between low and high, the high voltage at the scan electrode will be momentarily induced. It can be easily explained by Eq. (1), because VcYA(t) has continuity voltage as a peculiar characteristic of the capacitor device, this voltage cannot be directly changed according to the rapid variation of the applied data voltage. The displacement current will flow until the VcYA(t) varies as VcA(t) and the discharge time delay will appears. As this phenomenon occurs unconditionally if the VcA(t) voltage changes, to reduce this switching noise, the number of the logic transitions must be reduced.
3. Proposed driving method (IPS driving method) Regarding scan method, there are the progressive and interlaced scan methods. The progressive method scans the scan-line order. The interlaced method, however, scans even lines after odd lines. When the progressive scan method is used, the data voltage switching happens only twice in the address period for a full-white pattern, but the data voltage switching is repeated between VD and GND whenever each line is scanned for a horizontal alternative ON/OFF line pattern. This switching generates overshoot noise in the address period, as mentioned above. If the interlaced scan method is applied to the horizontal alternative ON/OFF line pattern, the input data pulse for the VD voltage will change only twice in a subfield. The number of switches is the same when the progressive scan method is selected at the full-white pattern, as shown in Fig. 7. Consequently, if the interlaced scan method is
Y. Kim, S. Park / Displays 28 (2007) 105–111
109
(a) Selection of ON-cells
A1 (a) Digital process in PDP
A2 ··· Am Y1 Y3
···
Y 2 ··· Y n-2 Y n
(b) Applied Waveforms for the address electrodes Fig. 7. A voltage waveform in the address electrode when the interlaced scan method is applied to the horizontal alternative ON/OFF line pattern.
applied to the horizontal alternative ON/OFF line pattern, we will have advantages, such as a reduced displacement current in the address electrode and stable scan and sustain voltage waveforms. On the other hand, the progressive scan method is better than the interlaced scan method with regard to the horizontal ON/OFF two line pattern (ON and OFF-cells are changed every two lines). It does not mean that a direct comparison should be made between the two scan methods. The aim is to reduce switching noise for the driving PDP. The scan method will have to be selected according to the data status of the displayed image pattern. In this paper, the interlaced/progressive scan method (IPS) will be explained in terms of the selection of the scan method. The effects of the IPS driving method will be proven using experimental results. The IPS driving method calculates the number of switches of VD voltage waveforms, which are applied to all address electrodes, according to the interlaced and progressive scan methods after image processing for the display of the input image pattern. Switching noise is reduced by the selection of one scan method, which has less switches between the two scan methods. The frame is composed of several subfields. The scan method has to be decided by complying with the applied VD voltage at all address electrodes in each subfield. This method selects a different scan method for each subfield. Fig. 8 shows a sim-
(b) IPS block diagram Fig. 8. A block diagram of the proposed IPS driving method.
ply designed algorithm which can be applied to the IPS driving method. The operation of the proposed algorithm can be easily explained. The digital process is normally composed of an inverse gamma, APL detector, halftone, weight conversion, timing control, and the data RAM control blocks in the PDP, as shown in Fig. 8(a). The proposed IPS block is located after the weight conversion block before the timing control and the data RAM control blocks. After weight conversion, the data R[9:0], G[9:0] and B[9:0] are inputted into the IPS block. Then these data are saved at the interlaced and progressive buffers in order to calculate the number of VD voltage switches in all address electrodes. The interlaced and progressive pulse counters calculate the number of VD voltage switches for each subfield. From these results, the scan method is
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Y. Kim, S. Park / Displays 28 (2007) 105–111
decided in the IPS decision block. The selected scan method is lower the number of switching than the other scan method. The IPS_out signal represents the selected scan method and it is connected to the timing control and data RAM control blocks. The timing control block controls the sequence of the output signals of the scan-IC according to the selected scan method. The data RAM control block controls the output sequence of the final data for the VD voltage waveforms at each address electrode, according to the scan method. 4. Experimental results and discussion To prove the effects of the proposed scan method, a PDP was operated using the proposed method, as mentioned above. At that time, the specifications of the used panel were a 42-in. VGA with a resolution of 853 · 480. Fig. 9 shows the measured voltage waveform (VY) at the scan electrode and the current waveform (Idata) at the address electrode, when the IPS driving method is applied in order to display the horizontal alternative ON/OFF line pattern. Fig. 9(a) shows the measured results for one frame and Fig. 9(b) shows the measured voltage waveform at the scan electrode and the current waveform at the address electrode in the 9th subfield. If these results are compared
with conventional results, as shown in Fig. 5(b) and (c), the switching noise and the high overshoot current disappear at the address electrode. Further more, they show that the stable output waveform can be obtained as the fullwhite pattern. In the case of the IPS driving method, these results show that the driving circuits with higher stability can be realized in an address period. This is reason the generation of heat caused by unwanted data current (Idata) in the devices can be reduced and the damage to devices, which is caused by the induced overshoot voltage in the scan and sustain electrodes, can be protected. In a driving PDP, a protective circuit using a SCR, TRIAC or a zener diode is sometimes used to protect the scan-IC devices against damage from the induced overshoot voltage. Fig. 10 shows the results where by the power consumption amounts are measured according to the gray-scale levels at full-white pattern, for a comparison between conventional and proposed IPS driving methods. These results show that the IPS driving method can decrease power consumption up to a maximum of 6 W when compared with those of the conventional scan method. These results are from the decrease of the displacement current, which happens because of the switching VD voltage. The effect of the IPS driving method may be small, but this is due to the decrease in the power consumption rate, which is just 2.1% of the total power consumption at the fullwhite pattern. This effect, however, cannot be ignored when the special image pattern is displayed.
Power Consumption [W]
Difference Power Consumption [W]
350 300
Progressive IPS Difference
14 12
250
10
200
8
150
6
100
4
50
2
0 0
50 100 150 200 Gray-level at full-white pattern
250
0
Fig. 10. Power consumption according to full gray-scale levels.
Table 1 Power consumption at special image patterns
Fig. 9. The output VY voltage and Idata current waveforms at the horizontal alternative ON/OFF line pattern, with the IPS driving method.
Display patterns
Progressive method (W)
IPS method (W)
Full-white Horizontal 256 gray-scale level Horizontal ON/OFF line Characters only
280.0 293.8
280.0 293.4
372.0 351.0
304.4 340.4
Y. Kim, S. Park / Displays 28 (2007) 105–111
Table 1 shows the results of power consumption amounts compared according to the scan methods in several special image patterns. From these results, the power consumption is the same 280.0 W in both progressive and IPS driving methods at the full-white pattern. Regarding the progressive and IPS driving methods, the power consumption amounts are 293.8 and 293.4 W, respectively, in the horizontal 256 gray-scale level pattern. In the horizontal alternative ON/OFF line pattern, their amounts are 372.0 and 304.4 W, respectively. They are 351.0 and 340.4 W in the character’s pattern, which displays many characters. These results indicate a decrease of 67.6 (18.2%) and 10.6 W (3.1%) for the two special patterns. These results show that the IPS driving method has a greater effect on the special pattern, which has a different VD voltage for each scan line. In the proposed method, the decreasing effect of power consumption is not high in many image patterns, but it never worsened. Power consumption improved significantly at several special patterns. It results from the reduced switching noise of the scan and sustain voltage waveforms and the reduced displacement current in the address electrodes. These results prove that switching noise and the displacement current, as well as power consumption, can be improved, when the proposed IPS driving method is applied to a PDP. 5. Conclusions To reduce the impulse displacement current and the induced overshoot voltage by the input VD voltage in the address period at the special pattern, which forced the change in the VD voltage for each scan line, we proposed and applied the IPS driving method, which selected one method between the interlaced and progressive scan methods for each subfield. The IPS driving method was designed to analyze the input image pattern and select one method from either the interlaced or progressive scan method in the direction of the reduction in the number of switching for VD voltage. This method was very powerful, when the number of VD voltage switching was large. When the proposed IPS driving method was applied, the following benefits were obtained: power consumption is reduced by 67.8 W (a reduction of 18.2%) at the special image pattern, as a horizontal alternative ON/OFF line pattern; the impulse displacement current, which resulted from a reduction in the number of VD voltage switching in the address electrode; the induced overshoot voltage in scan and sustain electrodes decreased highly; the generation of heat at the data-IC and scan-IC could be prevented. Consequently, if
111
the proposed IPS driving method is applied to PDPs, power consumption can be reduced and better circuit board reliance can be realized. Acknowledgement This work was supported by the ERC program of MOST/KOSEF(grant R11-2000-075-02002-0). References [1] H. Kawaguchi, H. Honda, T. Shigeta, T. Oguchi, M. Uchidoi, Technologies for high quality TV image on PDPs, in: Proc. Symp. Soc. Information Display, vol. 36, 2005, pp. 1828–1831. [2] W.S. Jang, Technologies for cost competitive PDP, in: Proc. of 12th Inter. Display Workshops, 2005, pp. 1477–1480. [3] L.F. Weber, M.B. Wood, Energy recovery sustain circuit for the AC plasma display, in: Proc. Symp. Soc. Information Display, vol. 18, 1987, pp. 92–95. [4] Sang-Kyoo Han, Gun-Woo Moon, Myung-Joong Youn, A resonant energy-recovery circuit for plasma display panel employing gasdischarge current compensation method, IEEE Trans. Power Electr. 20 (1) (2005) 209–217. [5] K. Sakita, K. Takayama, K. Awamoto, Y. Hashimoto, High-speed address driving waveform analysis using wall voltage transfer function for three terminals and Vt close curve in three-electrode surfacedischarge AC-PDPs, in: Proc. Symp. Soc. Information Display, vol. 32, 2001, pp. 1022–1025.
Yongduk Kim received the B.S., M.S., and Ph.D. degrees in Electrical Engineering from Kyungpook National University, Daegu, Korea, in 1995, 1997, and 2006, respectively. He is currently with the PDP R&D center of Orion PDP Co., Ltd., Gumi, Kyung-Buk, Korea. His research interests are the design of driving waveforms, driving circuits, and the analysis of plasma discharge for AC-PDP, microelectronics, motor control, sensors and actuators, and MEMS technology.
Sekwang Park received the B.S. degree in Electrical Engineering from Seoul National University, Seoul, Korea, in 1976, and M.S. and Ph.D. degrees in electrical engineering from Case Western Reserve University, Cleveland, OH, USA in 1984 and 1988, respectively. He was project leader of L. VAD Technology, USA, from 1988 until 1989. He is currently a Professor in the Department of Electrical Engineering at Kyungpook National University. His research interests are the driving waveforms and circuits for PDP, microelectronics, sensors and actuators using MEMS technology, especially, pressure sensors, flow sensors, temperature sensors, and humidity sensors.
The interlaced/progressive scan method to reduce the switching noise caused by data pulse in a plasma display Yongduk Kim a, Sekwang Park b
b,*
a R&D Center, Orion PDP Co. Ltd., 257 Gongdan-dong, Gumi, Kyung-buk 703-030, Republic of Korea Department of Electrical Engineering, Kyungpook National University, 1370 Sankyuk-dong, Buk-gu, Daegu 702-701, Republic of Korea
Received 31 January 2007; accepted 23 April 2007 Available online 29 April 2007
Abstract In plasma display panels, this paper deals with a new scan driving method which can reduce power consumption and which can improve the reliance of driving circuits. The IPS (interlaced/progressive scan) method as a new driving method was proposed and its efficiency was proven by experiments. This method selects a used scan method from interlaced and progressive scan methods in each subfield, according to the input image pattern. From these experimental results, the IPS driving method used less power consumption than the conventional scan method at the special image pattern as a horizontal alternative ON/OFF line pattern. We obtained the maximum decreasing rate of 18.2% regarding power consumption at a special image pattern. In addition, this method improved circuits’ reliance and lowered the amount of heating loss, because this is the driving waveforms of the address electrodes decreased switching noise, which is the high induced overshoot voltage in scan and sustain electrodes or high impulse displacement current in address electrodes. Therefore, we can expect the lower power consumption and reduction of switching noise, which is the overshoot voltage or impulse displacement current, when the proposed IPS driving method is applied to a driving PDP. 2007 Elsevier B.V. All rights reserved. Keywords: Plasma display; Scan method; Switching noise; Power consumption; Reliability
1. Introduction Driving technology has grown in leaps and bounds. In particulars, the maximum peak luminance was above 1500 cd/m2, the dark room contrast ratio was above 10,000:1, and the power consumption was between 250 and 300 W in the case of the 42 in. XGA module [1,2]. Costs have rapidly decreased due to the influence on the development of the process technology such as the multiarray process and the simple and compact circuit design. A new image processing technology, which improves the expression of a low gray-scale level, dynamic false contour noise and image sticking, the low cost circuit design and the fabrication of panel have been applied for a driving PDP
*
Corresponding author. Tel.: +82 53 950 6600; fax: +82 53 950 5606. E-mail address: [email protected] (S. Park).
0141-9382/$ - see front matter 2007 Elsevier B.V. All rights reserved. doi:10.1016/j.displa.2007.04.002
[1]. These factors lead the popularization of PDP-TVs. In many type of technologies, factor such as high luminance efficiency, improved dynamic false contour, the removal of image sticking, high density, high reliance, driving circuit safety, and low power consumption, are in greater demand. In particular, low power consumption and driving circuit reliance are the most important factors regarding consumers’. In this paper, a new method is proposed to reduce power consumption. This method is not for energy recovery circuits, which control the displacement current that appears at the switching of sustain pulses, but it is intended to improve reliance by the stable driving of COF or TCP with data-ICs [3,4]. In special image patterns such as the horizontal alternative ON/OFF line pattern (even lines designated as ON and odd lines designated as OFF), the data voltages applied to the address electrodes can be changed between low (GND) and high (VD). The high displacement
106
Y. Kim, S. Park / Displays 28 (2007) 105–111
current flows through the data-ICs and high switching noises are induced in the scan and sustain electrodes. The displacement current, which is generated by switching data voltage and flows through the data-ICs, causes the generation of data-IC heat and the reduction of panels’ lifetime. The induced noise pulses at the scan and sustain electrodes cause a reduction in panel’s lifetime and unwanted impulse over-currents. This naturally appears when a cell is discharged. Because this is cell structure like a capacitor, it can not be removed but can be reduced. In this paper, to reduce this phenomenon, the IPS (interlaced/progressive scan) method, which selects interlaced or progressive scan method according to the number of VD voltage switching for addressing, will be proposed and its efficiency will be proven by experiments.
1st sub-field Reset
2nd sub-field
Address
Sustain
Vramp Vsus
Y
X A
Vylevel
Vxr
VD Fig. 2. A driving waveform for AC-PDP.
2. Pre-experiments PDP has scan (Y), sustain (X), and address (A) electrodes, as shown in Fig. 1. The scan and sustain electrodes are on the front panel and are parallel to each other. The address electrodes are on the rear panel and are perpendicular to the scan and sustain electrodes. In order to display an image, a high voltage driving waveform which is needed to discharge cells is supplied to each electrode using the driving circuit of the high voltage. Fig. 2 shows one subfield of a driving waveform for high voltage. A driving waveform is composed of one frame, which is divided by several subfields. A driving waveform is normally separated by the reset, address and sustain periods. In a sustain period, the sustain pulses for discharge are applied to the scan and sustain electrodes. In an address period, address discharges are generated so as to select the ON-cells for the discharge of the selected cells in sustain period. Address discharges are controlled using wall charges which accumulate on the dielectric layers of each electrode. In a reset period, the unstable wall charges are made uniform by using the A1 A2
…
Am
Y1 Y2 Y3 X
…
Yn
Fig. 1. The electrode structure of panel.
weak discharge in the ramp-up and ramp-down for stable discharge in the address period. The address discharge, which decides the ON-cells or OFF-cells, occurs in address period, as mentioned above. This discharge occurs as the VD voltage is applied to address electrodes and the scan pulse is applied to the scan electrodes at the same time. The waveform of VD voltage is normally a square waveform and the voltage has to be a minimum of 50 V for the driving to be stable without misaddressing. At that time, the high data voltage is synchronized with the scan pulse and fast switching occurs between low and high voltage. If the VD voltages of the current scan line and the following scan line are the same, as shown in Fig. 3(a), the switching of the VD voltage will not occur. However, when the VD voltage is alternatively changed between high and low as the horizontal alternative ON/ OFF line pattern – this pattern is ON in odd scan lines and OFF in even scan lines, this represents the worst condition. In this case, all waveforms of VD voltage in each data line switch between low (GND) and high (VD) and the number of the switching equals the number of scan lines. This generates a high displacement current on the address electrode; moreover, it does the high induced voltage and current on the scan and sustain electrodes. The displacement current generated by the applied VD increases power consumption, generates heat for data-IC and scan-IC and it has a bad influence on devices because of a plurality of switching. If the he number of switching of VD voltage waveform increases, the switching noises shall increase. For example, in the full-white pattern as shown in Fig. 3(a), the VD voltage switches to high and to low only once, as described in Fig. 3(b) and (c). In case of the horizontal alternative ON/OFF line pattern, as shown in Fig. 4(a), however, this switching is repeated in every scan line in the address period, as shown in Fig. 4(b) and (c). This is reason that the data voltage is different in each scan line. As a result, many switching noises and high displacement current are generated. This is why power consumption increases.
Y. Kim, S. Park / Displays 28 (2007) 105–111
(a) Full-white pattern
107
(a) Horizontal alternative ON/OFF line pattern
(b) Selection of ON-cells
(b) Selection of ON-cells
A1
A1
A2
A2
···
···
Am
Am Y1 Y2 Y3
···
Y n-1 Y n
Y1 Y2 Y3
···
Y n-1 Y n
(c) Applied waveforms of address electrodes
(c) Applied waveforms of address electrodes Fig. 3. The data voltage waveforms at the full-white pattern.
Fig. 4. The data voltage waveforms at the horizontal alternative ON/OFF line pattern.
In the case of a full-white pattern, after the address period starts, the VD voltage waveforms are changed to high, this status is kept until the end of the last scan line. Then the voltage waveforms are changed to low. In that situation, the VD voltage is changed only twice in one subfield. On the other hand, when the horizontal alternative ON/ OFF line pattern is displayed, as shown in Fig. 4, the data voltage of the address electrode is changed to high at the odd scan lines and changed to low at the even scan lines. In this case, the number of data voltage switching equals that of the scan lines. Fig. 5 shows the measured voltage waveform of the scan electrode and the current waveform of the address electrode for two different display patterns. When the number of VD voltage waveform switching is small, induced switching noises do not occur in the address period, the current of the address electrode flows just at the
1st (A) and last (B) scan lines, as shown in Fig. 5(a), however, when a number of VD voltage switching occurs, Fig. 5(b) and (c) show many switching noises at the scan electrode which is generated in the address period of all subfields. In particular, we can see that the large current with the overshoot noise flows through all address electrodes. The induced switching voltage, at the scan electrode, is a result of the PDP cell structure. As cell structures are well known, there are scan, sustain and address electrodes. The relationship among these electrodes is briefly expressed as an equivalent circuit with three capacitors, as shown in Fig. 6(a) [5]. VcYA(t), the cell voltage between both ends of capacitor CYA, can be explained by the voltage between the scan and address electrodes, as expressed in Eq. (1).
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Y. Kim, S. Park / Displays 28 (2007) 105–111
X
Y CXY
CYA
CAX
A (a) An equivalent circuit of a PDP cell
VDATA Discharge current IA
Displacement current Induced voltage VY
(b) Induced voltage and current by VD switching Fig. 6. The equivalent circuit of a PDP cell and the induced voltage and current waveforms [5].
The amplitude of the induced voltage waveform is related to the number of switching which are synchronized among all address electrodes. Its maximum value can be VD voltage which is applied to the address electrodes. The induced switching noise influences the drive-IC operation and it must be reduced lifetime and reliance of driveIC because of the generation of heat and induced impulse over-currents. Fig. 5. An induced voltage waveform in a scan electrode and a displacement current waveform in an address electrode according to the displayed pattern.
V cYA ðtÞ ¼ V cY ðtÞ V cA ðtÞ
ð1Þ
When the VcY(t) voltage of the scan electrode is continuously present in the address period, and, if the applied pulses of the many address electrodes change between low and high, the high voltage at the scan electrode will be momentarily induced. It can be easily explained by Eq. (1), because VcYA(t) has continuity voltage as a peculiar characteristic of the capacitor device, this voltage cannot be directly changed according to the rapid variation of the applied data voltage. The displacement current will flow until the VcYA(t) varies as VcA(t) and the discharge time delay will appears. As this phenomenon occurs unconditionally if the VcA(t) voltage changes, to reduce this switching noise, the number of the logic transitions must be reduced.
3. Proposed driving method (IPS driving method) Regarding scan method, there are the progressive and interlaced scan methods. The progressive method scans the scan-line order. The interlaced method, however, scans even lines after odd lines. When the progressive scan method is used, the data voltage switching happens only twice in the address period for a full-white pattern, but the data voltage switching is repeated between VD and GND whenever each line is scanned for a horizontal alternative ON/OFF line pattern. This switching generates overshoot noise in the address period, as mentioned above. If the interlaced scan method is applied to the horizontal alternative ON/OFF line pattern, the input data pulse for the VD voltage will change only twice in a subfield. The number of switches is the same when the progressive scan method is selected at the full-white pattern, as shown in Fig. 7. Consequently, if the interlaced scan method is
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(a) Selection of ON-cells
A1 (a) Digital process in PDP
A2 ··· Am Y1 Y3
···
Y 2 ··· Y n-2 Y n
(b) Applied Waveforms for the address electrodes Fig. 7. A voltage waveform in the address electrode when the interlaced scan method is applied to the horizontal alternative ON/OFF line pattern.
applied to the horizontal alternative ON/OFF line pattern, we will have advantages, such as a reduced displacement current in the address electrode and stable scan and sustain voltage waveforms. On the other hand, the progressive scan method is better than the interlaced scan method with regard to the horizontal ON/OFF two line pattern (ON and OFF-cells are changed every two lines). It does not mean that a direct comparison should be made between the two scan methods. The aim is to reduce switching noise for the driving PDP. The scan method will have to be selected according to the data status of the displayed image pattern. In this paper, the interlaced/progressive scan method (IPS) will be explained in terms of the selection of the scan method. The effects of the IPS driving method will be proven using experimental results. The IPS driving method calculates the number of switches of VD voltage waveforms, which are applied to all address electrodes, according to the interlaced and progressive scan methods after image processing for the display of the input image pattern. Switching noise is reduced by the selection of one scan method, which has less switches between the two scan methods. The frame is composed of several subfields. The scan method has to be decided by complying with the applied VD voltage at all address electrodes in each subfield. This method selects a different scan method for each subfield. Fig. 8 shows a sim-
(b) IPS block diagram Fig. 8. A block diagram of the proposed IPS driving method.
ply designed algorithm which can be applied to the IPS driving method. The operation of the proposed algorithm can be easily explained. The digital process is normally composed of an inverse gamma, APL detector, halftone, weight conversion, timing control, and the data RAM control blocks in the PDP, as shown in Fig. 8(a). The proposed IPS block is located after the weight conversion block before the timing control and the data RAM control blocks. After weight conversion, the data R[9:0], G[9:0] and B[9:0] are inputted into the IPS block. Then these data are saved at the interlaced and progressive buffers in order to calculate the number of VD voltage switches in all address electrodes. The interlaced and progressive pulse counters calculate the number of VD voltage switches for each subfield. From these results, the scan method is
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decided in the IPS decision block. The selected scan method is lower the number of switching than the other scan method. The IPS_out signal represents the selected scan method and it is connected to the timing control and data RAM control blocks. The timing control block controls the sequence of the output signals of the scan-IC according to the selected scan method. The data RAM control block controls the output sequence of the final data for the VD voltage waveforms at each address electrode, according to the scan method. 4. Experimental results and discussion To prove the effects of the proposed scan method, a PDP was operated using the proposed method, as mentioned above. At that time, the specifications of the used panel were a 42-in. VGA with a resolution of 853 · 480. Fig. 9 shows the measured voltage waveform (VY) at the scan electrode and the current waveform (Idata) at the address electrode, when the IPS driving method is applied in order to display the horizontal alternative ON/OFF line pattern. Fig. 9(a) shows the measured results for one frame and Fig. 9(b) shows the measured voltage waveform at the scan electrode and the current waveform at the address electrode in the 9th subfield. If these results are compared
with conventional results, as shown in Fig. 5(b) and (c), the switching noise and the high overshoot current disappear at the address electrode. Further more, they show that the stable output waveform can be obtained as the fullwhite pattern. In the case of the IPS driving method, these results show that the driving circuits with higher stability can be realized in an address period. This is reason the generation of heat caused by unwanted data current (Idata) in the devices can be reduced and the damage to devices, which is caused by the induced overshoot voltage in the scan and sustain electrodes, can be protected. In a driving PDP, a protective circuit using a SCR, TRIAC or a zener diode is sometimes used to protect the scan-IC devices against damage from the induced overshoot voltage. Fig. 10 shows the results where by the power consumption amounts are measured according to the gray-scale levels at full-white pattern, for a comparison between conventional and proposed IPS driving methods. These results show that the IPS driving method can decrease power consumption up to a maximum of 6 W when compared with those of the conventional scan method. These results are from the decrease of the displacement current, which happens because of the switching VD voltage. The effect of the IPS driving method may be small, but this is due to the decrease in the power consumption rate, which is just 2.1% of the total power consumption at the fullwhite pattern. This effect, however, cannot be ignored when the special image pattern is displayed.
Power Consumption [W]
Difference Power Consumption [W]
350 300
Progressive IPS Difference
14 12
250
10
200
8
150
6
100
4
50
2
0 0
50 100 150 200 Gray-level at full-white pattern
250
0
Fig. 10. Power consumption according to full gray-scale levels.
Table 1 Power consumption at special image patterns
Fig. 9. The output VY voltage and Idata current waveforms at the horizontal alternative ON/OFF line pattern, with the IPS driving method.
Display patterns
Progressive method (W)
IPS method (W)
Full-white Horizontal 256 gray-scale level Horizontal ON/OFF line Characters only
280.0 293.8
280.0 293.4
372.0 351.0
304.4 340.4
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Table 1 shows the results of power consumption amounts compared according to the scan methods in several special image patterns. From these results, the power consumption is the same 280.0 W in both progressive and IPS driving methods at the full-white pattern. Regarding the progressive and IPS driving methods, the power consumption amounts are 293.8 and 293.4 W, respectively, in the horizontal 256 gray-scale level pattern. In the horizontal alternative ON/OFF line pattern, their amounts are 372.0 and 304.4 W, respectively. They are 351.0 and 340.4 W in the character’s pattern, which displays many characters. These results indicate a decrease of 67.6 (18.2%) and 10.6 W (3.1%) for the two special patterns. These results show that the IPS driving method has a greater effect on the special pattern, which has a different VD voltage for each scan line. In the proposed method, the decreasing effect of power consumption is not high in many image patterns, but it never worsened. Power consumption improved significantly at several special patterns. It results from the reduced switching noise of the scan and sustain voltage waveforms and the reduced displacement current in the address electrodes. These results prove that switching noise and the displacement current, as well as power consumption, can be improved, when the proposed IPS driving method is applied to a PDP. 5. Conclusions To reduce the impulse displacement current and the induced overshoot voltage by the input VD voltage in the address period at the special pattern, which forced the change in the VD voltage for each scan line, we proposed and applied the IPS driving method, which selected one method between the interlaced and progressive scan methods for each subfield. The IPS driving method was designed to analyze the input image pattern and select one method from either the interlaced or progressive scan method in the direction of the reduction in the number of switching for VD voltage. This method was very powerful, when the number of VD voltage switching was large. When the proposed IPS driving method was applied, the following benefits were obtained: power consumption is reduced by 67.8 W (a reduction of 18.2%) at the special image pattern, as a horizontal alternative ON/OFF line pattern; the impulse displacement current, which resulted from a reduction in the number of VD voltage switching in the address electrode; the induced overshoot voltage in scan and sustain electrodes decreased highly; the generation of heat at the data-IC and scan-IC could be prevented. Consequently, if
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the proposed IPS driving method is applied to PDPs, power consumption can be reduced and better circuit board reliance can be realized. Acknowledgement This work was supported by the ERC program of MOST/KOSEF(grant R11-2000-075-02002-0). References [1] H. Kawaguchi, H. Honda, T. Shigeta, T. Oguchi, M. Uchidoi, Technologies for high quality TV image on PDPs, in: Proc. Symp. Soc. Information Display, vol. 36, 2005, pp. 1828–1831. [2] W.S. Jang, Technologies for cost competitive PDP, in: Proc. of 12th Inter. Display Workshops, 2005, pp. 1477–1480. [3] L.F. Weber, M.B. Wood, Energy recovery sustain circuit for the AC plasma display, in: Proc. Symp. Soc. Information Display, vol. 18, 1987, pp. 92–95. [4] Sang-Kyoo Han, Gun-Woo Moon, Myung-Joong Youn, A resonant energy-recovery circuit for plasma display panel employing gasdischarge current compensation method, IEEE Trans. Power Electr. 20 (1) (2005) 209–217. [5] K. Sakita, K. Takayama, K. Awamoto, Y. Hashimoto, High-speed address driving waveform analysis using wall voltage transfer function for three terminals and Vt close curve in three-electrode surfacedischarge AC-PDPs, in: Proc. Symp. Soc. Information Display, vol. 32, 2001, pp. 1022–1025.
Yongduk Kim received the B.S., M.S., and Ph.D. degrees in Electrical Engineering from Kyungpook National University, Daegu, Korea, in 1995, 1997, and 2006, respectively. He is currently with the PDP R&D center of Orion PDP Co., Ltd., Gumi, Kyung-Buk, Korea. His research interests are the design of driving waveforms, driving circuits, and the analysis of plasma discharge for AC-PDP, microelectronics, motor control, sensors and actuators, and MEMS technology.
Sekwang Park received the B.S. degree in Electrical Engineering from Seoul National University, Seoul, Korea, in 1976, and M.S. and Ph.D. degrees in electrical engineering from Case Western Reserve University, Cleveland, OH, USA in 1984 and 1988, respectively. He was project leader of L. VAD Technology, USA, from 1988 until 1989. He is currently a Professor in the Department of Electrical Engineering at Kyungpook National University. His research interests are the driving waveforms and circuits for PDP, microelectronics, sensors and actuators using MEMS technology, especially, pressure sensors, flow sensors, temperature sensors, and humidity sensors.