The lubrication of gold surfaces by plasma-deposited thin films of fluorocarbon polymer

The lubrication of gold surfaces by plasma-deposited thin films of fluorocarbon polymer

Reliability analysis of several conductors at high current densities for use in bubble memories M. H. S H E A R E R and F. Q U A D R I IEEE 18th Annua...

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Reliability analysis of several conductors at high current densities for use in bubble memories M. H. S H E A R E R and F. Q U A D R I IEEE 18th Annual Proceedings, Reliability Physics 1980, Las Vegas, Nevada, p.95 (1980). The purpose of this paper is to present lifetime testing results for three metallisation systems under test conditions expected during device operation as well as accelerated testing. Namely, Cr/Cu/Cr, W/Au/W and AI-4% Cu systems passivated with polyimide. The test samples are bubble memory generators processed under conditions similar to those in bubble device fabrication. For example, the conductor line widths are 1.5pm and etched using ion milling. The test conditions include pulse amplitudes of 200 to 500mA, pulse widths of 62ns to lp.s, a duty cycle of 1% to 25% and a temperature range of 25 to 150°C. An electronic test circuit capable of counting precisely the number of pulses to failure for each test sample and maintaining constant current density,~ . throughout the test cy.cle will be • . . . dzscussed. Fadure modes were examined by scanmng electron m~croscopy. The results suggest that for the systems studied, at any test condition, lifetime increased in the order A1-4% Cu, W/Au/W, Cr/ Ag]Cr, Cr/Cu/Cr with the activation energies correlating with the activation energy for self-diffusion. The lubrication of gold surfaces by plasma-deposited thin films of fluorocarbon polymer K. R. WALTON IEEE Trans. Components, Hybrids Mfng Technol. Chmt-3(2), p.297 (1980). Thin films of fluorocarbon material have been deposited on gold-plated substrates by the technique of RF-induced plasma polymerisation of fluorocarbon monomer gases. The deposited films have been evaluated for suitability as contact lubricants by determining the friction and wear characteristics of the substrates in the presence and absence of the film and by a comparison to substrates coated with microcrystalline wax, a typical contact lubricant currently in use. The data were obtained using a rider/flat wear tester. Electrical conduction through the films has been characterised by contact resistance measurements. The results show that there exists a range of film thicknesses that provide a significant improvement in friction and wear relative to unlubricated substrates at a low ohmic contact resistance. The microcrystalline wax, however, provided the best protection. Moisture uptake and release by plastic molding compounds its relationshlp to system life and failure mode D. W. DYCUS

IEEE 18th Annual Proceedings, Reliability Physics 1980, Las Vegas, Nevada, p.293 (1980). Plastic molding compounds show two major moisture uptake rates, one fast and one slow. The fast rate represents the moisture uptake mechanism that is responsible for moisture dependent failures in epoxy novolac plastics. It is felt that the fast rate represents transport through the organic epoxy matrix by hydrogen bonding. Silicone epoxy shows a much slower rate of moisture uptake after an initial induction period. The moisture dependent failure is therefore controlled by the slower rate in silicone epoxy. The slower rate is thought to be uptake by the silica filler matrix. Failure analysis and reliability of thermal printing devices L. C. WAGNER

IEEE 18th Annual Proceedings, Reliability Physics 1980, Las Vegas, Nevada, p.232 (1980). Silicon thermal printing devices present very real challenges to both the failure analyst and reliability engineer. These devices are unusual in several ways. They are intended for operation of the active areas at temperatures above those normally experienced silicon devices. Thermal conductivity plays an inordinately significant role in the operation and particularly the lifetime of the device. This fact makes analysis and control of the materials thermally surrounding electronically active areas as important as the active areas themselves. The typical structure is illustrated in Fig. 1 which shows the individual printing element or mesa which is used as a heating element employing current flow through the bhlk resistivity of the mesa to generate heat. The mesa heat is then dissipated through the paper and through the epox'y to the ceramic substrate. The mesas may be arranged in matrices or lines as illustrated in Fig. 2. In addition to the thermal and electrical characteristics of the device, device lifetime is ultimately limited by mechanical wear, i.e. abrasion against the paper. Thus the devices cannot be viewed in an electronic vacuum but must be viewed as a thermo-mechanical electronic system which puts an added stress on normal reliability and failure analysis functions.

Corrosion model for plastic encapsulated and hermetic modules G. Di GIACOMO IEEE 18th Annual Proceedings, Reliability Physics 1980, Las Vegas, Nevada, p.275 (1980). This paper describes a corrosion based on the permeation properties of the encapsulants and on the corrosion rates of the metallurgies in the given environment. The pollutants vapour pressure, the package geometry, and the sizes of the (pollutant) ingress and corrosion areas are also functional variables. The knowledge of these physically measurable quantities enables us to calculate the time to failure for any package under field stress conditions. Deformation of AI metallisation in plastic encapsulated semiconductor devices caused by thermal shock M. ISAGAWA, Y. IWASAKI and T. SUTOH IEEE 18th Annual Proceedings, Reliability Physics 1980, Las Vegas, Nevada, p.171 (1980). Deformation of A! metallisation was observed during thermal shock tests of plastic encapsulated semiconductor devices. The authors made clear quantitatively the relations between the deformation length and Si chip size, distance from deformation centre, molding resin, temperature difference in thermal shock etc. and tried to explain the mechanisms and the cause of this phenomenon. Generic reliability of the high-conductivity TaSiz/n + poly-Si gate MOS structure A. K. SINHA, D. B. FRASER and S. P. M U R A R K A IEEE 18th Annual Proceedings, Reliability Physics 1980, Las Vegas, Nevada, p.159 (1980). Results are presented on the generic reliability of the TaSi2/n + poly-Si gate structure which has a stable sheet resistance of ~2ohm/sq and which retrofits into the conventional n-channel Si-gate process sequence• The MOS and IGFET parameters are well-behaved, i.e. determined by the n + poly-Si layer of the composite. The static and dynamic bias-temperature stabilities are excellent for the presently employed sequence of process steps. Certain process and structure limitations do exist, and these have been defined.

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Production&Processing

The longitudinal diffusion coefficient and the mobility of hot electrons in silicon G. BOSMAN, R. J. J. ZIJLSTRA and F. NAVA Solid-St. Electron. 24, 5 (1981). The longitudinal diffusion coefficient of electrons in silicon is (i) calculated as a function of electric field strength from noise and current measurements on a n+nn + planar silicon device and (ii) measured vs field strength with the help of the Time-of-Flight technique at 200, 160 and 77K. The electric field was oriented along the (111) direction. The first method yielded results for fields lower than 105 V m - I whereas the second method yielded results for fields ranging from 2×104 to 2 × 106Vm- I. Values for the mobility obtained with the first method are presented as well and compared with Time-of-Flight data. IC alignment and layout considerations S. STROM Electron. Prodn. p.61 (1980). An important consideration in PC board layout is selecting the proper alignment of the ICs on the board and the layout of the power and ground bus. By correctly aligning the ICs, the designer can maximise the number of chips permitted on the board, decrease average PC line length and reduce power supply noise. Occasionally these decisions are neglected; however, on a two-sided board, IC alignment and bus layout represents a very important consideration. The elimination of unnecessary noise and improvement of circuit quality can be easily accomplished by following some basic design guidelines. Scaling the barriers to VLSI's fine lines J. LYMAN Electronics p. 115 (1980). The limits of IC technology are being forced outward by new and improved lithography and etching, beam processing and silicides. 43