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The use of instantaneous symmetrical components for balancing a delta connected load and power factor correction
Electric Power Systems Research 54 (2000) 67 – 74 www.elsevier.com/locate/epsr
The use of instantaneous symmetrical components for balancing a delta connected load and power factor correction Arindam Ghosh *, Avinash Joshi Department of Electrical Engineering, Indian Institute of Technology, Kanpur India Received 29 March 1999; received in revised form 29 March 1999; accepted 17 August 1999
Abstract This paper presents a novel way of generating the reference currents for an active filter and/or a static compensator. A compensator structure is proposed which is capable of balancing an unbalanced delta-connected load that may also draw harmonic currents. In addition to balancing the load, the supply side power factor is also made unity. The theory of instantaneous symmetrical components is used here to obtain three phase reference currents that are to be tracked by the compensator in a hysteresis band control scheme. The paper demonstrates the feasibility of such as scheme through simulation studies. © 2000 Elsevier Science S.A. All rights reserved. Keywords: Load balancing; Power factor correction; Active filters; Power distribution system
1. Introduction Variable reactive power compensation of non-linear and/or poor power factor loads has gained considerable attention lately. Many techniques have been proposed to improve the supply side power factor and to cancel out the harmonics generated by power electronic loads. These schemes usually employ single/three-phase voltage source inverters (VSIs) that are supplied from a dc storage capacitor and operate in current control mode to track a specified reference current waveform. The single most important issue in any of these schemes is the generation of these reference current waveforms, which when injected to the power system, cancel out the load harmonics and/or improve the supply power factor. Of the various methods that have been proposed for generating the reference current waveforms, the instantaneous p-q theory [1 – 3] has gained considerable attention. This theory is utilized to compute the instantaneous reactive power from measured threephase voltage and load current waveforms. The VSIs are then controlled to deliver this instantaneous reactive * Corresponding author. Tel.: +91-512-587179; fax: + 91-512590063. E-mail address: [email protected] (A. Ghosh)
power. This method has been widely used in active power line conditioning. Various interpretations and/or improvements on the method have been reported in [4–7]. A simplified approach is one in which the phase of the desired source current is fixed with respect to the source voltage and the magnitude of the reference current waveform is generated from the feedback of dc storage capacitor voltage [8,9]. The loss or gain of charge stored by the capacitor is indicative of the instantaneous power balance between the source and the total load including the losses in the inverters. In an ideal situation, the compensator will supply pure reactive power. Thus a negative feedback of the capacitor voltage can be utilized to adjust the magnitude of the desired source current waveforms. These methods are simple but are only suitable for balanced or singlephase loads. The balancing of an unbalanced delta-connected load is a classical problem. An excellent description of load balancing is given in [10] in which any unbalanced reactive delta-connected network is converted into a balanced resistive delta-connected network by suitable introduction of admittance in parallel with each branch. The solution, even though aesthetically pleasing, has been carried out only for sinusoidal steadystate conditions.
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A. Ghosh, A. Joshi / Electric Power Systems Research 54 (2000) 67–74
In this paper we utilize the theory of symmetrical components for generating reference current waveforms to balance a given load. It has been observed that the instantaneous power in an unbalanced system contains an oscillating component that rides a dc value [11]. The objective of the compensating system is to supply this zero-mean oscillating power such that the dc component can be supplied by the source. The structure of the compensating system depends on the manner in which the load is connected. In the paper we concentrate on delta-connected loads. In the next sections we shall discuss the reference current generation scheme, followed by compensator structure and its associated control for maintaining the charge on the dc capacitor. We shall validate the formulation through detailed digital computer simulation studies.
2. Generating the reference currents The basic scheme is shown in Fig. 1 in which the compensator is represented by current sources. In reality, the compensator can be implemented through three single-phase VSI that operate in current control mode and track reference currents. The aim of the scheme proposed here is to generate the three reference current waveforms for ifab, ifbc and ifca, denoted by i*fab, i*fbc and i*fca, respectively, such that the supply sees a balanced load. The scheme utilizes the measurements of the load currents ilab, ilbc, ilca and the supply side voltages 6sa, 6sb and 6sc. No assumption on the nature of the load is required here. The compensator will produce desired results as long as its bandwidth is sufficient to follow the fluctuations in the load.
2.1. Theory of instantaneous symmetrical components Let us first introduce the notion of the instantaneous symmetrical components. Let any three phase instantaneous currents be defined by ia, ib and ic. The power invariant instantaneous symmetrical components are then defined by [12]
Æi Ç Æ1 1 1 ÇÆi Ç Ã a0à à Ãà a à 1 Ãia1à = Ã1 a a 2 ÃÃib Ã
3Ã Ã È ic à Èia2Ã É È1 a 2 a à ÉÃ É Fig. 1. Schematic diagram of the compensation scheme.
(1)
where a = e j120°. It is to be noted that the instantaneous vectors ia1 and ia2 are complex conjugate of each other and ia0 is a real quantity. If the line currents are balanced, ia0 is zero. To illustrate the idea, let us consider the following three-phase unbalanced instantaneous currents, given by ia = 12 sin vt A,
ib = 33 sin (vt − 100°) A,
ic = 25 sin (vt + 90°) A
Fig. 2. Locus of instantaneous positive and negative sequence currents.
where v= 100p rad s − 1. The vectors ia1 and ia2 are computed for one cycle and the loci of the tip of these vectors are plotted in Fig. 2. In this figure, the direction of rotation of the loci is also indicated. It can be seen that these loci form a closed path. Moreover, the vector ia1 rotates in the counter clockwise direction while the vector ia2 rotates in the clockwise direction. Also, the same analysis is valid if we consider voltage signals instead of currents. For example, the locus for a balanced three-phase voltage of 20 V (peak) is also shown Fig. 2. As the voltages are balanced, this locus is a circle.
A. Ghosh, A. Joshi / Electric Power Systems Research 54 (2000) 67–74
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tion we get the following equation K1isa + (K1 cos 120°− K2 sin 120°)isb + (K1 cos 240°− K2 sin 240°)isc = 0
(4)
Expanding each term of the above equation, we get K1 =
3 (6sb − 6sc ), 2
K1 cos 120°− K2 sin 120°=
3 (6sc − 6sa ) 2
and K1 cos 240°− K2 sin 240°=
3 (6 − 6sb ) 2 sa
We can thus modify Eq. (4) as Fig. 3. Three-phase load power (solid line), source power (dashed line) and compensator power (dotted line) for an unbalanced load containing: (a) no harmonic; and (b) harmonics.
2.2. Reference compensating current generation scheme The purpose of the scheme proposed here is to generate the three reference current waveforms i*fab, i*fbc and i*fca which will then be supplied as reference to the three VSIs. To generate these three currents, three independent equations are required. To achieve this, we list the following specifications for a load balancing scheme: 1. The supply current must be balanced. 2. The supply current must be in phase with supply voltage (unity power factor). 3. The compensator is not required to supply or sink average power. In the analysis given below, we assume that the compensator tracks the reference currents perfectly, i.e., ifab =i*fab etc. Since both the load and the compensator are connected in delta, we stipulate that the compensator currents are such that the following equality holds (ilab − i*fab )+ (ilbc −i*fbc ) +(ilca −i*fca ) = 0 This implies that the circulating current in the delta is zero. Solving we get (2)
i*fab +i*fbc +i*fca =ilab +ilbc +ilca
(6sb − 6sc )isa + (6sc − 6sa )isb + (6sa − 6sb )isc = 0
Again since isa = ilab − i*fab − ilca + i*fca, isb =ilbc − i*fbc − ilab + i*fab and ise = ilca − i*fca − ilbc + i*fbc, Eq. (5) can be rewritten as (ilab − i*fab )(6sb − 26sc + 6sa )+ (ilbc − i*fbc )(6sc − 26sa +6sb ) + (ilca − i*fca )(6sa − 26sb + 6sc )= 0 Rearranging the above equation and using Eq. (2), we get 6sci*fab + 6sai*fbc + 6sbi*fca = 6scilab6sailbc + 6sbilca
6saisa + 6sbisb + 6scisc = Pla6
Ú{6sa + a6sb +a 6sc } =Ú{isa +aisb +a isc }
The above equation is rearranged to arrive at
(3)
(7)
Equation (7) can be rewritten in terms of the line-toline voltages and currents inside the delta as + (6sc − 6sa )(ilca − i*fca )= Pla6
2
(6)
If we assume a balanced load that does not contain any harmonics, the instantaneous compensator power must be equated to zero. However, to obtain a solution for a more general load, we must note that the instantaneous power in a balanced three-phase circuit is constant while for an unbalanced circuit it has a double frequency component in addition to the dc value. The objective of the compensation scheme is to generate balanced source currents and thus for balanced supply voltages, the power from the source must be constant and equal to the dc value of-the load power. In that case the compensator only supplies the zero-mean pulsating power to the load. This is illustrated in Fig. 3 (a). Therefore we obtain
To obtain a unity power factor at the source side, we stipulate that the phase of the vector isa1 must be the same as that of 6sa1 at each instant of time. From this stipulation we get 2
(5)
(6sa − 6sb )(ilab − i*fab)+ (6sb − 6sc )(ilbc − i*fbc )
Equating the angles of the above equation we get
(6sa − 6sb )i*fab + (6sb − 6sc )i*fbc + (6sc − 6sa )i*fca
isb sin 120°+isc sin 240° K = 1 isa + isb cos 120° + isc cos 240° K2
= (6sa − 6sb )ilab + (6sb − 6sc )ilbc + (6sc − 6sa )ilca − Pla6
where K1 =6sb sin 120° +6sc sin 240° and K2 =6sa + 6sb cos 120° +6sc cos 240°. Rearranging the above equa-
The average load power may be obtained from the instantaneous load power by using a Butterworth low-
(8)
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pass filter as has been suggested in [3]. However, as the cut-off frequency of the filter is relatively low, the settling time involved is fairly large (approximately one and a half cycle). A moving average (MA) filter, on the other hand, can compute Pla6 very fast and has a settling time of half a cycle following any transient. Another interesting point to noted is that any harmonic component in the load does not require any real power from the fundamental frequency source. The formulation of Eq. (7) and Eq. (8) is thus valid even when the load contains harmonics. This is shown in Fig. 3 (b) in which pulsating harmonic component (dotted curve) of the load is supplied by the compensator. Combining Eqs. (2) and (6) and Eq. (8) we get the following three independent linear algebraic time-varying equations containing the three compensating currents. These are written in vector-matrix form as Ai*f =Ail −Pl
(9)
where i*Tf =[i*fab i*fbc i*fca ], i Tl =[ilab ilbc ilca ] and P Tl = [0 0 Pla6 ] and the matrix A is given by
Æ Ç 1 1 1 à à A=à 6sc 6sa 6sb Ã Ã È (6sa − 6sb ) (6sb −6sc ) (6sc −6sa )Ã É Premultiplying both sides of Eq. (9) by A − 1 we get i*f = il − A − 1Pl
(10)
3. Compensator scheme The current sources shown in Fig. 1 can be implemented by a three-phase VSI that is operated in the hysteresis band control mode. This controller tracks the reference currents generated by Eq. (13). The standard configuration of a three-phase VSI, consisting of three poles of two switches each, is unsuitable for this purpose. As seen from Eq. (2) the sum of inverter output currents is not zero for an unbalanced load as required by this configuration. In this paper a configuration shown in Fig. 4 using a common dc capacitor is proposed. We shall further justify this choice at the end of this section. In Fig. 4 each VSI is connected to the network though an isolating transformer. The purpose of including the transformers is to provide isolation between the inverters. This prevents the dc storage capacitor from being shorted through switches in different inverters. The inductance L in this figure represents the leakage inductance of each transformer and additional external inductance, if any, while the switching losses of the inverter and the copper loss of the transformer are represented by a resistance R. The iron losses of the transformer are neglected. The VSIs are operated in the hysteresis band current control mode to track the reference currents generated above. The losses in the inverter and the transformer, modeled by R, must be replenished by drawing extra real power from the source. We thus modify Eq. (13) by
To simplify Eq. (10) even further we note that i*fab = ilab −
A = −(6sb − 6sc )2 − (6sc −6sa )2 −(6sa −6sb )2 = − (6 2sab +6 2sbc + 6 2sca )
(11)
For computing i*f of Eq. (10) we need only the last column of A − 1 as the vector Pl has only one nonzero element. Let us define the adjoins of matrix A as adj A. We then have adj A(1,3)=6sb − 6sa = − 6sab adj A(2,3)=6sc − 6sb = − 6sbc adj A(3,3)=6sa − 6sc = − 6sca
(12)
Substituting Eq. (11) and Eq. (12) in Eq. (10) we finally get 6sab  P à (6 2sab + 6 2sbc +6 2sca) la6 à 6sbc i*fbc = ilbc − 2 P Ì (6 sab +6 2sbc +6 2sca) la6 à 6sca i*fca = ilca − 2 P à (6 sab +6 2sbc +6 2sca) la6 Å
i*fab =ilab −
(13)
Equation (13) forms the basis for the computation of the reference currents.
(6
2 sab
6sab (P + Ploss )Â Ã + 6 2sbc + 6 2sca) la6
à 6sbc (Pla6 + Ploss ) Ì 2 2 (6 + 6 sbc + 6 sca) à 6sca i*fca = ilca − 2 (Pla6 + Ploss ) à 2 2 (6 sab + 6 sbc + 6 sca) Å
i*fbc = ilbc −
2 sab
(14)
where Ploss represents the losses in the compensator. We now have to generate Ploss through a suitable feedback control. This feedback mechanism essentially involves regulating the dc capacitor voltage to a constant value. This is discussed below. The average capacitor voltage is held constant when the average value of the dc capacitor current over a cycle is zero. Now since Vdc = (1/Cdc ) idc dt, the deviation of Vdc from a reference value Vref at the end of each cycle gives a good indication of the deviation of the average value of capacitor current, idc from zero. We thus choose a simple proportional-plus-integral (PI) controller of the form
&
Ploss = KPe+ KI e dt
(15)
cyl where e= Vref − V cyl dc , V dc being the value of the capacitor voltage at the end of a cycle. We then substitute the
A. Ghosh, A. Joshi / Electric Power Systems Research 54 (2000) 67–74
value of Ploss obtained from the above equation in Eq. (14) to compute the reference currents. The use of three single-phase four-switch VSIs, each running from its own dc storage capacitor has also been studied. However, it is not possible to regulate the three capacitor voltages simultaneously as we have only one control variable, i.e. Ploss. It has been found that while the sum of three capacitor voltages can be regulated to a reference value, the individual values are incorrect. One of the dc capacitor voltages attains the desired value. The other two capacitor voltages increase/decrease monotonically keeping their sum constant. It is to be noted further that the compensator configuration shown in Fig. 4 has some advantages. A saving in cost is obvious as all three VSIs are running from a single capacitor instead of three. Use of transformers isolates the inverters from the load circuit and may also provide voltage adjustment by using a nonunity turns ratio.
4. Numerical results The proposed compensator scheme is validated through digital computer simulation studies using MAT-
71
LAB. The dynamics of each VSI are modeled by solving differential equations governing two modes of the inverter. The switching of the inverter is done by monitoring the reference and actual currents and comparison of error with the hysteresis band. The results are presented in this section. Three single-phase full-bridge VSI are simulated that run from a dc storage capacitor. The data used for the simulation studies are (refer Fig. 4):
System frequency= 50Hz, 6sa = 440( 2/ 3) sin (100pt)V. Cdc = 2000 mF, L= 20 mH and R= 2 V. The turns ratio of the transformers is assumed to be 1:1. The capacitor is precharged to 800 V before the three compensators are connected to the supply at time t= 0. It is to be noted that the capacitor must be precharged to sufficiently high value to obtain satisfactory tracking performance. However, increasing the capacitor voltage increases the losses in the system. Therefore the capacitor voltage level must be chosen judiciously. Similarly, the value of the inductance L controls the frequency of the inverter switching that is limited by the speed of the switching devices and the
Fig. 4. Compensator implementation scheme.
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A. Ghosh, A. Joshi / Electric Power Systems Research 54 (2000) 67–74
for plotting such that their orders are roughly same as those of the currents. It can be seen that the source currents and voltages are not in phase. Once the compensator is connected, the controller takes about 15 cycles to settle down. This is shown in Fig. 6, which depicts the controller output in (a) and the capacitor voltage in (b). It can be seen that the capacitor voltage discharges initially to supply the losses before settling down. The steady ripple in this voltage is unavoidable because of inverter switching. The compensated line currents are shown in Fig. 7 along with the scaled source voltages. It can be seen that they are in phase. The three compensator reference currents are also shown in Fig. 7 (d). As the load is balanced, these three currents have equal magnitude and are phase shifted by 120°. Fig. 5. Uncompensated system for test-1: (a) load currents (solid line for phase-ab, dashed lines for phase-bc and dotted lines for phase-ca); (b)–(d) source currents and voltages.
4.2. Test-2 An unbalanced delta connected load is considered here. The load impedances are given by: Rab = 25 V,
Lab = 0,
Rbc = 35 V,
Lbc = 30mH,
Rca = 50 V and Lca = 100mH. The uncompensated steady state load and line currents are shown in Fig. 8. The compensated source currents and voltages are shown in Fig. 9, which also depicts the instantaneous load and source powers in W. It can be seen that the source voltages and currents are in phase as expected and the source currents are balanced. Furthermore the power delivered by the source is slightly higher than the average of the load power. This is because the source is also supplying the converter losses through Eq. (14).
Fig. 6. Compensated system for test-1: (a) controller output; and (b) capacitor voltage for test-1.
power level. The hysteresis band is chosen as 0.5 A. The controller parameters are: Kp =15 and KI =0.025. Three different tests are performed. They are discussed below.
4.1. Test-1 A balanced RL-load of Rab =Rbc =Rca =35 V and Lab = Lbc = Lca =30 mH is connected across each phase of delta. The uncompensated load and line currents in A are shown in Fig. 5. In this figure the source voltages in V are scaled down by a factor of 10
Fig. 7. Compensated system for test-1: (a) – (c) source currents and voltages; and (d) compensator reference currents (solid line for ab, dashed lines for bc and dotted lines for ca)
A. Ghosh, A. Joshi / Electric Power Systems Research 54 (2000) 67–74
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Fig. 8. Uncompensated: (a) load currents; and (b) source currents for test-2.
Fig. 10. Uncompensated: (a) load currents; and (b) source currents for test-3.
Fig. 9. Compensated system for test-2: (a)–(c) source currents and voltages; and (d) load and source powers.
Fig. 11. Compensated system for test-3: (a) – (c) source currents and voltages; and (d) dc capacitor voltage.
4.3. Test-3
transformer leakage reactances. The amplitude of the harmonic components in A of the uncompensated and compensated source currents (phase-a) are shown in Fig. 12. The amplitudes of the fundamental components are 26.46 and 31.57 A for the uncompensated and compensated case, respectively. The total harmonic distortion (THD) is 9.67 and 2.73% for the uncompensated and compensated case, respectively. It can be seen that the compensator reduces the harmonic distortion considerably.
In addition to the unbalanced delta-connected load mentioned in Section 4.2 above, three single-phase fullwave uncontrolled rectifiers are connected, one across each phase. The rectifiers are drawing uneven square wave currents of amplitude 5, 6 and 4A, respectively, for phases ab, bc and ca The uncompensated steady state load and line currents are shown in Fig. 10. The compensated source currents along with the scaled source voltages and capacitor voltages are shown in Fig. 11. The notches in the source currents are as a result of sudden changes that are present in load currents because of the rectifier switching. These sudden changes in the load currents are momentarily supplied by the source, as the compensator currents cannot change instantaneously because of the presence of
5. Conclusions This paper discusses a new scheme for balancing a delta-connected load. The load is balanced such that the supply side power factor is made unity. The theory
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A. Ghosh, A. Joshi / Electric Power Systems Research 54 (2000) 67–74
The compensator structure proposed in this paper needs three single-phase transformers for isolation. This prevents the compensator from supplying dc currents. It is well known that half wave rectifiers draw dc current from source. Thus if the load contains any such rectifier the compensator may not be able to supply this demand as it might force the transformers into saturation. This however is not a deficiency of the reference current generation scheme but of the compensator structure itself. It is thus imperative to investigate further into alternative converter structures suitable for this compensation scheme, specifically for loads having dc components in current. References Fig. 12. Spectrum of source (phase-a) current: (a) uncompensated; and (b) compensated.
of instantaneous reactive power is utilized to generate the reference current waveforms that are tracked by 3 single-phase VSIs, operating in the current control mode. Through detailed simulation results it has been established that the scheme has the following advantages: (i)
It can correct the power factor to unity in the case of a balanced load. (ii) It can simultaneously correct the power factor to unity and balance the source currents for an unbalanced and harmonically polluting load. (iii) It reduces the THD for three-phase rectifier type loads. (iv) The scheme is computationally much simpler than those proposed in [1 – 3,6,7]. It does not require complex transformations of currents and voltages and many definitions of various powers [4,5]. Still it can transform an unbalanced non-linear load to took like a balanced unity power factor load on the supply side. (v) The schemes given in [1 – 3,6,7] concentrate on compensating for different kinds of reactive powers. On the other hand, the proposed scheme provides a direct and comprehensive method of obtaining balanced, unity power factor source currents for all delta type ac loads.
.
[1] H. Akagi, Y. Kanazawa, K. Fujita, A. Nabae, Generalized theory of the instantaneous reactive power and its application, Electr. Eng. Japan 103 (4) (1983) 58 – 65. [2] H. Akagi, Y. Kanazawa, A. Nabae, Instantaneous reactive power compensators comprising switching devices without energy storage components, IEEE Trans. Ind. Appl. 20 (3) (1984) 625 – 630. [3] H. Akagi, A. Nabae, S. Atoh, Control strategy of active power filters using multiple voltage-source PWM converters, IEEE Trans. Ind. Appl. 22 (3) (1986) 460 – 465. [4] A. Ferrero, G. Superti-Furga, A new approach to the definition of power components in three-phase systems under nonsinusiodal conditions, IEEE Trans. Instrum. Meas. 40 (3) (1991) 568– 577. [5] J.W. Willems, A new interpretation of the Akagi – Nabae power components for nonsinusoidal three-phase situations, IEEE Trans. Instrum. Meas. 41 (4) (1992) 523 – 527. [6] E.D. Watanabe, R.M. Stephan, M. Aredes, New concepts of instantaneous active and reactive powers in electrical systems with generic load, IEEE Trans. Power Deliv. 8 (2) (1993) 697– 703. [7] F.Z. Peng, J.S. Lai, Generalized instantaneous reactive power theory for three-phase power systems, IEEE Trans. Instrum. Meas. 45 (1) (1996) 293 – 297. [8] D.A. Torrey, M.A.M Al-Zamei, Single-phase active power filters for multiple non-linear loads, IEEE Trans. Power Electron. 10 (3) (1995) 263 – 271. [9] J.C. Wu, H.L. Jou, Simplified control method for the singlephase active power filter, Proc. IEE-Electr. Power Appl. 143 (3) (1996) 219 – 224. [10] T.J.E. Miller, in: T.J.E. Miller (Ed.), Reactive Power Control in Electric Systems, John Wiley, New York, 1982. [11] A. Ghosh, A. Joshi, A new method for load balancing and power factor correction using instantaneous symmetrical components, PE Lett. IEEE Power Eng. Rev. 18 (9) (1998) 60–62. [12] W.A. Lyon, Transient Analysis of Alternating-Current Machinery, John Wiley, New York, 1954 Chapter 2.
The use of instantaneous symmetrical components for balancing a delta connected load and power factor correction Arindam Ghosh *, Avinash Joshi Department of Electrical Engineering, Indian Institute of Technology, Kanpur India Received 29 March 1999; received in revised form 29 March 1999; accepted 17 August 1999
Abstract This paper presents a novel way of generating the reference currents for an active filter and/or a static compensator. A compensator structure is proposed which is capable of balancing an unbalanced delta-connected load that may also draw harmonic currents. In addition to balancing the load, the supply side power factor is also made unity. The theory of instantaneous symmetrical components is used here to obtain three phase reference currents that are to be tracked by the compensator in a hysteresis band control scheme. The paper demonstrates the feasibility of such as scheme through simulation studies. © 2000 Elsevier Science S.A. All rights reserved. Keywords: Load balancing; Power factor correction; Active filters; Power distribution system
1. Introduction Variable reactive power compensation of non-linear and/or poor power factor loads has gained considerable attention lately. Many techniques have been proposed to improve the supply side power factor and to cancel out the harmonics generated by power electronic loads. These schemes usually employ single/three-phase voltage source inverters (VSIs) that are supplied from a dc storage capacitor and operate in current control mode to track a specified reference current waveform. The single most important issue in any of these schemes is the generation of these reference current waveforms, which when injected to the power system, cancel out the load harmonics and/or improve the supply power factor. Of the various methods that have been proposed for generating the reference current waveforms, the instantaneous p-q theory [1 – 3] has gained considerable attention. This theory is utilized to compute the instantaneous reactive power from measured threephase voltage and load current waveforms. The VSIs are then controlled to deliver this instantaneous reactive * Corresponding author. Tel.: +91-512-587179; fax: + 91-512590063. E-mail address: [email protected] (A. Ghosh)
power. This method has been widely used in active power line conditioning. Various interpretations and/or improvements on the method have been reported in [4–7]. A simplified approach is one in which the phase of the desired source current is fixed with respect to the source voltage and the magnitude of the reference current waveform is generated from the feedback of dc storage capacitor voltage [8,9]. The loss or gain of charge stored by the capacitor is indicative of the instantaneous power balance between the source and the total load including the losses in the inverters. In an ideal situation, the compensator will supply pure reactive power. Thus a negative feedback of the capacitor voltage can be utilized to adjust the magnitude of the desired source current waveforms. These methods are simple but are only suitable for balanced or singlephase loads. The balancing of an unbalanced delta-connected load is a classical problem. An excellent description of load balancing is given in [10] in which any unbalanced reactive delta-connected network is converted into a balanced resistive delta-connected network by suitable introduction of admittance in parallel with each branch. The solution, even though aesthetically pleasing, has been carried out only for sinusoidal steadystate conditions.
0378-7796/00/$ - see front matter © 2000 Elsevier Science S.A. All rights reserved. PII: S 0 3 7 8 - 7 7 9 6 ( 9 9 ) 0 0 0 7 1 - 1
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A. Ghosh, A. Joshi / Electric Power Systems Research 54 (2000) 67–74
In this paper we utilize the theory of symmetrical components for generating reference current waveforms to balance a given load. It has been observed that the instantaneous power in an unbalanced system contains an oscillating component that rides a dc value [11]. The objective of the compensating system is to supply this zero-mean oscillating power such that the dc component can be supplied by the source. The structure of the compensating system depends on the manner in which the load is connected. In the paper we concentrate on delta-connected loads. In the next sections we shall discuss the reference current generation scheme, followed by compensator structure and its associated control for maintaining the charge on the dc capacitor. We shall validate the formulation through detailed digital computer simulation studies.
2. Generating the reference currents The basic scheme is shown in Fig. 1 in which the compensator is represented by current sources. In reality, the compensator can be implemented through three single-phase VSI that operate in current control mode and track reference currents. The aim of the scheme proposed here is to generate the three reference current waveforms for ifab, ifbc and ifca, denoted by i*fab, i*fbc and i*fca, respectively, such that the supply sees a balanced load. The scheme utilizes the measurements of the load currents ilab, ilbc, ilca and the supply side voltages 6sa, 6sb and 6sc. No assumption on the nature of the load is required here. The compensator will produce desired results as long as its bandwidth is sufficient to follow the fluctuations in the load.
2.1. Theory of instantaneous symmetrical components Let us first introduce the notion of the instantaneous symmetrical components. Let any three phase instantaneous currents be defined by ia, ib and ic. The power invariant instantaneous symmetrical components are then defined by [12]
Æi Ç Æ1 1 1 ÇÆi Ç Ã a0à à Ãà a à 1 Ãia1à = Ã1 a a 2 ÃÃib Ã
3Ã Ã È ic à Èia2Ã É È1 a 2 a à ÉÃ É Fig. 1. Schematic diagram of the compensation scheme.
(1)
where a = e j120°. It is to be noted that the instantaneous vectors ia1 and ia2 are complex conjugate of each other and ia0 is a real quantity. If the line currents are balanced, ia0 is zero. To illustrate the idea, let us consider the following three-phase unbalanced instantaneous currents, given by ia = 12 sin vt A,
ib = 33 sin (vt − 100°) A,
ic = 25 sin (vt + 90°) A
Fig. 2. Locus of instantaneous positive and negative sequence currents.
where v= 100p rad s − 1. The vectors ia1 and ia2 are computed for one cycle and the loci of the tip of these vectors are plotted in Fig. 2. In this figure, the direction of rotation of the loci is also indicated. It can be seen that these loci form a closed path. Moreover, the vector ia1 rotates in the counter clockwise direction while the vector ia2 rotates in the clockwise direction. Also, the same analysis is valid if we consider voltage signals instead of currents. For example, the locus for a balanced three-phase voltage of 20 V (peak) is also shown Fig. 2. As the voltages are balanced, this locus is a circle.
A. Ghosh, A. Joshi / Electric Power Systems Research 54 (2000) 67–74
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tion we get the following equation K1isa + (K1 cos 120°− K2 sin 120°)isb + (K1 cos 240°− K2 sin 240°)isc = 0
(4)
Expanding each term of the above equation, we get K1 =
3 (6sb − 6sc ), 2
K1 cos 120°− K2 sin 120°=
3 (6sc − 6sa ) 2
and K1 cos 240°− K2 sin 240°=
3 (6 − 6sb ) 2 sa
We can thus modify Eq. (4) as Fig. 3. Three-phase load power (solid line), source power (dashed line) and compensator power (dotted line) for an unbalanced load containing: (a) no harmonic; and (b) harmonics.
2.2. Reference compensating current generation scheme The purpose of the scheme proposed here is to generate the three reference current waveforms i*fab, i*fbc and i*fca which will then be supplied as reference to the three VSIs. To generate these three currents, three independent equations are required. To achieve this, we list the following specifications for a load balancing scheme: 1. The supply current must be balanced. 2. The supply current must be in phase with supply voltage (unity power factor). 3. The compensator is not required to supply or sink average power. In the analysis given below, we assume that the compensator tracks the reference currents perfectly, i.e., ifab =i*fab etc. Since both the load and the compensator are connected in delta, we stipulate that the compensator currents are such that the following equality holds (ilab − i*fab )+ (ilbc −i*fbc ) +(ilca −i*fca ) = 0 This implies that the circulating current in the delta is zero. Solving we get (2)
i*fab +i*fbc +i*fca =ilab +ilbc +ilca
(6sb − 6sc )isa + (6sc − 6sa )isb + (6sa − 6sb )isc = 0
Again since isa = ilab − i*fab − ilca + i*fca, isb =ilbc − i*fbc − ilab + i*fab and ise = ilca − i*fca − ilbc + i*fbc, Eq. (5) can be rewritten as (ilab − i*fab )(6sb − 26sc + 6sa )+ (ilbc − i*fbc )(6sc − 26sa +6sb ) + (ilca − i*fca )(6sa − 26sb + 6sc )= 0 Rearranging the above equation and using Eq. (2), we get 6sci*fab + 6sai*fbc + 6sbi*fca = 6scilab6sailbc + 6sbilca
6saisa + 6sbisb + 6scisc = Pla6
Ú{6sa + a6sb +a 6sc } =Ú{isa +aisb +a isc }
The above equation is rearranged to arrive at
(3)
(7)
Equation (7) can be rewritten in terms of the line-toline voltages and currents inside the delta as + (6sc − 6sa )(ilca − i*fca )= Pla6
2
(6)
If we assume a balanced load that does not contain any harmonics, the instantaneous compensator power must be equated to zero. However, to obtain a solution for a more general load, we must note that the instantaneous power in a balanced three-phase circuit is constant while for an unbalanced circuit it has a double frequency component in addition to the dc value. The objective of the compensation scheme is to generate balanced source currents and thus for balanced supply voltages, the power from the source must be constant and equal to the dc value of-the load power. In that case the compensator only supplies the zero-mean pulsating power to the load. This is illustrated in Fig. 3 (a). Therefore we obtain
To obtain a unity power factor at the source side, we stipulate that the phase of the vector isa1 must be the same as that of 6sa1 at each instant of time. From this stipulation we get 2
(5)
(6sa − 6sb )(ilab − i*fab)+ (6sb − 6sc )(ilbc − i*fbc )
Equating the angles of the above equation we get
(6sa − 6sb )i*fab + (6sb − 6sc )i*fbc + (6sc − 6sa )i*fca
isb sin 120°+isc sin 240° K = 1 isa + isb cos 120° + isc cos 240° K2
= (6sa − 6sb )ilab + (6sb − 6sc )ilbc + (6sc − 6sa )ilca − Pla6
where K1 =6sb sin 120° +6sc sin 240° and K2 =6sa + 6sb cos 120° +6sc cos 240°. Rearranging the above equa-
The average load power may be obtained from the instantaneous load power by using a Butterworth low-
(8)
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pass filter as has been suggested in [3]. However, as the cut-off frequency of the filter is relatively low, the settling time involved is fairly large (approximately one and a half cycle). A moving average (MA) filter, on the other hand, can compute Pla6 very fast and has a settling time of half a cycle following any transient. Another interesting point to noted is that any harmonic component in the load does not require any real power from the fundamental frequency source. The formulation of Eq. (7) and Eq. (8) is thus valid even when the load contains harmonics. This is shown in Fig. 3 (b) in which pulsating harmonic component (dotted curve) of the load is supplied by the compensator. Combining Eqs. (2) and (6) and Eq. (8) we get the following three independent linear algebraic time-varying equations containing the three compensating currents. These are written in vector-matrix form as Ai*f =Ail −Pl
(9)
where i*Tf =[i*fab i*fbc i*fca ], i Tl =[ilab ilbc ilca ] and P Tl = [0 0 Pla6 ] and the matrix A is given by
Æ Ç 1 1 1 à à A=à 6sc 6sa 6sb Ã Ã È (6sa − 6sb ) (6sb −6sc ) (6sc −6sa )Ã É Premultiplying both sides of Eq. (9) by A − 1 we get i*f = il − A − 1Pl
(10)
3. Compensator scheme The current sources shown in Fig. 1 can be implemented by a three-phase VSI that is operated in the hysteresis band control mode. This controller tracks the reference currents generated by Eq. (13). The standard configuration of a three-phase VSI, consisting of three poles of two switches each, is unsuitable for this purpose. As seen from Eq. (2) the sum of inverter output currents is not zero for an unbalanced load as required by this configuration. In this paper a configuration shown in Fig. 4 using a common dc capacitor is proposed. We shall further justify this choice at the end of this section. In Fig. 4 each VSI is connected to the network though an isolating transformer. The purpose of including the transformers is to provide isolation between the inverters. This prevents the dc storage capacitor from being shorted through switches in different inverters. The inductance L in this figure represents the leakage inductance of each transformer and additional external inductance, if any, while the switching losses of the inverter and the copper loss of the transformer are represented by a resistance R. The iron losses of the transformer are neglected. The VSIs are operated in the hysteresis band current control mode to track the reference currents generated above. The losses in the inverter and the transformer, modeled by R, must be replenished by drawing extra real power from the source. We thus modify Eq. (13) by
To simplify Eq. (10) even further we note that i*fab = ilab −
A = −(6sb − 6sc )2 − (6sc −6sa )2 −(6sa −6sb )2 = − (6 2sab +6 2sbc + 6 2sca )
(11)
For computing i*f of Eq. (10) we need only the last column of A − 1 as the vector Pl has only one nonzero element. Let us define the adjoins of matrix A as adj A. We then have adj A(1,3)=6sb − 6sa = − 6sab adj A(2,3)=6sc − 6sb = − 6sbc adj A(3,3)=6sa − 6sc = − 6sca
(12)
Substituting Eq. (11) and Eq. (12) in Eq. (10) we finally get 6sab  P à (6 2sab + 6 2sbc +6 2sca) la6 à 6sbc i*fbc = ilbc − 2 P Ì (6 sab +6 2sbc +6 2sca) la6 à 6sca i*fca = ilca − 2 P à (6 sab +6 2sbc +6 2sca) la6 Å
i*fab =ilab −
(13)
Equation (13) forms the basis for the computation of the reference currents.
(6
2 sab
6sab (P + Ploss )Â Ã + 6 2sbc + 6 2sca) la6
à 6sbc (Pla6 + Ploss ) Ì 2 2 (6 + 6 sbc + 6 sca) à 6sca i*fca = ilca − 2 (Pla6 + Ploss ) à 2 2 (6 sab + 6 sbc + 6 sca) Å
i*fbc = ilbc −
2 sab
(14)
where Ploss represents the losses in the compensator. We now have to generate Ploss through a suitable feedback control. This feedback mechanism essentially involves regulating the dc capacitor voltage to a constant value. This is discussed below. The average capacitor voltage is held constant when the average value of the dc capacitor current over a cycle is zero. Now since Vdc = (1/Cdc ) idc dt, the deviation of Vdc from a reference value Vref at the end of each cycle gives a good indication of the deviation of the average value of capacitor current, idc from zero. We thus choose a simple proportional-plus-integral (PI) controller of the form
&
Ploss = KPe+ KI e dt
(15)
cyl where e= Vref − V cyl dc , V dc being the value of the capacitor voltage at the end of a cycle. We then substitute the
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value of Ploss obtained from the above equation in Eq. (14) to compute the reference currents. The use of three single-phase four-switch VSIs, each running from its own dc storage capacitor has also been studied. However, it is not possible to regulate the three capacitor voltages simultaneously as we have only one control variable, i.e. Ploss. It has been found that while the sum of three capacitor voltages can be regulated to a reference value, the individual values are incorrect. One of the dc capacitor voltages attains the desired value. The other two capacitor voltages increase/decrease monotonically keeping their sum constant. It is to be noted further that the compensator configuration shown in Fig. 4 has some advantages. A saving in cost is obvious as all three VSIs are running from a single capacitor instead of three. Use of transformers isolates the inverters from the load circuit and may also provide voltage adjustment by using a nonunity turns ratio.
4. Numerical results The proposed compensator scheme is validated through digital computer simulation studies using MAT-
71
LAB. The dynamics of each VSI are modeled by solving differential equations governing two modes of the inverter. The switching of the inverter is done by monitoring the reference and actual currents and comparison of error with the hysteresis band. The results are presented in this section. Three single-phase full-bridge VSI are simulated that run from a dc storage capacitor. The data used for the simulation studies are (refer Fig. 4):
System frequency= 50Hz, 6sa = 440( 2/ 3) sin (100pt)V. Cdc = 2000 mF, L= 20 mH and R= 2 V. The turns ratio of the transformers is assumed to be 1:1. The capacitor is precharged to 800 V before the three compensators are connected to the supply at time t= 0. It is to be noted that the capacitor must be precharged to sufficiently high value to obtain satisfactory tracking performance. However, increasing the capacitor voltage increases the losses in the system. Therefore the capacitor voltage level must be chosen judiciously. Similarly, the value of the inductance L controls the frequency of the inverter switching that is limited by the speed of the switching devices and the
Fig. 4. Compensator implementation scheme.
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for plotting such that their orders are roughly same as those of the currents. It can be seen that the source currents and voltages are not in phase. Once the compensator is connected, the controller takes about 15 cycles to settle down. This is shown in Fig. 6, which depicts the controller output in (a) and the capacitor voltage in (b). It can be seen that the capacitor voltage discharges initially to supply the losses before settling down. The steady ripple in this voltage is unavoidable because of inverter switching. The compensated line currents are shown in Fig. 7 along with the scaled source voltages. It can be seen that they are in phase. The three compensator reference currents are also shown in Fig. 7 (d). As the load is balanced, these three currents have equal magnitude and are phase shifted by 120°. Fig. 5. Uncompensated system for test-1: (a) load currents (solid line for phase-ab, dashed lines for phase-bc and dotted lines for phase-ca); (b)–(d) source currents and voltages.
4.2. Test-2 An unbalanced delta connected load is considered here. The load impedances are given by: Rab = 25 V,
Lab = 0,
Rbc = 35 V,
Lbc = 30mH,
Rca = 50 V and Lca = 100mH. The uncompensated steady state load and line currents are shown in Fig. 8. The compensated source currents and voltages are shown in Fig. 9, which also depicts the instantaneous load and source powers in W. It can be seen that the source voltages and currents are in phase as expected and the source currents are balanced. Furthermore the power delivered by the source is slightly higher than the average of the load power. This is because the source is also supplying the converter losses through Eq. (14).
Fig. 6. Compensated system for test-1: (a) controller output; and (b) capacitor voltage for test-1.
power level. The hysteresis band is chosen as 0.5 A. The controller parameters are: Kp =15 and KI =0.025. Three different tests are performed. They are discussed below.
4.1. Test-1 A balanced RL-load of Rab =Rbc =Rca =35 V and Lab = Lbc = Lca =30 mH is connected across each phase of delta. The uncompensated load and line currents in A are shown in Fig. 5. In this figure the source voltages in V are scaled down by a factor of 10
Fig. 7. Compensated system for test-1: (a) – (c) source currents and voltages; and (d) compensator reference currents (solid line for ab, dashed lines for bc and dotted lines for ca)
A. Ghosh, A. Joshi / Electric Power Systems Research 54 (2000) 67–74
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Fig. 8. Uncompensated: (a) load currents; and (b) source currents for test-2.
Fig. 10. Uncompensated: (a) load currents; and (b) source currents for test-3.
Fig. 9. Compensated system for test-2: (a)–(c) source currents and voltages; and (d) load and source powers.
Fig. 11. Compensated system for test-3: (a) – (c) source currents and voltages; and (d) dc capacitor voltage.
4.3. Test-3
transformer leakage reactances. The amplitude of the harmonic components in A of the uncompensated and compensated source currents (phase-a) are shown in Fig. 12. The amplitudes of the fundamental components are 26.46 and 31.57 A for the uncompensated and compensated case, respectively. The total harmonic distortion (THD) is 9.67 and 2.73% for the uncompensated and compensated case, respectively. It can be seen that the compensator reduces the harmonic distortion considerably.
In addition to the unbalanced delta-connected load mentioned in Section 4.2 above, three single-phase fullwave uncontrolled rectifiers are connected, one across each phase. The rectifiers are drawing uneven square wave currents of amplitude 5, 6 and 4A, respectively, for phases ab, bc and ca The uncompensated steady state load and line currents are shown in Fig. 10. The compensated source currents along with the scaled source voltages and capacitor voltages are shown in Fig. 11. The notches in the source currents are as a result of sudden changes that are present in load currents because of the rectifier switching. These sudden changes in the load currents are momentarily supplied by the source, as the compensator currents cannot change instantaneously because of the presence of
5. Conclusions This paper discusses a new scheme for balancing a delta-connected load. The load is balanced such that the supply side power factor is made unity. The theory
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The compensator structure proposed in this paper needs three single-phase transformers for isolation. This prevents the compensator from supplying dc currents. It is well known that half wave rectifiers draw dc current from source. Thus if the load contains any such rectifier the compensator may not be able to supply this demand as it might force the transformers into saturation. This however is not a deficiency of the reference current generation scheme but of the compensator structure itself. It is thus imperative to investigate further into alternative converter structures suitable for this compensation scheme, specifically for loads having dc components in current. References Fig. 12. Spectrum of source (phase-a) current: (a) uncompensated; and (b) compensated.
of instantaneous reactive power is utilized to generate the reference current waveforms that are tracked by 3 single-phase VSIs, operating in the current control mode. Through detailed simulation results it has been established that the scheme has the following advantages: (i)
It can correct the power factor to unity in the case of a balanced load. (ii) It can simultaneously correct the power factor to unity and balance the source currents for an unbalanced and harmonically polluting load. (iii) It reduces the THD for three-phase rectifier type loads. (iv) The scheme is computationally much simpler than those proposed in [1 – 3,6,7]. It does not require complex transformations of currents and voltages and many definitions of various powers [4,5]. Still it can transform an unbalanced non-linear load to took like a balanced unity power factor load on the supply side. (v) The schemes given in [1 – 3,6,7] concentrate on compensating for different kinds of reactive powers. On the other hand, the proposed scheme provides a direct and comprehensive method of obtaining balanced, unity power factor source currents for all delta type ac loads.
.
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