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Thermal effects in packaging high power light emitting diode arrays
Applied Thermal Engineering 29 (2009) 364–371
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Applied Thermal Engineering journal homepage: www.elsevier.com/locate/apthermeng
Thermal effects in packaging high power light emitting diode arrays Adam Christensen, Samuel Graham * Woodruff School of Mechanical Engineering, Georgia Institute of Technology, Atlanta, GA, USA
a r t i c l e
i n f o
Article history: Received 26 June 2007 Accepted 2 March 2008 Available online 17 March 2008 Keywords: High power light emitting diodes Thermal management Array Heat dissipation
a b s t r a c t The package and system level temperature distributions of a high power (>1 W) light emitting diode (LED) array have been investigated using numerical heat flow models. For this analysis, a thermal resistor network model was combined with a 3D finite element submodel of an LED structure to predict system and die level temperatures. The impact of LED array density, LED power density, and active versus passive cooling methods on device operation were calculated. In order to help understand the role of various thermal resistances in cooling such compact arrays, the thermal resistance network was analyzed in order to estimate the contributions from materials as well as active and passive cooling schemes. Finally, an analysis of a ceramic packaging architecture is performed in order to give insight into methods to reduce the packaging resistance for high power LEDs. Ó 2008 Published by Elsevier Ltd.
1. Introduction The thermal management of LEDs for general illumination applications is of primary importance to their reliability and efficiency. In considering the thermal management of high power LEDs, two main challenges must be considered. First, while a single device consumes relatively low power, large heat fluxes exist at the die level, being on the order of 300 W/cm2 or greater. Such high heat fluxes often require excellent heat spreaders at the die level in order to help dissipate such concentrated heat loads. Second, since the luminous output of an individual high power LED is insufficient to replace a traditional light source, multiple LEDs are necessary for general illumination. With the use of large LED arrays, it is possible to generate large heat loads at the system level which can cause challenges for overall heat dissipation, especially when cooling requirements call for passive methods. These two challenges work together to cause elevated LED die temperatures, which have been linked to lower quantum efficiencies, shorter lifetimes, emission wavelength shifts and catastrophic device failure [1–4]. It has been predicted previously that the lifetime of a device decays exponentially as the temperature increases. This can result in a lifetime decrease from 42,000 h to 18,000 h when the device temperature increases from 40 °C to 50 °C [1]. In general, approximately 90% or more of the thermal energy is directly dissipated from the LED die through conduction as opposed to radiation as seen in incandescent sources [5]. Thus, materials which are used in the packaging of LEDs play a major role in the resistance to thermal dissipation. At the system level, * Corresponding author. Tel.: +1 404 894 2264; fax: +1 404 894 8496. E-mail addresses: [email protected] (A. Christensen), sgraham@ me.gatech.edu (S. Graham). 1359-4311/$ - see front matter Ó 2008 Published by Elsevier Ltd. doi:10.1016/j.applthermaleng.2008.03.019
convection to the surrounding environment is the primary method for thermal dissipation and can occur through either natural or active means. Due to the potential for LEDs to serve as robust energy efficient light sources, it is quite desirable to use thermal management solutions which require little or no added power for cooling. Due to such constraints, options such as heat sinks cooled by natural convection are often preferred for use in buildings where energy savings are the primary driver. However, the growing heat loads of high powered compact light sources have made such cooling solutions difficult to implement. Currently, the highest luminous flux from a single device is 170 lm/lamp which falls short of the typical light output seen from traditional general illumination light sources [6]. In order to compete with traditional light sources such as incandescent and fluorescent bulbs that typically offer more that 3000 lm/lamp in luminous flux, an array of more than 20 power LEDs is required and needs to dissipate a total of 20–125 W. Thus, it is important to have an understanding of the thermal solutions, which can be employed with compact high power lighting sources for general illumination, and when active cooling schemes are necessary for reliable operation of such light sources [7–14]. In this work we present an analysis of the system and die level temperature distributions in a compact light source consisting of 25 high power LEDs mounted on an aluminum core heat spreader. This compact array was used to represent a light engine producing between 3000 and 4000 lm. The system level temperatures were solved using a finite element analysis in a 3D environment as well as with a thermal resistor network model [15]. In addition, a package level submodel was developed to compute the local die level temperatures using a 3D finite element code. The impact of convection cooling methods (passive or active) as well as LED spacing on maximum operational power (limited by LED junction temperature) was
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analyzed for a fixed LED package geometry. A parametric study on the impact of packaging architecture and packaging materials on LED performance was also performed. Finally, a closer analysis of the developed 1D thermal network model was performed to estimate the magnitude of various thermal resistances in the LED array to determine which are the most critical for thermal management. These methods and their results are discussed in detail in the following sections. 2. Thermal modeling approach A light source consisting of 25 high power LEDs arranged in square array on an aluminum board dissipating 25–125 W was chosen as our model system. Cooling of this array of LEDs was simulated by varying the convection heat transfer coefficient that would be representative of natural convection, forced air convection and other active cooling methods. In this study a compact, finned, aluminum heat spreader geometry was investigated for its heat dissipation potential. In each analysis that was performed, a square array (5 5) of high power LEDs was mounted to the surface. The overall dimensions of the aluminum board (kAL = 202.4 W/m K) were 10 cm 10 cm. To increase heat dissipation from these aluminum boards, 1 cm tall fins were added to the rear side to decrease convection resistance. LEDs were attached to the center of one side of the aluminum board with a separation distance of 1 mm, 3 mm, and 5 mm as defined in Fig. 1. As a result of the multiple scales involved in this problem, separate package models have been developed in order to calculate the temperature gradients inside of a standard package (die bonded to a metal slug) and a high power compatible package (ceramic submount). The overall goals of the analysis are to characterize the potential for heat dissipation in different convection regimes. 2.1. System level modeling 2.1.1. Natural convection cooling A system level model approach was used in order to determine the effectiveness of dissipating the generated heat in natural convection and forced convection conditions. A finned aluminum board with mounted LEDs exposed to natural convection was analyzed using a 3D finite element method as shown in Fig. 2; results were also verified with a thermal resistor network model. The natural convection boundary conditions were applied by using standard correlations to calculate a convection coefficient for the upper and lower heated surfaces [16]. With these models it was then possible to calculate a range of allowable driving powers per lamp so as to induce a junction temperature less than 130 °C; for all models an ambient temperature of 26.8 °C was assumed. This maximum temperature was selected based on the maximum operational temperature of currently available LEDs. It is understood that this maximum die temperature may be decreased in order to increase LED lifetime. The junction temperature was solved for by including a simple thermal resistance model into
Fig. 1. Definition of the separation distance. In this analysis, w = 1 mm, h = 1 cm, and d = 1.5 mm. The overall outer dimensions of the heatsink are 10 cm 10 cm.
Fig. 2. A rendering of the heatsink under investigation. It was possible to only model 1/4 of the total geometry due to symmetry in the layout.
the FEA model. The thermal resistance included effects of a thermal interface material at the board-package junction and an overall junction-to-board resistance of 9 K/W was used and is based on a commercially available device [6]. 2.1.2. Forced convection cooling The next step in the modeling hierarchy represented the aluminum heat spreader under forced convection conditions. The aluminum board acted as a carrier and heat spreader for the 25 high power LEDs. The average heat transfer coefficient was varied from 10 W/m2K to 100 W/m2K, which can be realized by forced air free stream velocities in the range from 1.5 m/s to 20 m/s. These convection conditions were, again, applied to a finite element model for the three different separations (1 mm, 3 mm, and 5 mm) as well as three different power dissipations per lamp (1 W, 3 W, and 5 W). The bulk fluid motion around the fins causes the thermal resistance to decrease to levels where higher power (3 W and 5 W) devices can be operated while maintaining acceptable free stream velocities. The decrease in backside convection resistance also made it possible to decrease the separation of the devices thus allowing high light output boards to be made more compactly. 2.2. Package level modeling It was mentioned previously that as a result of the multiple scales of interest in this analysis, it can be difficult to model the full system as well as chip level details in its entirety with a single finite element program. Therefore information from the system level analysis was used as a boundary condition for a refined model of the packaged die. The bridge between the two levels was implemented through the average temperature at the contact area of the aluminum board where the LEDs were mounted as seen in Fig. 3. All surfaces of the LED package exposed to convective airflow were considered adiabatic. Calculations which relaxed this adiabatic assumption showed that less than 2% of the total heat dissipated was lost through the epoxy lens and exposed package areas due to convection, due to the low thermal resistance pathway off
Fig. 3. A cartoon outlining the package modeling methodology used to calculate temperature distribution in the package. Adiabatic boundaries were chosen due to the very low thermal conductivity of encapsulant materials used to protect the die.
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the backside of the package. Therefore the heat dissipation path has been assumed to be only through the bottom of the package and out to ambient conditions through the heat sink; radiative effects have been ignored in this analysis. The temperature distribution in two different package designs was studied in order to obtain information about their thermal resistances. Package A consisted of an enclosure with a lens containing a phosphor converter, the die attachment point, electrical connections to the LED chip, as well as housing materials. In this case the die is directly bonded to a metal slug that is embedded into the housing material. It may be necessary in this package design to provide electrical isolation prior to bonding of the die to the metal. Package B was constructed from a high thermal conductivity ceramic material that the LED die could be directly bonded to due to its dielectric properties (ceramic submount), therefore reducing the thermal resistance of the system. An exploded view of the geometries chosen for this study is shown in Fig. 4. A finite element model was created for the above geometries in order to capture the subtle effects of heat spreading in a threedimensional structure. It was assumed that there was no heat flow through the wire bonds and that the material properties were independent of temperature. Using this model it was possible to solve the familiar 3D energy equation (1) for the temperature distribution and heat fluxes. *
*
r ðkð r ÞrTð r ÞÞ ¼ 0:
ð1Þ
By imposing the backside temperature and the heat flux at the die attach location the average die temperature can be calculated. The thermal resistance can then be found by R = DT/Q. The package thermal resistance has been calculated when various ultra high thermal conductivity composites have been incorporated into the first package design. Examples of typical thermal conductivities reported for advanced composites and ceramic materials are shown in Table 1.
Table 1 Advanced packaging material properties given in [25] and [26] Material
Thermal conductivity (W/m K)
Copper/Molybdenum/Copper Epoxy resin Al matrix w/continuous carbon fibers Epoxy resin w/graphite fibers Copper matrix w/diamond particles AlN b-Si3N4 b-BN BP
182 1.7 218 370 600 350 155 760 350
dielectric epoxy layer, and spreading resistance. The full LED array resistor network is shown in Fig. 6. In this array the RLED resistor represents all the contributing effects found in Fig. 5. The heatsink thermal resistance has been calculated assuming that a nearly constant temperature condition exists at the base of the fins. This condition is obtained easily if the material thermal conductivity is very large or the LEDs are nearly uniform in spacing. Included in the analysis of the RLED term from Fig. 6 was a thin epoxy coating that is used to define the electrical connections on the board. This thin layer was assumed to be one dimensional due to the low thermal conductivity of the material. Any additional heat spreading due to the electrical traces patterned onto the epoxy has been neglected in this analysis. In order to model the spreading resistance the 3D heat equation can be solved and an expression for the thermal resistance can be derived for a variety of boundary conditions, the details of which are located in [17]. The boundary conditions were chosen to be adiabatic on all surfaces of the cube except for the heat flux input from the LED and then a convective boundary on the backside of the spreader. These conditions model a LED in the middle of an array of similar devices. Convection off the top-side of the heatsink was also included in the Rheatsink term.
2.3. Thermal resistance network model 2.4. Light output model While it is possible to perform a number of finite element models in a relatively short period of time, it becomes difficult to predict more general trends due to the computational time needed to perform a parametric analysis. With information about the thermal resistance of both package designs it was possible to build a simple thermal resistance model that describes the junction-to-ambient thermal resistance. The overall package thermal resistance includes several system parameters that contribute in different ways. In development of the thermal design the relative contribution of each thermal resistor to the network was investigated. By studying individual resistors it is possible to suggest improvements that can greatly enhance the overall ability of the package to dissipate heat. The representative resistance network that was developed for the junction-to-board is shown in Fig. 5 and shows contributions from the die, die bonding material, package, thermal interface material,
In contrast to traditional systems that rely on fluorescent or incandescent light sources, where the light output is nearly temperature independent, LEDs suffer from decreased light output as the junction temperature increases. As a result it is critical to consider both thermal aspects of the lighting system design and the consequences that it has on the total light output. In order to model the total lumen output from the arrays the characteristics from a commercially available cool white emitter were assumed [6]. Key performance parameters included the behavior of the relative light output as a function of junction temperature ðclm Þ and the coefficient of luminous flux as a function of forward current (kf). Both of these parameters have been normalized to a junction temperature of 25 °C and 350 mA forward current. By combining these two parameters the lumen degradation coefficient (clm) can be calculated by the following relationship: clm ¼ kf clm ;
Fig. 4. (A) Exploded view of the standard LED package. The LED chip is bonded to the metal slug with a 50 lm thick layer of solder in order to provide an efficient heat removal path. (B) Depiction of a directly bonded ceramic submount package, constructed from high thermal conductivity ceramics.
ð2Þ
where clm has units of %/°C. By assuming in these calculations that the LED emits 60 lm at a junction temperature of 25 °C and a forward current of 350 mA, the lumen degradation coefficient can be recast with units of lm/°C. It was found that the 1 W, 3 W, and 5 W LEDs have lumen degradation coefficients of 0.108 lm/°C, 0.228 lm/°C, and 0.318 lm/°C, respectively. Other manufacturers have similar lumen degradation coefficients but due to differences in the luminous efficacy other LED lamps may have larger absolute luminous fluxes. Using the appropriate temperatures solved for with the finite element model the effect on the light output of cooling situations can be estimated as shown in the following section.
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Fig. 5. Resistor network model of the LED packaging system. All resistors have degrees of freedom in their design however the epoxy dielectric layer was fixed to be 1.42 K/W, which represents a 100 lm thick layer of epoxy (k = 1.4 W/m K). The die bond thermal resistance was fixed to be 1.67 K/W (50 lm thick and a k = 30 W/m K) and the chip substrate is assumed to be a thinned sapphire wafer with a room temperature k = 35 W/m K and a thickness of 100 lm. The thermal interface material was assumed to be a material with a resistance of 2.2 106 m2 K/W.
Fig. 6. The thermal resistor network for the entire array of LEDs placed on the heat sink. The heatsink thermal resistance was calculated with the assumption that a nearly uniform temperature exists at the base of the fins. This condition is easily realized as long as the LEDs are nearly uniform in spacing across the upper surface of the heatsink.
3. Modeling results 3.1. System level results 3.1.1. Finned heat sink with natural convection As stated previously, the use of natural convection is desired since it requires no additional input power to cool the system. Based on the 10 cm 10 cm array with 1 cm separation it is possible to operate the array at 1 W while maintaining reasonable junction temperatures. This limitation is a direct result of the individual LED temperature fields overlapping as well as the large thermal resistance of the heat sink. See Fig. 7. 3.1.2. Finned heat sink with forced convection The use of forced convection conditions allowed for a decrease in the heat sink thermal resistance and allows devices to operate at >1 W and >3000 lm, which makes them competitive against cur-
rent lighting systems. The model shown previously used the average convection coefficients that were calculated from flat plate natural convection boundary conditions in order to investigate the effect of a compact fin design. The results of the forced convection calculations are shown in Figs. 8–10. Throughout all of these results the junction temperature was calculated taking into account a thermal interface material with a thermal resistance of 0.038 K/W and a package resistance of 9 K/W. It can be seen from these previous graphs that it is possible to operate the 25 LED array at powers up to 5 W and luminous fluxes over 3500 lm, however in order to dissipate the heat that is generated the convection coefficient must be >50 W/m2 K for tightly packed devices (1 mm separation distance). In all the geometries the light output is a stronger function of emitter forward current than convection coefficient when h > 30 W/m2 K. It is stressed that when buoyancy cooling schemes are proposed the light output may vary by large amounts due to natural fluctuations in the environment surrounding the system. The heat sink that was created for these simulations was designed for compact light sources. However, lower thermal resistances can be realized at the sacrifice of form factor. With the added area from the heat sink it would be possible to further decrease the necessary free stream velocity. This situation would be attractive since there is a limit as to how high the convection coefficient can be increased due to the unrealistic fluid velocities that would be encountered. As an alternative to high velocity forced air convection other technologies like single or two phase liquid cooling or flat heat pipes can be implemented [18–21]. It has been shown that flat heat pipes (FHP) offer minimal spreading resistances as a result of high effective thermal conductivities [20,22]. By minimizing the spreading resistance of the heat sink it is possible to utilize the entire convective surface area more efficiently; temperature non-uniformities arise when a finned heat structure is used (see Figs. 10 and 11). Of course the use of a FHP is in itself not the total solution; the heat pipe must be paired with an effective heat sink design. However, there is an opportunity to build the heat pipe directly into the heat sink by substituting the FHP for more the more traditional solid aluminum heat spreader and attaching fins to the condenser side [23]. Other system permutations could include optimizing a flat heat pipe stack with different working fluids in order to increase the heat transfer to ambient [24]. This system would allow for extraneous thermal resistances in the array to be minimized in order to handle heat fluxes at the system level >10 W/cm2 [19]. In order to determine when these other technologies are necessary investments the same system described earlier is used in order to quantify the effect of a general backside thermal resistance on the junction temperature of the LED. In this analysis the previous results were converted from a convection coefficient applied to a heatsink design to an overall heatsink thermal resistance. See Fig. 12. 3.2. Package modeling results
Fig. 7. Junction temperature as a function of input power for the 25 LED array outlined in Fig. 2. Due to the large convective resistance from the natural convection it is only possible to power the array at 1 W/LED.
In the cases that have been presented thus far it is apparent that the convective resistance must decrease in order to operate high power devices reliably. As the convective conditions increase in
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Fig. 8. Junction temperature of high power LEDs as a function of convective thermal resistance for an array of 25 LEDs separated by 1 cm. The horizontal line represents the proposed operational temperature. The full FEA model and the thermal resistance network model agree well with all power levels. Also shown is the predicted light output for the entire array as a function of the convection coefficient.
Fig. 9. Junction temperature of high power LEDs as a function of convective thermal resistance for an array of 25 LEDs separated by 5 mm. The horizontal line represents the proposed operational temperature. The small deviations from the FEA model and the thermal resistance network model are a result of a non-uniform temperature distribution at the base of the fins. Also shown is the predicted light output for the entire array as a function of the convection coefficient.
Fig. 10. Junction temperature of high power LEDs as a function of convective thermal resistance for an array of 25 LEDs separated by 1 mm. The horizontal line represents the proposed operational temperature. The deviations from the FEA model and the thermal resistance network model are a result of a non-uniform temperature distribution at the base of the fins. Also shown is the predicted light output for the entire array as a function of the convection coefficient.
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Fig. 11. The non-uniform temperature distribution in the fins highlights areas of the heat sink that could be utilized for additional heat dissipation. This particular temperature distribution in only the heat sink is for the 1 mm separation distance array operating at 5 W/LED and a convection coefficient of 50 W/m2 K.
Fig. 13. Package heat spreader thermal resistance as a function of slug material thermal conductivity or type of ceramic used. The circle data represents package (A) as depicted in Fig. 4, the square data represents package (B).
Fig. 12. Junction temperature as a function of a generalized heat sink thermal resistance. The yellow shaded region is representative of a thermal resistance obtainable with traditional heat sinks and forced air convection. The blue shaded region is representative of a thermal resistance obtainable with flat heat pipes or very high convective heat transfer coefficients found in two phase cooling. In this analysis a Rpackage = 9 K/W and RTIM = 0.038 K/W was used. (For interpretation of the references in color in this figure legend, the reader is referred to the web version of this article.)
efficiency the overall contribution of the package resistance to the system resistance increases. In order to continue to improve the performance of the LED the chip carrier thermal design must be carefully investigated. To ensure acceptable operating temperatures under power loads of >5 W/LED, which can arise when more than one die is mounted in a chip carrier, several high thermal conductivity materials were (Table 1) made into low thermal resistance chip carriers. Fig. 13 shows the relationship between the thermal resistance of the package design and the thermal conductivity of the material used. As expected it is possible to decrease the thermal resistance by incorporating high thermal conductivity materials. It can be seen that there is a further decrease in the thermal resistance when a shift to Package B is made. This decrease is due to the dielectric nature of ceramics; it would be possible to eliminate any electrical isolation layers present that would add a thermal resistor to the system. These isolation layers are usually epoxy based materials and therefore have a low thermal conductivity and even though they are thin its contribution to the overall thermal resistance can be significant. A sample temperature distribution is shown in
Fig. 14. A representative temperature distribution taken as a slice through the middle of the standard LED package design (package (A), Fig. 4). In this case, the die is operating at 3 W under a convection coefficient of 75 W/m2 K on the 1 cm separation distance heat sink array. All surfaces of the model were considered adiabatic except for the constant temperature bottom surface at the attachment point.
Fig. 15. A sample temperature distribution in the chip on board ceramic based package (package (B), Fig. 4). The die has a diameter of 8 mm and a thickness of 0.5 mm and is operating at 3 W under a convection coefficient of 75 W/m2 K on the 1 cm separation distance heat sink array. Again, all surfaces of the model were considered adiabatic except for the constant temperature bottom surface at the attachment point.
Fig. 14 for a package that has incorporated high thermal conductivity composites so that kslug = 500 W/m K. See Fig. 15. 4. Parametric analysis results With information that was collected from the previous sections it was possible to investigate the effects of packing density of
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A. Christensen, S. Graham / Applied Thermal Engineering 29 (2009) 364–371 Table 2 Thermal resistor breakdown for a high power LED packaging situation Low velocity forced air (h = 10 W/m2 K)
Low velocity forced air (h = 10 W/m2 K)
Resistor
Magnitude (K/W)
Resistor
Magnitude (K/W)
R R R R R R R
2.85 1.66 0.917 0.038 1.42 0.275 1.11
R R R R R R R
2.85 1.66 0.817 0.038 N/A 0.275 1.106
3.19 W/LED
Power dissipated
(die) (die-bond) (package) (TIM) (epoxy) (spread) (heatsink design)
Power dissipated
(die) (die-bond) (package) (TIM) (epoxy) (spread) (heatsink design)
3.33 W/LED
The left table corresponds to package design (A) and the right table corresponds to package design (B).
Fig. 16. Spreading resistance of a flat plate (2 mm thick) heat spreader as a function of convection condition and material.
Fig. 17. Maximum power dissipated for a junction temperature of 130 °C for various packing densities of high power LED components on a square flat plate heat sink under different convection conditions. The blue region is considered to be obtainable with current technologies, while the yellow region presents new challenges for efficient heat removal. (For interpretation of the references in color in this figure legend, the reader is referred to the web version of this article.)
devices on a finned heatsink. In addition, it is also possible to answer questions related to material choices and placement within the system. The thermal resistance network that was outlined previously was used in order to perform a parametric analysis. While aluminum was assumed to be used for the heat spreader in the other models it is possible that metal matrix composites could be used to aid in heat spreading. The graph in Fig. 16 shows only the spreading thermal resistance. It can be seen from here that the spreading resistance is only a weak function of the convection coefficient on the backside. However, it also shows that once the thermal conductivity of the spreader is >300 W/m K there is not much change in the thermal resistance. As a result of this a material such as aluminum or copper with a moderate thermal conductivity can be used in place of much more expensive metal matrix composites. As an aid to designing an array of LEDs the dimension of the heat sink has been converted to a packing density of LEDs per 10 cm 10 cm area and the maximum power dissipated by the LED has been calculated. For this particular run the convection
coefficient was varied from 5 W/m2 K to 500 W/m2 K. The heat spreader was assumed to be constructed of aluminum, and a TIM material, whose properties were outlined previously, were used for consistency. Knowing that the LED’s operational junction temperature was 130 °C the maximum power dissipated by the device can be calculated from the results of the resistor network. The packing density of LEDs and the maximum power dissipated has been plotted in Fig. 17 for a number of cases. It can be seen from this graph that for very high power devices (>5 W/LED) it is necessary to reduce the convection coefficient resistance by utilizing high velocity forced air convection or other high heat flux removal technologies. To further understand the relationship between all of the resistors two representative cases were investigated. For the following runs the Rpackage term was calculated using the Package A design that incorporated a slug material with kslug = 500 W/m K, for comparison a system that included Package B was analyzed. The detailed breakdown of the value of the resistors for convection coefficients of 10 W/m2 K is shown in Table 2 for both package designs. Results were compared with a finite element simulation and found to agree, suggesting that the thermal resistance network that was created captures all prominent heat flow patterns. By incorporating the second package design into the thermal resistance model and running the analysis with the same parameters as outlined previously it was possible to see how the direct die attach method enhanced the performance. As a result of the dielectric nature of the ceramic package it was possible to eliminate the resistance due to the epoxy isolation layer. An increase in the power dissipation per LED is realized at even at low convection coefficients due to the relative contribution of the package to the total thermal resistance of the system. 5. Conclusions Compact high power LED arrays require considerable attention in order to produce high luminous output while limiting junction temperature rise. The analysis shown suggests that active cooling of high power LED arrays will most likely be necessary to operate within a maximum temperature limit of 130 °C. For increased lifetimes, this junction temperature will be reduced, requiring additional demands on the thermal management solution. New packaging architectures like chip on board configurations provide additional improvement to package resistance. With low convective heat transfer coefficients, the main thermal resistance in the system arises from the convection off the backside of the heat sink. However, under forced convection or liquid cooling, the resistances from the package, thermal interface materials and the electrical trace layer (constructed of an epoxy dielectric) contribute strongly to the overall thermal resistance. Therefore in order to increase the luminous flux for compact high power LED arrays, attention must
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be focused on providing the highest convective heat transfer coefficients possible (within reasonable energy constraints) while improving the packaging design. Thus, the consideration of solutions such as flat heat pipes, forced air convection, and liquid cooling will be of primary importance to the development of high power compact LED arrays. Acknowledgements The authors would like thank Thomas Beecham and Abe Greenstein for valuable discussions concerning this work. References [1] N. Narendran, Y. Gu, Life of LED-based white light sources, IEEE/OSA Journal of Display Technology 1 (1) (2005) 167–170. [2] N. Narendran, Y. Gu, J.P. Freyssinier, H. Yu, L. Deng, Solid-state lighting: failure analysis of white LEDs, Journal of Crystal Growth 268 (2004) 449–456. [3] N. Narendran, Y. Gu, R. Hosseinzadeh, Estimating junction temperature of high-flux white LEDs, in: Proceedings of SPIE – The International Society for Optical Engineering, San Jose, CA, United States, 2004, pp. 158–160. [4] M. Arik, C. Becker, S. Weaver, J. Petroski, Thermal management of LEDs: package to system, in: Proceedings of SPIE – The International Society for Optical Engineering, San Diego, CA, United States, 2004, pp. 64–75. [5] J. Petroski, Spacing of high-brightness LEDs on metal substrate PCB’s for proper thermal performance, in: Thermomechanical Phenomena in Electronic Systems – Proceedings of the Intersociety Conference, Las Vegas, NV, United States, 2004, pp. 507–514. [6] Lumileds, Technical Datasheet DS51 Power Light Source Lexon K2 Emitter, 2006.. [7] J.J. Xu, Y.-F. Wu, S. Keller, G. Parish, S. Heikman, B.J. Thibeault, U.K. Mishra, R.A. York, 1–8-GHz GaN-based power amplifier using flip-chip bonding, IEEE Microwave and Guided Wave Letters 9 (7) (1999) 277. [8] C.D. Patel, Backside cooling solution for high power flip chip multi-chip modules, in: Proceedings Electronic Components and Technology Conference, Washington, DC, USA, 1994, p. 442. [9] S.L. Lee, Z.H. Yang, Y. Hsyua, Cooling of a heated surface by mist flow, Journal of Heat Transfer 116 (1) (1994) 167. [10] J.Y. Murthy, C.H. Amon, K. Gabriel, P. Kumta, S.C. Yao, D. Boyalakuntla, C.C. Hsieh, A. Jain, S.V.J. Narumanchi, K. Rebello, C.F. Wu, MEMS-based thermal management of electronics using spray impingement, in: Advances in Electronic Packaging, Kauai, Hi, United States, 2001, p. 733.
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[11] Z. Ma, X. Wang, D. Zhu, S. Liu, Thermal analysis and modeling of LED arrays integrated with an innovative liquid-cooling module, in: 6th International Conference on Electronics Packaging Technology, Dameisha, Shenzhen, China, 2005, p. 1564677. [12] M.W. Shin, Thermal design of high-power LED package and system, in: Proceedings of SPIE – The International Society for Optical Engineering, Gwangju, South Korea, 2006, p. 635509. [13] O. Kuckmann, High power LED arrays special requirements on packaging technology, in: Proceedings of SPIE – The International Society for Optical Engineering, San Jose, CA, United States, 2006, p. 613404. [14] S. Liu, T. Lin, X. Luo, M. Chen, X. Jiang, A microjet array cooling system for thermal management of active radars and high-brightness LEDs, San Diego, CA, United States, 2006, p. 1634–1638. [15] Comsol Multiphysics, 2007. www.comsol.com. [16] F. Incropera, Introduction to Heat Transfer, fourth ed., Wiley & Sons, New York, 2002. [17] M.M. Yovanovich, Y.S. Muzychka, J.R. Culham, Spreading resistance of isoflux rectangles and strips on compound flux channels, Journal of Thermophysics and Heat Transfer 13 (4) (1999) 495–500. [18] Z.J. Zuo, M.T. North, K.L. Wert, High heat flux heat pipe mechanism for cooling of electronics, IEEE Transactions on Components and Packaging Technologies 24 (2) (2001) 220–225. [19] Y. Wang, G.P. Peterson, Investigation of a novel flat heat pipe, Journal of Heat Transfer 127 (2) (2005) 165–170. [20] Y. Avenas, C. Gillot, A. Bricard, C. Schaeffer, On the use of flat heat pipes as thermal spreaders in power electronics cooling, in: IEEE Annual Power Electronics Specialists Conference, Cairns, Australia, 2002, pp. 753–757. [21] Y. Cao, M. Gao, J.E. Beam, B. Donovan, Experiments and analyses of flat miniature heat pipes, Journal of Thermophysics and Heat Transfer 11 (2) (1997) 158–164. [22] R. Boukhanouf, A. Haddad, M.T. North, C. Buffone, Experimental investigation of a flat plate heat pipe performance using IR thermal imaging camera, Applied Thermal Engineering 26 (17–18) (2006) 2148–2156. [23] J. Schulz-Harder, J.B. Dezord, C. Schaeffer, Y. Avenas, O. Puig, A. Rogg, K. Exel, A. Utz-Kistner, DBC (direct bond copper) substrate with integrated flat heat pipe, in: Annual IEEE Semiconductor Thermal Measurement and Management Symposium, Dallas, TX, United States, 2006, pp. 152–155. [24] G. Carbajal, C.B. Sobhan, G.P. Peterson, D.T. Queheillalt, H.N.G. Wadley, Thermal response of a flat heat pipe sandwich structure to a localized heat flux, International Journal of Heat and Mass Transfer 49 (21–22) (2006) 4070– 4081. [25] C. Zweben, Emerging Low Cost LED Thermal Management Materials, in: Fourth International Conference on Solid State Lighting, SPIE 49th International Symposium on Optical Science and Technology, Denver, CO, 2004, pp. 1–16. [26] S. Shinde, High Thermal Conductivity Materials, Springer, New York, 2006.
Contents lists available at ScienceDirect
Applied Thermal Engineering journal homepage: www.elsevier.com/locate/apthermeng
Thermal effects in packaging high power light emitting diode arrays Adam Christensen, Samuel Graham * Woodruff School of Mechanical Engineering, Georgia Institute of Technology, Atlanta, GA, USA
a r t i c l e
i n f o
Article history: Received 26 June 2007 Accepted 2 March 2008 Available online 17 March 2008 Keywords: High power light emitting diodes Thermal management Array Heat dissipation
a b s t r a c t The package and system level temperature distributions of a high power (>1 W) light emitting diode (LED) array have been investigated using numerical heat flow models. For this analysis, a thermal resistor network model was combined with a 3D finite element submodel of an LED structure to predict system and die level temperatures. The impact of LED array density, LED power density, and active versus passive cooling methods on device operation were calculated. In order to help understand the role of various thermal resistances in cooling such compact arrays, the thermal resistance network was analyzed in order to estimate the contributions from materials as well as active and passive cooling schemes. Finally, an analysis of a ceramic packaging architecture is performed in order to give insight into methods to reduce the packaging resistance for high power LEDs. Ó 2008 Published by Elsevier Ltd.
1. Introduction The thermal management of LEDs for general illumination applications is of primary importance to their reliability and efficiency. In considering the thermal management of high power LEDs, two main challenges must be considered. First, while a single device consumes relatively low power, large heat fluxes exist at the die level, being on the order of 300 W/cm2 or greater. Such high heat fluxes often require excellent heat spreaders at the die level in order to help dissipate such concentrated heat loads. Second, since the luminous output of an individual high power LED is insufficient to replace a traditional light source, multiple LEDs are necessary for general illumination. With the use of large LED arrays, it is possible to generate large heat loads at the system level which can cause challenges for overall heat dissipation, especially when cooling requirements call for passive methods. These two challenges work together to cause elevated LED die temperatures, which have been linked to lower quantum efficiencies, shorter lifetimes, emission wavelength shifts and catastrophic device failure [1–4]. It has been predicted previously that the lifetime of a device decays exponentially as the temperature increases. This can result in a lifetime decrease from 42,000 h to 18,000 h when the device temperature increases from 40 °C to 50 °C [1]. In general, approximately 90% or more of the thermal energy is directly dissipated from the LED die through conduction as opposed to radiation as seen in incandescent sources [5]. Thus, materials which are used in the packaging of LEDs play a major role in the resistance to thermal dissipation. At the system level, * Corresponding author. Tel.: +1 404 894 2264; fax: +1 404 894 8496. E-mail addresses: [email protected] (A. Christensen), sgraham@ me.gatech.edu (S. Graham). 1359-4311/$ - see front matter Ó 2008 Published by Elsevier Ltd. doi:10.1016/j.applthermaleng.2008.03.019
convection to the surrounding environment is the primary method for thermal dissipation and can occur through either natural or active means. Due to the potential for LEDs to serve as robust energy efficient light sources, it is quite desirable to use thermal management solutions which require little or no added power for cooling. Due to such constraints, options such as heat sinks cooled by natural convection are often preferred for use in buildings where energy savings are the primary driver. However, the growing heat loads of high powered compact light sources have made such cooling solutions difficult to implement. Currently, the highest luminous flux from a single device is 170 lm/lamp which falls short of the typical light output seen from traditional general illumination light sources [6]. In order to compete with traditional light sources such as incandescent and fluorescent bulbs that typically offer more that 3000 lm/lamp in luminous flux, an array of more than 20 power LEDs is required and needs to dissipate a total of 20–125 W. Thus, it is important to have an understanding of the thermal solutions, which can be employed with compact high power lighting sources for general illumination, and when active cooling schemes are necessary for reliable operation of such light sources [7–14]. In this work we present an analysis of the system and die level temperature distributions in a compact light source consisting of 25 high power LEDs mounted on an aluminum core heat spreader. This compact array was used to represent a light engine producing between 3000 and 4000 lm. The system level temperatures were solved using a finite element analysis in a 3D environment as well as with a thermal resistor network model [15]. In addition, a package level submodel was developed to compute the local die level temperatures using a 3D finite element code. The impact of convection cooling methods (passive or active) as well as LED spacing on maximum operational power (limited by LED junction temperature) was
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analyzed for a fixed LED package geometry. A parametric study on the impact of packaging architecture and packaging materials on LED performance was also performed. Finally, a closer analysis of the developed 1D thermal network model was performed to estimate the magnitude of various thermal resistances in the LED array to determine which are the most critical for thermal management. These methods and their results are discussed in detail in the following sections. 2. Thermal modeling approach A light source consisting of 25 high power LEDs arranged in square array on an aluminum board dissipating 25–125 W was chosen as our model system. Cooling of this array of LEDs was simulated by varying the convection heat transfer coefficient that would be representative of natural convection, forced air convection and other active cooling methods. In this study a compact, finned, aluminum heat spreader geometry was investigated for its heat dissipation potential. In each analysis that was performed, a square array (5 5) of high power LEDs was mounted to the surface. The overall dimensions of the aluminum board (kAL = 202.4 W/m K) were 10 cm 10 cm. To increase heat dissipation from these aluminum boards, 1 cm tall fins were added to the rear side to decrease convection resistance. LEDs were attached to the center of one side of the aluminum board with a separation distance of 1 mm, 3 mm, and 5 mm as defined in Fig. 1. As a result of the multiple scales involved in this problem, separate package models have been developed in order to calculate the temperature gradients inside of a standard package (die bonded to a metal slug) and a high power compatible package (ceramic submount). The overall goals of the analysis are to characterize the potential for heat dissipation in different convection regimes. 2.1. System level modeling 2.1.1. Natural convection cooling A system level model approach was used in order to determine the effectiveness of dissipating the generated heat in natural convection and forced convection conditions. A finned aluminum board with mounted LEDs exposed to natural convection was analyzed using a 3D finite element method as shown in Fig. 2; results were also verified with a thermal resistor network model. The natural convection boundary conditions were applied by using standard correlations to calculate a convection coefficient for the upper and lower heated surfaces [16]. With these models it was then possible to calculate a range of allowable driving powers per lamp so as to induce a junction temperature less than 130 °C; for all models an ambient temperature of 26.8 °C was assumed. This maximum temperature was selected based on the maximum operational temperature of currently available LEDs. It is understood that this maximum die temperature may be decreased in order to increase LED lifetime. The junction temperature was solved for by including a simple thermal resistance model into
Fig. 1. Definition of the separation distance. In this analysis, w = 1 mm, h = 1 cm, and d = 1.5 mm. The overall outer dimensions of the heatsink are 10 cm 10 cm.
Fig. 2. A rendering of the heatsink under investigation. It was possible to only model 1/4 of the total geometry due to symmetry in the layout.
the FEA model. The thermal resistance included effects of a thermal interface material at the board-package junction and an overall junction-to-board resistance of 9 K/W was used and is based on a commercially available device [6]. 2.1.2. Forced convection cooling The next step in the modeling hierarchy represented the aluminum heat spreader under forced convection conditions. The aluminum board acted as a carrier and heat spreader for the 25 high power LEDs. The average heat transfer coefficient was varied from 10 W/m2K to 100 W/m2K, which can be realized by forced air free stream velocities in the range from 1.5 m/s to 20 m/s. These convection conditions were, again, applied to a finite element model for the three different separations (1 mm, 3 mm, and 5 mm) as well as three different power dissipations per lamp (1 W, 3 W, and 5 W). The bulk fluid motion around the fins causes the thermal resistance to decrease to levels where higher power (3 W and 5 W) devices can be operated while maintaining acceptable free stream velocities. The decrease in backside convection resistance also made it possible to decrease the separation of the devices thus allowing high light output boards to be made more compactly. 2.2. Package level modeling It was mentioned previously that as a result of the multiple scales of interest in this analysis, it can be difficult to model the full system as well as chip level details in its entirety with a single finite element program. Therefore information from the system level analysis was used as a boundary condition for a refined model of the packaged die. The bridge between the two levels was implemented through the average temperature at the contact area of the aluminum board where the LEDs were mounted as seen in Fig. 3. All surfaces of the LED package exposed to convective airflow were considered adiabatic. Calculations which relaxed this adiabatic assumption showed that less than 2% of the total heat dissipated was lost through the epoxy lens and exposed package areas due to convection, due to the low thermal resistance pathway off
Fig. 3. A cartoon outlining the package modeling methodology used to calculate temperature distribution in the package. Adiabatic boundaries were chosen due to the very low thermal conductivity of encapsulant materials used to protect the die.
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the backside of the package. Therefore the heat dissipation path has been assumed to be only through the bottom of the package and out to ambient conditions through the heat sink; radiative effects have been ignored in this analysis. The temperature distribution in two different package designs was studied in order to obtain information about their thermal resistances. Package A consisted of an enclosure with a lens containing a phosphor converter, the die attachment point, electrical connections to the LED chip, as well as housing materials. In this case the die is directly bonded to a metal slug that is embedded into the housing material. It may be necessary in this package design to provide electrical isolation prior to bonding of the die to the metal. Package B was constructed from a high thermal conductivity ceramic material that the LED die could be directly bonded to due to its dielectric properties (ceramic submount), therefore reducing the thermal resistance of the system. An exploded view of the geometries chosen for this study is shown in Fig. 4. A finite element model was created for the above geometries in order to capture the subtle effects of heat spreading in a threedimensional structure. It was assumed that there was no heat flow through the wire bonds and that the material properties were independent of temperature. Using this model it was possible to solve the familiar 3D energy equation (1) for the temperature distribution and heat fluxes. *
*
r ðkð r ÞrTð r ÞÞ ¼ 0:
ð1Þ
By imposing the backside temperature and the heat flux at the die attach location the average die temperature can be calculated. The thermal resistance can then be found by R = DT/Q. The package thermal resistance has been calculated when various ultra high thermal conductivity composites have been incorporated into the first package design. Examples of typical thermal conductivities reported for advanced composites and ceramic materials are shown in Table 1.
Table 1 Advanced packaging material properties given in [25] and [26] Material
Thermal conductivity (W/m K)
Copper/Molybdenum/Copper Epoxy resin Al matrix w/continuous carbon fibers Epoxy resin w/graphite fibers Copper matrix w/diamond particles AlN b-Si3N4 b-BN BP
182 1.7 218 370 600 350 155 760 350
dielectric epoxy layer, and spreading resistance. The full LED array resistor network is shown in Fig. 6. In this array the RLED resistor represents all the contributing effects found in Fig. 5. The heatsink thermal resistance has been calculated assuming that a nearly constant temperature condition exists at the base of the fins. This condition is obtained easily if the material thermal conductivity is very large or the LEDs are nearly uniform in spacing. Included in the analysis of the RLED term from Fig. 6 was a thin epoxy coating that is used to define the electrical connections on the board. This thin layer was assumed to be one dimensional due to the low thermal conductivity of the material. Any additional heat spreading due to the electrical traces patterned onto the epoxy has been neglected in this analysis. In order to model the spreading resistance the 3D heat equation can be solved and an expression for the thermal resistance can be derived for a variety of boundary conditions, the details of which are located in [17]. The boundary conditions were chosen to be adiabatic on all surfaces of the cube except for the heat flux input from the LED and then a convective boundary on the backside of the spreader. These conditions model a LED in the middle of an array of similar devices. Convection off the top-side of the heatsink was also included in the Rheatsink term.
2.3. Thermal resistance network model 2.4. Light output model While it is possible to perform a number of finite element models in a relatively short period of time, it becomes difficult to predict more general trends due to the computational time needed to perform a parametric analysis. With information about the thermal resistance of both package designs it was possible to build a simple thermal resistance model that describes the junction-to-ambient thermal resistance. The overall package thermal resistance includes several system parameters that contribute in different ways. In development of the thermal design the relative contribution of each thermal resistor to the network was investigated. By studying individual resistors it is possible to suggest improvements that can greatly enhance the overall ability of the package to dissipate heat. The representative resistance network that was developed for the junction-to-board is shown in Fig. 5 and shows contributions from the die, die bonding material, package, thermal interface material,
In contrast to traditional systems that rely on fluorescent or incandescent light sources, where the light output is nearly temperature independent, LEDs suffer from decreased light output as the junction temperature increases. As a result it is critical to consider both thermal aspects of the lighting system design and the consequences that it has on the total light output. In order to model the total lumen output from the arrays the characteristics from a commercially available cool white emitter were assumed [6]. Key performance parameters included the behavior of the relative light output as a function of junction temperature ðclm Þ and the coefficient of luminous flux as a function of forward current (kf). Both of these parameters have been normalized to a junction temperature of 25 °C and 350 mA forward current. By combining these two parameters the lumen degradation coefficient (clm) can be calculated by the following relationship: clm ¼ kf clm ;
Fig. 4. (A) Exploded view of the standard LED package. The LED chip is bonded to the metal slug with a 50 lm thick layer of solder in order to provide an efficient heat removal path. (B) Depiction of a directly bonded ceramic submount package, constructed from high thermal conductivity ceramics.
ð2Þ
where clm has units of %/°C. By assuming in these calculations that the LED emits 60 lm at a junction temperature of 25 °C and a forward current of 350 mA, the lumen degradation coefficient can be recast with units of lm/°C. It was found that the 1 W, 3 W, and 5 W LEDs have lumen degradation coefficients of 0.108 lm/°C, 0.228 lm/°C, and 0.318 lm/°C, respectively. Other manufacturers have similar lumen degradation coefficients but due to differences in the luminous efficacy other LED lamps may have larger absolute luminous fluxes. Using the appropriate temperatures solved for with the finite element model the effect on the light output of cooling situations can be estimated as shown in the following section.
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Fig. 5. Resistor network model of the LED packaging system. All resistors have degrees of freedom in their design however the epoxy dielectric layer was fixed to be 1.42 K/W, which represents a 100 lm thick layer of epoxy (k = 1.4 W/m K). The die bond thermal resistance was fixed to be 1.67 K/W (50 lm thick and a k = 30 W/m K) and the chip substrate is assumed to be a thinned sapphire wafer with a room temperature k = 35 W/m K and a thickness of 100 lm. The thermal interface material was assumed to be a material with a resistance of 2.2 106 m2 K/W.
Fig. 6. The thermal resistor network for the entire array of LEDs placed on the heat sink. The heatsink thermal resistance was calculated with the assumption that a nearly uniform temperature exists at the base of the fins. This condition is easily realized as long as the LEDs are nearly uniform in spacing across the upper surface of the heatsink.
3. Modeling results 3.1. System level results 3.1.1. Finned heat sink with natural convection As stated previously, the use of natural convection is desired since it requires no additional input power to cool the system. Based on the 10 cm 10 cm array with 1 cm separation it is possible to operate the array at 1 W while maintaining reasonable junction temperatures. This limitation is a direct result of the individual LED temperature fields overlapping as well as the large thermal resistance of the heat sink. See Fig. 7. 3.1.2. Finned heat sink with forced convection The use of forced convection conditions allowed for a decrease in the heat sink thermal resistance and allows devices to operate at >1 W and >3000 lm, which makes them competitive against cur-
rent lighting systems. The model shown previously used the average convection coefficients that were calculated from flat plate natural convection boundary conditions in order to investigate the effect of a compact fin design. The results of the forced convection calculations are shown in Figs. 8–10. Throughout all of these results the junction temperature was calculated taking into account a thermal interface material with a thermal resistance of 0.038 K/W and a package resistance of 9 K/W. It can be seen from these previous graphs that it is possible to operate the 25 LED array at powers up to 5 W and luminous fluxes over 3500 lm, however in order to dissipate the heat that is generated the convection coefficient must be >50 W/m2 K for tightly packed devices (1 mm separation distance). In all the geometries the light output is a stronger function of emitter forward current than convection coefficient when h > 30 W/m2 K. It is stressed that when buoyancy cooling schemes are proposed the light output may vary by large amounts due to natural fluctuations in the environment surrounding the system. The heat sink that was created for these simulations was designed for compact light sources. However, lower thermal resistances can be realized at the sacrifice of form factor. With the added area from the heat sink it would be possible to further decrease the necessary free stream velocity. This situation would be attractive since there is a limit as to how high the convection coefficient can be increased due to the unrealistic fluid velocities that would be encountered. As an alternative to high velocity forced air convection other technologies like single or two phase liquid cooling or flat heat pipes can be implemented [18–21]. It has been shown that flat heat pipes (FHP) offer minimal spreading resistances as a result of high effective thermal conductivities [20,22]. By minimizing the spreading resistance of the heat sink it is possible to utilize the entire convective surface area more efficiently; temperature non-uniformities arise when a finned heat structure is used (see Figs. 10 and 11). Of course the use of a FHP is in itself not the total solution; the heat pipe must be paired with an effective heat sink design. However, there is an opportunity to build the heat pipe directly into the heat sink by substituting the FHP for more the more traditional solid aluminum heat spreader and attaching fins to the condenser side [23]. Other system permutations could include optimizing a flat heat pipe stack with different working fluids in order to increase the heat transfer to ambient [24]. This system would allow for extraneous thermal resistances in the array to be minimized in order to handle heat fluxes at the system level >10 W/cm2 [19]. In order to determine when these other technologies are necessary investments the same system described earlier is used in order to quantify the effect of a general backside thermal resistance on the junction temperature of the LED. In this analysis the previous results were converted from a convection coefficient applied to a heatsink design to an overall heatsink thermal resistance. See Fig. 12. 3.2. Package modeling results
Fig. 7. Junction temperature as a function of input power for the 25 LED array outlined in Fig. 2. Due to the large convective resistance from the natural convection it is only possible to power the array at 1 W/LED.
In the cases that have been presented thus far it is apparent that the convective resistance must decrease in order to operate high power devices reliably. As the convective conditions increase in
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Fig. 8. Junction temperature of high power LEDs as a function of convective thermal resistance for an array of 25 LEDs separated by 1 cm. The horizontal line represents the proposed operational temperature. The full FEA model and the thermal resistance network model agree well with all power levels. Also shown is the predicted light output for the entire array as a function of the convection coefficient.
Fig. 9. Junction temperature of high power LEDs as a function of convective thermal resistance for an array of 25 LEDs separated by 5 mm. The horizontal line represents the proposed operational temperature. The small deviations from the FEA model and the thermal resistance network model are a result of a non-uniform temperature distribution at the base of the fins. Also shown is the predicted light output for the entire array as a function of the convection coefficient.
Fig. 10. Junction temperature of high power LEDs as a function of convective thermal resistance for an array of 25 LEDs separated by 1 mm. The horizontal line represents the proposed operational temperature. The deviations from the FEA model and the thermal resistance network model are a result of a non-uniform temperature distribution at the base of the fins. Also shown is the predicted light output for the entire array as a function of the convection coefficient.
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Fig. 11. The non-uniform temperature distribution in the fins highlights areas of the heat sink that could be utilized for additional heat dissipation. This particular temperature distribution in only the heat sink is for the 1 mm separation distance array operating at 5 W/LED and a convection coefficient of 50 W/m2 K.
Fig. 13. Package heat spreader thermal resistance as a function of slug material thermal conductivity or type of ceramic used. The circle data represents package (A) as depicted in Fig. 4, the square data represents package (B).
Fig. 12. Junction temperature as a function of a generalized heat sink thermal resistance. The yellow shaded region is representative of a thermal resistance obtainable with traditional heat sinks and forced air convection. The blue shaded region is representative of a thermal resistance obtainable with flat heat pipes or very high convective heat transfer coefficients found in two phase cooling. In this analysis a Rpackage = 9 K/W and RTIM = 0.038 K/W was used. (For interpretation of the references in color in this figure legend, the reader is referred to the web version of this article.)
efficiency the overall contribution of the package resistance to the system resistance increases. In order to continue to improve the performance of the LED the chip carrier thermal design must be carefully investigated. To ensure acceptable operating temperatures under power loads of >5 W/LED, which can arise when more than one die is mounted in a chip carrier, several high thermal conductivity materials were (Table 1) made into low thermal resistance chip carriers. Fig. 13 shows the relationship between the thermal resistance of the package design and the thermal conductivity of the material used. As expected it is possible to decrease the thermal resistance by incorporating high thermal conductivity materials. It can be seen that there is a further decrease in the thermal resistance when a shift to Package B is made. This decrease is due to the dielectric nature of ceramics; it would be possible to eliminate any electrical isolation layers present that would add a thermal resistor to the system. These isolation layers are usually epoxy based materials and therefore have a low thermal conductivity and even though they are thin its contribution to the overall thermal resistance can be significant. A sample temperature distribution is shown in
Fig. 14. A representative temperature distribution taken as a slice through the middle of the standard LED package design (package (A), Fig. 4). In this case, the die is operating at 3 W under a convection coefficient of 75 W/m2 K on the 1 cm separation distance heat sink array. All surfaces of the model were considered adiabatic except for the constant temperature bottom surface at the attachment point.
Fig. 15. A sample temperature distribution in the chip on board ceramic based package (package (B), Fig. 4). The die has a diameter of 8 mm and a thickness of 0.5 mm and is operating at 3 W under a convection coefficient of 75 W/m2 K on the 1 cm separation distance heat sink array. Again, all surfaces of the model were considered adiabatic except for the constant temperature bottom surface at the attachment point.
Fig. 14 for a package that has incorporated high thermal conductivity composites so that kslug = 500 W/m K. See Fig. 15. 4. Parametric analysis results With information that was collected from the previous sections it was possible to investigate the effects of packing density of
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A. Christensen, S. Graham / Applied Thermal Engineering 29 (2009) 364–371 Table 2 Thermal resistor breakdown for a high power LED packaging situation Low velocity forced air (h = 10 W/m2 K)
Low velocity forced air (h = 10 W/m2 K)
Resistor
Magnitude (K/W)
Resistor
Magnitude (K/W)
R R R R R R R
2.85 1.66 0.917 0.038 1.42 0.275 1.11
R R R R R R R
2.85 1.66 0.817 0.038 N/A 0.275 1.106
3.19 W/LED
Power dissipated
(die) (die-bond) (package) (TIM) (epoxy) (spread) (heatsink design)
Power dissipated
(die) (die-bond) (package) (TIM) (epoxy) (spread) (heatsink design)
3.33 W/LED
The left table corresponds to package design (A) and the right table corresponds to package design (B).
Fig. 16. Spreading resistance of a flat plate (2 mm thick) heat spreader as a function of convection condition and material.
Fig. 17. Maximum power dissipated for a junction temperature of 130 °C for various packing densities of high power LED components on a square flat plate heat sink under different convection conditions. The blue region is considered to be obtainable with current technologies, while the yellow region presents new challenges for efficient heat removal. (For interpretation of the references in color in this figure legend, the reader is referred to the web version of this article.)
devices on a finned heatsink. In addition, it is also possible to answer questions related to material choices and placement within the system. The thermal resistance network that was outlined previously was used in order to perform a parametric analysis. While aluminum was assumed to be used for the heat spreader in the other models it is possible that metal matrix composites could be used to aid in heat spreading. The graph in Fig. 16 shows only the spreading thermal resistance. It can be seen from here that the spreading resistance is only a weak function of the convection coefficient on the backside. However, it also shows that once the thermal conductivity of the spreader is >300 W/m K there is not much change in the thermal resistance. As a result of this a material such as aluminum or copper with a moderate thermal conductivity can be used in place of much more expensive metal matrix composites. As an aid to designing an array of LEDs the dimension of the heat sink has been converted to a packing density of LEDs per 10 cm 10 cm area and the maximum power dissipated by the LED has been calculated. For this particular run the convection
coefficient was varied from 5 W/m2 K to 500 W/m2 K. The heat spreader was assumed to be constructed of aluminum, and a TIM material, whose properties were outlined previously, were used for consistency. Knowing that the LED’s operational junction temperature was 130 °C the maximum power dissipated by the device can be calculated from the results of the resistor network. The packing density of LEDs and the maximum power dissipated has been plotted in Fig. 17 for a number of cases. It can be seen from this graph that for very high power devices (>5 W/LED) it is necessary to reduce the convection coefficient resistance by utilizing high velocity forced air convection or other high heat flux removal technologies. To further understand the relationship between all of the resistors two representative cases were investigated. For the following runs the Rpackage term was calculated using the Package A design that incorporated a slug material with kslug = 500 W/m K, for comparison a system that included Package B was analyzed. The detailed breakdown of the value of the resistors for convection coefficients of 10 W/m2 K is shown in Table 2 for both package designs. Results were compared with a finite element simulation and found to agree, suggesting that the thermal resistance network that was created captures all prominent heat flow patterns. By incorporating the second package design into the thermal resistance model and running the analysis with the same parameters as outlined previously it was possible to see how the direct die attach method enhanced the performance. As a result of the dielectric nature of the ceramic package it was possible to eliminate the resistance due to the epoxy isolation layer. An increase in the power dissipation per LED is realized at even at low convection coefficients due to the relative contribution of the package to the total thermal resistance of the system. 5. Conclusions Compact high power LED arrays require considerable attention in order to produce high luminous output while limiting junction temperature rise. The analysis shown suggests that active cooling of high power LED arrays will most likely be necessary to operate within a maximum temperature limit of 130 °C. For increased lifetimes, this junction temperature will be reduced, requiring additional demands on the thermal management solution. New packaging architectures like chip on board configurations provide additional improvement to package resistance. With low convective heat transfer coefficients, the main thermal resistance in the system arises from the convection off the backside of the heat sink. However, under forced convection or liquid cooling, the resistances from the package, thermal interface materials and the electrical trace layer (constructed of an epoxy dielectric) contribute strongly to the overall thermal resistance. Therefore in order to increase the luminous flux for compact high power LED arrays, attention must
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