Thermal management of microwave power heterojunction bipolar transistors

Solid-State Electronics Vol. 41, No. 10, pp. 1667-1673, 1997

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Publishedby ElsevierScienceLtd. All rights reserved Printed in Great Britain 0038-1101/97 $17.00+ 0.00

Pergamon

PII: S0038-1101(97)00121-4

THERMAL MANAGEMENT OF MICROWAVE POWER HETEROJUNCTION BIPOLAR TRANSISTORS C. BOZADA t, C. CERNY I, G. DE SALVO I, R. DETTMEW, J. EBEL 1, J. GILLESPIE I, C. HAVASY t, T. JENKINS I, C. ITO 1, K. N A K A N O 1, C. PETTIFORD l, T. QUACH 1, J. SEWELL l, G. D. VIA j and R. A N H O L T 2 ~Wright Laboratory (WL/AADD), 2241 Avionics Circle RM C2G69, Wright-Patterson Air Force Base, Ohio 45433-7322, U.S.A. 2Gateway Modeling, Inc., 1604 East River Terrace, Minneapolis, MN 55414, U.S.A. (Rece&ed 24 August 1996)

Abstract A comprehensive study of the device layout effects on thermal resistance in thermally-shunted heterojunction bipolar transistors (HBTs) was completed. The thermal resistance scales linearly with emitter dot diameter for single element HBTs. For multiple emitter element devices, the thermal resistance scales with area. HBTs with dot geometrics have lower thermal impedance than bar HBTs with equivalent emitter area. The thermal resistance of a 200 #m 2 emitter area device was reduced from 266°C/W to 146°C/W by increasing the shunt thickness from 3/~m to 20/~m and placing a thermal shunt landing between the fingers. Also, power-added etticiencies at 10 GHz were improved from 30% to 68% by this thermal resistance reduction. Published by Elsevier Science Ltd

1. INTRODUCTION The efficient removal of heat from III-V heterojunction bipolar transistors (HBTs) during microwave power operation continues to be a critical research area for future performance gains and improved reliability[I-5]. HBTs have great potential to generate highly-efficient, linear power at microwave frequencies. The best reported power results are 10 mW pm -2 at 10 GHz[6] and 4 mW #m -2 at 25 GHz[7]. Recently we achieved 73% power-added efficiency at a power density of 8 . 4 m W # m -2 at 10 GHz. These high output power densities coupled with the low thermal :onductivity of the GaAs substrate can cause significant self-heating during operation. The effects of poor thermal management are readily apparent. The worst outcome is catastrophic failure. Next is the onset of thermal collapse[8]. Power transistor designs require the use of multiple ~,mitter elements combined in parallel which are susceptible to thermal instabilities. The instability 9ccurs when one emitter element heats up more than .he others and draws all the device current effectively :urning off the other elements. Even in thermally stable devices, high junction temperature lowers the :l.c. gain of the device and hence the microwave ~erformance. Reliability is also reduced by higher unction temperatures. Various thermal management techniques were :leveloped to overcome the device's thermal limi:ations. One approach is the use of ballast resistors[3]. ?his approach prevents the onset of thermal collapse 3y reducing the voltage drop across the base--emitter

junction under high current (runaway) conditions, but ballasting does not lower the junction temperature of the transistor, so it is not a true thermal management technique and it is not discussed any further in this article. However, all HBTs have non-zero emitter and base resistance so the ballast effect is always present to some extent and therefore the effects of ballasting must be understood. Most thermal management approaches fall into two categories; substrate thinning and top-side removal of heat. Good thermal management provides a low thermal resistance path from the heat source(s) to the heat sink(s). Other factors to be considered are fabrication complexity, circuit integration, and R F parasitics. Also, the microwave operating conditions (quiescent bias, drive level, pulsed or continuous-wave) must be taken into consideration.

2.WAFERTHINNING All backside heat sinks require heat to flow through the substrate. One method to reduce the device thermal resistance is to make the substrate as thin as possible[9]. Simulations of a single element HBT (2 x 50/~m~)[3] predict that the substrate thickness needs to be thinned to < 10/~m to obtain thermal resistance improvements. The utility of this approach is greater for larger area devices[l]. Wafer thinning approaches include; whole substrate thinning, selectively thinning the substrate beneath the active areas (bathtubs)[10,11], or peeling the active layer from the substrate and mounting it on a low

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thermal conductivity carrier such as diamond, Si, or A1N[12]. The success of each of these alternatives requires good thermal contact to the heat sink. All three approaches potentially reduce device yield because of the difficulty of these fabrication techniques.

3. TOP-SIDE HEAT REMOVAL Another thermal approach is to replace (or complement) the heat path through the substrate with a topside one. A high thermal conductivity path through the top of the device can be achieved by using thick contact matallizations and/or depositing a non-electrically conducting, low-thermal resistance material such as diamond on the surface. Although diamond coating of the topside is potentially the most effective solution, technological challenges exist to deposit a high-quality, non-conductive film on conventional HBTs without degrading them. The most effective place to extract heat (from the emitter, base or collector contact) depends on device epitaxy, geometry, and layout. In an emitter-up HBT, the emitter seems to be the best place to draw heat out since this metallization is closest to the heat source (the heat is generated in the volume defined by the collector length and the emitter-base junction area[21]). However, typical microwave power HBTs have InGaAs, A1GaAs, or InGaP in the emitter epitaxial layers. The thermal resistance for these ternary materials are up to 10 times greater than GaAs, and their inclusion increases the thermal resistance from the heat source to the emitter metallization. One study[3] showed that a significant percentage of the heat loss for their HBT was through the base contact. Once a good top-side heat path is formed, the heat can be directed toward a heat sink directly (fiip-chip)[13-15] or redirected through the substrate using a larger area to the backside heat sink (thermal shunt). Practical implementations of the thermal shunt and flip-chip approach have proven effective[14]. Recently, a direct comparison[15] of a thermally-shunted device with a backside heat sink to the same device with a frontside heat sink was completed. The flip-chip thermal resistance measurement was a 37% lower than the backside heat sink measurement. However, the actual thermal resistances were not reported so a direct comparison to this work is not possible.

4. THERMALLY-SHUNTED HILTS

Wright Laboratory introduced the thermallyshunted HBT in 199216]. Since then the thermallyshunted HBT technology was demonstrated at several other locations. Excellent power density[17], linearity[ll], power-added efficiency, and noise figure[16] were demonstrated. A detailed description

of our fabrication technology was presented previously[19]. Figure 1 is a schematic of a thermally-shunted HBT with sixteen 4 p r o diameter dot emitter elements. A thick gold bridge (3-20 pm) connects the elements to each other and to the ground test pads. The base metal (2000 A thick) is self aligned to the emitter and overlaps the emitter dots by 1/~m. The collector metal is interdigitated with the base fingers and surrounds the base metal on three sides. The epitaxy structure for a typical power structure is listed in Table 1. Figure 2 is a focused ion beam image of a cross-section of an actual device. A comprehensive study was completed to study the effect of layout on thermal management. The effect of increasing emitter dot diameter, adding base fingers, increasing thermal shunt thickness, and changing device layout were studied. Thermal resistance was measured using a technique similar to Dawson's method. Our test configuration requires an emitter ground, so collector current was forced rather than emitter current. The error in calculating power is negligible because the current gains are over 30. A series of base voltages are forced at a constant collector current density (50,000 A cm -2) and the collector voltage is measured. The slopes and intercepts of the V~ vs power curves are determined for two chuck temperatures (25°C and 50°C). The thermal impedance is the ratio of the slope to the change in the intercept with respect to temperature. The procedure was fully automated for on-wafer measurements. Thermal resistance measurements for 3000 transistors at two temperatures require less than 12 h to complete. The normalized thermal resistance or the specific thermal resistance is a useful parameter for comparisons. The emitter area is a reasonable normalization factor because the heat sources are approximately confined to the volume defined by the collector depletion thickness and the emitter area[21]. Also, in practice, the maximum collector voltages are defined by the collector-emitter breakdown voltage and the maximum collector currents in mA #m -2, so power is measured in m W p m - L Hence, the normalized thermal resistances provide an easy way to compute the temperature rise. 5. THERMAL RESISTANCERESULTSAND DISCUSSION 5.1. Dependence of the emitter diameter

Figure 3 is a plot of thermal resistance and specific thermal resistance vs dot diameter for single element transistors with diameters ranging from 3 to 16/~m. Using superposition and the method of images technique[2,21], one can show that the specific thermal resistance for thick wafers in the absence of shunts is directly proportional to the diameter. The proportionality constant is a measure of thermal management effectiveness. The more effective the technology, the lower the proportionality constant.

Thermal management of microwave power heterojunction bipolar transistors Devices with no thermal shunt were modeled and the proportionality constant was 10,000~'C-/~mW ~. The measured results for a 20/~m thick shunt gave a proportionality constant of 2,637~C-#m W -j, which is approximately 25% of the unshunted value. Since the thermal resistance is a function of the total emitter area as well as the emitter diameter, devices were fabricated with the emitter dot diameter

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varied (2 10/~m) but the total emitter area kept constant (80/~m2). All the devices had 2 base fingers except the 10/~m diameter dot HBT which had a single emitter. The devices with the smaller diameters had significantly lower thermal resistance (Fig. 4). The 2pm-diameter HBT had less than half the thermal resistance of the l0/~m device. A transistor with 2 3 x 13 #m-' emitter bars is also plotted in Fig.

Collector

ag

X-X' CROSS-SECTION - Across several fingers

Thermal $ Emitter Airbridge

dot

Thermal shunt thickness

Y-Y' CROSS-SECTION - Through single finger Fig. 1. Device schematic for a dot configuration thermally-shunted HBT.

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Table 1. Epitaxial layers for microwavepower HBT Doping Thickness Layer x (cm-3) (pm) I n G a A s cap lnGaAs Grading G a A s Emitter cont. A1GaAs G r a d i n g A I G a A s Emitter G a A s Base: C G a A s Collector G a A s Subcollector Buffer Semi-insulating substrate

0.5 0.5--*0.0 0.0 0.0~0.35 0.35 0.00 0.00 0.00 0.30 0.00

3 1 5 5 5 5 1 3

x x x × x × × x

10 +19 10 +~9 10 ÷~8 10 +17 10 +17 10 +19 10 +t6 10 ÷l~ ---

0.03 0.025 0.05 0.05 0.05 0.07 1.0 1.0 0.3 500

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1200

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000

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7

~ 2104

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4. The thermal resistance of the equivalent dot HBT is less than two thirds that of the bar device. The obvious conclusion is separating the active area into as many small elements is the most desirable for lowering the thermal resistance. However, trade-offs with electrical performance and manufacturability are required to choose the ideal diameter[20]. 5.2 Dependence on the number of fingers Ideally, output power can be scaled by increasing the emitter area. A c o m m o n scaling design is to add more fingers. Figure 5 is a plot of thermal resistance versus area for dot and bar HBTs. The area was increased by adding fingers. The dot HBTs consisted of four 4/~m diameter emitters on each base finger. Each finger had an emitter area of 50 p m 2. A single

5

10

15

'

'

0 20

Diameter [l~m]

Fig. 3. Normalized and unnormalized thermal resistance for one dot HBTs with varying diameters.

4 p m dot HBT is also plotted to scale the area down further. The specific thermal resistances increase linearly with area for the 5 0 p m 2 HBTs. The comparison between a single dot HBT and the one finger HBT (Area = 12.5 and 50 # m 2 respectively), show a nonlinear dependence which is attributed to the increased self-heating for multiple dots on one finger. The bar devices used 3 × 13 # m s emitters. Consistent with the constant area study, the bar transistor's thermal resistances are always higher than the dot transistors.

Fig. 2. Focused ion beam image of cross-section of thermally-shunted HBT.

Thermal management of microwave power heterojunction bipolar transistors

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6 10 4

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5 104 ~

+

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4104 250

r ...... Y

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o

200 150 100

~

3 104

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SO 0 0

2

4

6

8

10

12

0

50

100

Diameter [I.Lm]

150

200

250

300

Area [l.u'n2]

Fig. 4. Thermal resistance for 80 #m2 HBTs with varying diameters.

Fig. 6. Normalized thermal resistances for increasing area for devices with different shunt thicknesses.

5.3 Dependence of thermal shunt thickness

increased dot separation increases the base-collector junction area which increases the base-collector capacitance (which reduces the power performance of the device significantly). The fact that good thermal resistance can be obtained using a small dot separation is encouraging. The next experiment was to change the finger separation. The standard separation is 26 pm. The finger separations investigated were 2, 8, 13, 26, and 39 pm. The results are plotted in Fig. 7. The thermal resistance of the HBT with the largest separation was 40% less than that with the smallest. However, the lowest thermal resistance was only 4% lower than for our standard 26/~m finger separation. One more device was studied. The fingers were separated by 56/~m and a thermal shunt landing was placed between each finger. These transistors had 25% lower thermal resistances than those with our standard finger separation with no landings. However, the landing itself may not have contributed to the reduction as much as the increased finger separation. Normally increasing the finger separation would increase the likelihood of thermal collapse by thermally isolating the emitter elements from one

Devices were fabricated with two different thermal shunt thicknesses (3 and 20 pm). The transistors had 1, 2, or 3 fingers with four 4 pm dots per finger to investigate the effect of thermal shunt with emitter area. The specific thermal resistance versus area is plotted in Fig. 6. As expected, the 20 pm thick shunt is much more effective than the 3 pm thick shunt in lowering the specific thermal resistance and lowering the rate of increase with respect to increasing area. A thick shunt device with 150/~m 2 emitter area would have the same temperature rise as that of a thin shunted one with a 50 #m 2 emitter area given the same dissipated power density.

5.4 Layouts Experiments to lower the thermal resistance by increasing the emitter dot separation, increasing the finger separation, and placing a thermal landing between each finger were also done. Increasing the dot separation had the smallest impact on thermal resistance. Our standard separation is 2 pm. The thermal resistance was only lowered by 13% from increasing the dot separation to 6 #m. However,

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1 10 4 . I I .................................

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100

150

200

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Fig. 5. Normalized thermal resistances for HBTs with increasing area.

0

. . . . . . . . . . . . . . . . . . . . 0

10

20

30

[ .... 40

50

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F-F Separation [~'n]

Fig. 7. Normalized thermal resistances for 200 #m2 HBTs with increasing base finger separation.

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another[4], but the thermally shunted HBT has greater design freedom to allow significant thermal resistance improvements by spreading the heat sources apart. This freedom is caused by the low thermal resistance between emitters.

50

40 LU <

5.5 Thermal modeling

A three-dimensional thermal modeling effort is ongoing. A commercial, finite-element analysis package, PATRAN, by MacNeal-Schwendler Corp. is used. This effort has concentrated on modeling the thermally-shunted HBT structures with the appropriate material parameters including temperature-dependent thermal conductivity, density and heat capacity. While the thermal response of a true HBT is electro-thermal in nature, we have found that a "decoupled" thermal-only analysis leads to an effective thermal resistance which is within a few percent of the measured data. The effective thermal resistance is determined by averaging the steady state temperature at the base-emitter junction. If multiple emitters are used, the average temperature of all base-emitter junctions in the finger is taken. The effective thermal resistance is then the quotient of the average temperature and power dissipated. We have obtained good agreement for some experimentally derived thermal resistances. For example, the thermal resistance for a 100 #m 2 device containing eight 4 #m diameter dots was calculated to be 229°CW -~ compared with 238~C W -~ measured. This technique has accurately confirmed the empirical trends presented for top-side heat removal, thermal shunt thickness, and finger separation. While thermal-only modeling neglects the electrical interaction to HBT heating, the effective thermal resistance proves to be sufficiently accurate when compared to empirical results. The model is a valuable tool which can, to a first-order approximation, be used to predict the thermal response of HBT device structures prior to fabrication. We have 200 pm 2 Area Devices

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0

. . . . . . . . . . . . . . . . . . . . . . . .

0

50

100

150

200

250

300

Rth FC/W]

Fig. 9. Power added efficiency versus thermal resistance for 200 #m 2 HBTs.

used the decoupled approach to model the forward Gummel IV curves, IV curves for forced base currents, cutoff frequency values and breakdown characteristics[22]. 5.6 Power results

To illustrate the effect of thermal management on the power performance at 10 GHz, several designs were characterized. The devices tested were 200 #m 2 HBTs ( 4 # m diameter dots, 4 dots per finger, 4-fingers). A single 16 #m diameter HBT was also measured. After device screening based upon d.c. electrical performance, the output power and power-added efficiency (PAE) were measured using Maury Microwave's load-pull system. The test configuration was calibrated at the plane of the device's terminals. The d.c. bias used for each type of device was determined experimentally during power characterization. While a constant collector supply voltage of 6 V was used, the base current was varied to optimize the PAE and output power. Using load and source pull, the devices were matched to obtain maximum output power. Then, the input power was swept to determine the power characteristics at peak PAE. Figure 9 is a plot of output power and power-added efficiency with respect to device type. The dependency of the power-added efficiency on thermal resistance is plotted in Fig. 10. A strong dependence of PAE on thermal resistance is observed. The PAE increases significantly with lower thermal resistance. This increase is attributed to the lower junction temperature during operation. A more thorough investigation of this trend is underway.

30 20

6. C O N C L U S I O N S

10

0 444CP

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444RT 444RH

444

444SH 444ST

Device

Fig. 8. Output power and power-added efficiencies for 200 ~m2 HBTs with different thermal designs.

A comprehensive study of the effect of layout variations on thermal resistance and its effect on power-added efficiency has been presented. The thermal resistance for a 200 #m 2 thermally-shunted HBT was reduced from 266°C W -~ to 146°C W -~ by increasing the shunt thickness from 3 to 20 #m and

Thermal management of microwave power heterojunction bipolar transistors by placing a shunt landing between each finger. Also, a strong dependence of power-added efficiency to thermal resistance was observed confirming the importance of thermal management in HBTs.

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1. 2. 3. 4. 5. 6. 7. 8.

Webb, P., IEEE Trans Elec Dev., 1993, 40, 867. Dawson, D., GaAs IC Symp. Dig, 1994, 285. Liu, W., GaAs IC Symp. Dig, 1995, 147. Anholt, R., Electrical and Thermal Characterization of MESFETs, HEMTs, and HBTs, Artech House, Norwood, MA, 1995. Schneider, J., et al., Solid-St Electron., 1996, 39, 377. Bayraktaroglu, B., et al., IEEE Electron Device Lett., 1993, 14, 493. Tanaka, S., et al., IEEE M T T - S Int. Microwave Syrup. Dig., 1996, 843. Liou, L., et al., IEEE Trans. Elec. Dev., 1994, 41, 629.

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9. Higgins, J., IEEE Trans. Elec. Dev., 1993, 40, (12), 2171. 10. Yang, L., et al., I E D M Dig., 1994, 11. Bozada C., et al., GaAs 1C Syrup. Dig., 1995. 12. Cheney, M., et al., Cornell, 1989, 334. 13. Sato, H., et al., GaAs IC Symp. Dig., 1993, 337. 14. Hill, D., et al., IEEE Microwave Guided Wave Lett., 1995, 5, 373. 15. Bayraktaroglu, B., et al., IEEE M T T - S Int. Microwave Symp. Dig., 1996, 685. 16. Jenkins, T., et al., IEEE Microwave Guided Wave Lett., 1996, 6, 268. 17. Jackson, G., et al., IEEE M T T - S Int. Microwave Syrup. Dig., 1995, 457. 18. Jenkins, T., et al., IEEE M T T - S Microwave Syrup. Dig., 1995, 1129. 19. Sewell, J., et al., GaAs Man Tech Dig., 1996. 20. Dettmer, R., et al., IEEE M T T - S Int. Microwave Syrup. Dig., 1996, 1607. 21. Anholt, R., et al., Symp. on Microscale Thermal Phenomena in Electronic Systems, 1996. 22. Anholt, R., et al., GaAs IC Symp., 1996.