Thin film CdS-CdTe heterojunction diodes

Solid-State

Electronics

THIN

Pergamon Press 1968. Vol. 11, pp. 749-756.

FILM

CdS-CdTe

Printed

in Great Britain

HETERO JUNCTION

DIODES*

R. W. DUTTON and R. S. MULLER Department

of Electrical

Engineering and Computer Sciences, Electronics University of California, Berkeley 94720, U.S.A.

(Receiaed

5 February

1968; in revisedform

22 March

Research

Laboratory,

1968)

Abstract-It is demonstrated that a layer of CdTe of the order of 100 A in thickness is formed at the CdS-Te interface during the fabrication of thin film, Au-CdS-Te diodes by standard vapor deposition procedures. The existence of the interfacial layer is confirmed using X-ray diffraction studies, and substantiated by diode photocurrent measurements which show a threshold photon energy that corresponds to the bandgap of CdTe. The presence of the CdTe layer can explain the excellent rectification ratios and high reverse breakdown voltages achieved in vapor-deposited Au-CdS-Te diodes. The observed photoresponse, current vs. voltage, and capacitance vs. voltage characteristics are shown to be consistent with those predicted by a semiconductor heterojunction model of the CdS-CdTe interface. RBsumk-On demontre qu’une couche de TeCd de l’ordre de 100 A d’epaisseur est form&e a l’interface SCd-Te durant la fabrication de diodes Au-SCd-Te a pellicule fine par des procedes de sediment a vapeur standards. L’existence de couche interfaciale est confirm&e par l’emploi d’etudes de diffraction de rayons-X et prouvee par les mesures de photocourant de diode qui indiquent une energie de proton de seuil qui correspond B l’intervalle de bande du TeCd. La presence de couche de TeCd peut expliquer les excellents rapports de redressement et les hautes tensions inverses de coupure obtenus dans les diodes Au-SCd-Te sedimentee a vapeur. La photoreponse observde et les caracteristiques courant-tension et capacite-tension sont presentees comme &ant compatibles avec celles predites par un modele d’heterojonction semiconducteur de l’interface SCd-TeCd. Zusammenfassung-Bei der Herstellung von Au-CdS-Te-Diinnschicht-Dioden durch Niederschlagung aus der Dampfphase entsteht an der CdS-Te-GrenzflHche eine etwa 100 A dicke CdTeSchicht. Die Existenz dieser Grenzffachenschicht folgt aus der Streuung von Rontgenstrahlung und aus Messungen des Photostroms der Dioden, welcher eine Schwellenenergie der Photonen zeigt, die dem Bandabstand von CdTe entspricht. Das Vorhandensein der CdTe-Schicht erklart die ausgezeichneten Gleichrichtereigenschaften und die hohen Durchbruchsspannungen in Sperrichtung, welche mit aus der Dampfphase niedergeschlagenen Au-CdS-Te-Dioden erreicht werden. Die Strom-Spannungs-Kennlinie infolge Belichtung und die zugehorigen Kapazitaten als Funktion der Spannung sind vertraglich mit den Werten, die ein Model1 fur den Heteroiibergang CdS-CdTe ergibt. INTRODUCTION

DIODES made from Te deposited on CdS thin films exhibit very good rectification properties, as is evident from the I-V characteristics shown in Fig. l(a). Diodes formed by depositing other materials on thin films of CdS are generally poorer. The superior rectification ratios of the CdS-Te diodes has led to the application of these * Research was sponsored by the National nautics and Space Administration under Grant 05-005-243.

AeroNGR-

devices in diode-logic matrices.(r) WEIMER(~) used thin film Te-CdS diode arrays to fabricate a solidstate vidicon. Space-charge-limited currents have been shown to occur under forward bias for these structures by DRESNERand SHALLCROSS. In this paper the physical nature of the rectification in Au-CdS-Te diodes is considered. MULLER and ZULEEG(~)have observed excellent rectification in thin film Al-CdS-CdTe-Au heterojunction diodes. Their work suggests an explanation for the unexpectedly good rectification properties of the Te-CdS diodes. In this paper, 749

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DUTTON

and

the high rectification ratio is shown to be caused by the presence of an insulating CdTe layer at the Te-CdS interface. The characteristics of a diode formed with a thin CdTe layer, laid down intentionally, are shown for comparison in Fig. l(b). The Te-CdS diodes were fabricated by depositing Au, CdS andTe sequentially on glass substrates. The CdS films were deposited according to the procedure described by MULLER and CONRAGAN.‘~) Details of device geometries and procedures for fabrication are given in Section 2. The existence of the CdTe interfacial layer was established using copper K, X-ray diffraction studies. Details of the studies are given in Section 3. The photoresponse of the Au-CdS-Te diodes provided corroborating evidence for the existence of the CdTe interfacial layer. Photoelectric currents exhibited a threshold photon energy which was equal to the bandgap of CdTe (1.4 eV).@) DEVICE FABRICATION The Au-CdS-Te diodes used in this investigation were fabricated by depositing the materials on Thomas 7030 glass laboratory microscope slides. Side and plan views of the geometries used are shown in Fig. 2. The first geometry [Fig. 2(a)]

!a)

‘FIG. 2. Geometries of the thin-film diodes studied: (a) Au-CdS-Te and Au-CdS-Au diodes, (b) Au-CdSTe diodes, (c) Au-CdS-CdTe-Te diodes. The active region in (a) is 10-l cm2, and low2 cm* in (b) and (c).

R.

S.

MULLER

provided a large area and thus large capacitance and current capability. The second geometry [Fig. 2(b)] reduced the area by a factor of 10. The Au-CdS interface acts as an ohmic contact and the Te-CdS interface provides the rectifying contact. In order to study the electrical behavior of the Au-CdS interface and the nature of the barrier layer at the Te contact, Au-CdS-Au and AuCdS-CdTe-Te devices were also constructed. The Au-CdS-Au structures were fabricated in the same manner as the Au-CdS-Te diodes and the geometry used is shown in Fig. 2(a). The AuCdS-CdTe-Te devices were fabricated as shown in Fig 2(c). The geometries of all deposits were defined by stainless steel shadow masks. The Au depositions were made in a Balzers vacuum system at a pressure of 1 x 1O-5 torr. Glow discharge was used as a final cleaning procedure. The Au was evaporated from a tungsten filament and the thickness was monitored with a Speedivac thickness monitor. Typical Au film thicknesses were 200-300 A; sufficiently thick to provide good ohmic contact yet having a 0.4-0.5 coefficient of transmission for the light used for photocurrent measurements. The CdS was deposited in an N.R.C. vacuum system at a pressure of 5 X 10W6 torr. Polycrystalline CdS powder from Eagle Pitcher Company was evaporated from a quartz boat. Spun quartz covered the boat to prevent spattering of the CdS. The source temperatures ranged from 745”-755°C and the substrate was heated prior to deposition to 145”-150°C. Film thicknesses were of the order of 2-3 CL.After the deposition of the CdS, the films were baked at 300°C in a H,S atmosphere for lo-15 min. The baking increased the resistance of the films by a factor of 100 to approximately lo4 Q-cm. Before baking, the films were an orange-yellow while after baking they were a lemon-yellow. Recrystallization of CdS under the same conditions has been observed by DRESNER and SHALLCROSS. The formation of a CdTe layer when Te is evaporated on CdS may be attributed to the presence of excess Cd. The Te was deposited at a vacuum of 2 x 10v5 torr. Three to four mg of Te were evaporated from a tungsten boat with a source-substrate distance of 11 cm. The Te contact was semitransparent (ZOO-300 A) but was highly resistive. Later it proved necessary to paint Ag contact

THIN

FILM

CdS-CdTe

HETEROJUNCTION

over the Te in order to lower its series resistance. The paint did not alter the junction properties. Diodes using evaporated Al on top of the Te were also investigated. The photoresponses and capacitance vs. voltage characteristics were unchanged by the use of the Ag or Al overlays. The overlays were added only to obtain the current vs. voltage characteristics. The Au-CdS-Au structures required the same procedure for the top and bottom Au depositions. The CdTe deposits were made at a vacuum of 2 x 10e5 torr from a tungsten boat. Eight-tenths of a mg of CdTe provided a layer 50-100 A thick when the source-substrate distance was 11 cm. Single crystal, n-type CdTe was used for the depositions (material obtained from K. & K. Laboratories, Inc., Plainview, N.Y.). OF CdTe AT INTERFACE

VERIFICATION

THE

CdS-Te

In this Section the X-ray diffraction studies and photoresponse of Au-CdS-Te diodes demonstrate that an interfacial layer of CdTe is formed. The layer is shown to be highly oriented in the (111 > direction and of the order of 100 A thick. CdS < 00’

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(u) X-ray diflaction studies Analyses of X-ray diffraction patterns from deposited CdS films with Te deposited on top show the presence of interfacial CdTe. The X-ray diffraction studies were made using a copper K, source. The lines observed had 28 angles of 23.3”, 23.9”, 26.8”, 38.3”, 40.8”, 54.8”, 82.0”, and 87.0”. The observed diffraction pattern is shown in Fig. 3. The lines at 26.8” and 54.8” correspond to hexagonal CdS oriented in the (002) and (004) directions respectively. This orientation corresponds to the c-axis normal to the substrate. No lines were observed for other orientations. The lines at 23.3” and 40.8” are due to hexagonal Te oriented in the (100) and (110) directions. The relative intensity of the two peaks is S/S, which may be compared with the ratio 2/3 for a randomly oriented sample. The inverted order and the high intensity ratio indicate that the Te has a preferred orientation on the CdS. The peak at 23.9” corresponds to cubic CdTe in a orientation. This orientation suggests a continuous transition from the (111> cubic CdTe to the (002) hexagonal CdS lattice. There were no lines Cd0

I

(200. or Te <102,

i>

Cd0 <400>

+ 90”

FIG. 3. X-ray

80"

7c0

60”

50°

diffraction pattern (Copper Ka source) of a CdS-Te identified on the figure.

40°

30”

I

20°

deposit. The sources for the peaks are

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R. W. DUTTON

present for orientations of CdTe other than (111 >. The width of the CdTe peak indicates that the layer is between 200-400 A thick as well as exhibiting a high degree of orientation. A broader line indicates fewer reflecting planes. The lines at 38.3” and 82.0” indicate the presence of Cd0 oriented in the (200) and (400) directions respectively. The line at 38.3” could also indicate Te with a (102) orientation. Although these two lines may indicate a layer of CdO, the photoresponses indicate that this layer is inactive. BUJATTI and MULLER(~) have reported Cd0 present in thin films of CdS but have also failed to detect any electrical activity. It is possible that the Cd0 is formed at the back Au-CdS contact when the substrate has not reached the proper temperature. The samples for the X-ray study were prepared in exactly the same manner as were the Au-CdS-Te diodes but without the shadow mask definition of the pattern. The area of the sample was 1” x 1” square. A series of selective chemical etches were performed on a Au-CdS-Te diode to isolate the CdTe interfacial layer. The diode was first immersed in NaOH to remove the Te. Next the sample was etched in HCl. This etch removed the CdS only from the regions which had not been covered by Te. The portion of the sample which was not attacked by HCl was partially attacked by HNO,, which is known to etch CdTe but not CdS. This sequence of chemical steps is consistent with the presence of a CdTe layer beneath the Te contact.

and

R. S. MULLER

FIG. 4. Measured photocurrent vs. photon energy for a Au-CdS-Te diode. (The response has not been corrected to account for the source spectrum). destructive interference of the incident light within the films. The distance between the maxima gives an accurate measure of film thickness.(7) The extrema values of the response shown in Fig. 4 were averaged to obtain a smooth curve. The calibration of the tungsten source was made using an S-l photomultiplier tube and the published yield for the S-l. From the diode photoresponses and the calibration data the quantum efficiency (electrons/photon) can be determined to give the results plotted in Fig. 5. Quanlum efficiency ( x 10-7

P

SirliCflJWS: la1 Au-CdS-Te Ibl Au -Cd% CdTe-Te ICI Au-CdS-Te (dl Au-CdS-Au

(b) Photoresponse The X-ray diffraction studies prove that an interfacial layer of CdTe is formed in Au-CdS-Te diodes. The photoresponse of the diodes provides evidence that this interfacial CdTe is electrically active. To isolate the effects of the CdTe, the photoresponse of Au-CdS-Au and Au-CdSCdTe-Te devices were also observed. The results for a typical Au-CdS-Te diode are shown in Fig. 4. The photoresponses of the Au-CdS-Te, Au-CdS-CdTe-Te, and Au-CdS-Au structures were observed using a Perkin-Elmer 112 monochromator and a tungsten source. Major interest was in the effects of photons having energies between 1.0 and 2.0 eV. The oscillatory form of the response in Fig. 4 is due to constructive and

20

Ph;$

energy

FIG. 5. Quantum efficiency (in terms of electrons per photon) vs. photon energy for four thin-film diode structures.

THIN

FILM

CdS-CdTe

HETEROJUNCTION

The photoresponses for the Au-Cd%CdTe-Te and Au-CdS-Te devices exhibit a sharp increase in photoelectric yield for photon energies above 1.5 eV. The response of the Au-CdS-Au structure is flat over this range of photon energies. The similarity in the photoresponses for the CdS-Te and CdS-CdTe-Te devices and the fact that the bandgap of CdTe is 1.4 eV are strong indications that the response between 1.4 and 2.2 eV is due to the layer of CdTe in the structures. All of the structures exhibit a sharp increase in quantum efficiency above 2.45 eV, which is the bandgap of CdS. The shapes of the responses for the Au-CdS-Te and Au-CdS-CdTe-Te structures are identical, indicating that the introduction of the CdTe at the CdS-Te interface has not changed the nature of that contact. Curves (a) and (b) correspond to devices with geometries shown in Fig. 2(b) and (c); curves (c) and (d) correspond to devices with the geometry shown in Fig. 2(a). It should be noted that the photocurrents from the excitations in the CdTe and in the CdS are of the same polarity. The absence of a photocurrent between photon energies of 2.0 and 2.4 eV on curve (d) in Fig. 5 indicates that the Cd0 is inactive since the bandgap of Cd0 is 2.2 eV.@) Because the Au-CdS-Au structure was fabricated using processing identical to that used for the Au-CdS-Te and Au-CdS-CdTe-Te structures, the formation and location of the Cd0 should be identical in all structures. Plots of the Z/3 power and square of the yield (Y) vs. photon energy for a typical Au-CdS-Te diode (curve (a), Fig. 5) are shown in Fig. 6. In the photon energy range 1.5-1.65 eV, the plot of Y2 is linear with intercept at 1.4 eV. For photons of energy between 1.65 and 2.0 eV, the plot of Y2/3 gives a linear relationship with a 1.4 eV intercept. Thus, the yield for the diode in the range 1.5-1.65 eV is found to be proportional to (E-E,)1’2, and in the range 1.65-2.0 eV the yield is proportional to (E-E,)312. For both ranges of photon energy the threshold energy, E,, corresponds to the bandgap of CdTe. A qualitative interpretation of these power law dependences is given in the next section. A lower limit of 80 A can be established for the thickness of the CdTe layer, based on the experimental value of the quantum efficiency of the diode in the energy range of 1.5-2.0 eV. If we assume that all of the electrons produced by

DIODES

7.53

Relative yield 1

1.5 -

IO0.9-

0

81

0.70.60.5 0.40.3ohofon

FIG. 6. Relative quantum yield (electrons/photon) photoresponse measurements vs. photon energies CdS-Te diodes.

photoexcitation given by,

are collected,

then

the yield

in for

is

Y = [l.O-exp(-ad)]. Using the absorption coefficients of CdTe, measured in this laboratory, for this range of photon energies allows us to calculate 80 A as the minimum thickness of the layer. DISCUSSION (u)

Physical model The X-ray diffraction studies and photoresponse for Au-CdS-Te diodes suggest an energy-band diagram for the diodes as shown in Fig. 7. Because of the high degree of orientation of CdS

!CdTe!

Te

FIG. 7. A heterojunction model of the energy-band diagram for a Au-CdS-Te diode.

754

R. W.

DUTTON

the constituents, a band structure similar to that of bulk materials is reasonable.(4) MEAD(*) has given experimental evidence that a CdTe-metal junction has a barrier height of roughly three-quarters of a volt (capacitance measurements), irrespective of the metal used to form the junction. He infers that surface states at the interface fix the Fermi level. If it is assumed that this same behaviour holds for CdTe-Te, we can locate the conduction band of the CdTe 0.75V above the Fermi level at the Te contact. The configuration of the bands at the CdS-CdTe interface can be estimated if we assume that the surface states at this interface force the CdTe conduction band to be at approximately this same energy (0.75 V). Since the electron affinities of both CdS and of CdTe are approximately 4.5 eV,@) the conduction bands of the materials join smoothly at the interface.(1°-12) The configuration of the valence bands shown in Fig. 7 is suggested by the photoresponse of the Au-CdS-Te diodes. For a direct bandgap semiconductor (such as CdTe) which is thin compared to l/a (the absorption coefficient.), the yield is proportional to (E-E,)1’2. If the bandgap is linearly graded, it is easily shown that Y should be proportional to (E-E,)312. Using these facts to interpret the results shown in Fig. 6 on the basis of a heterojunction model we can infer that the film consists of a pure CdTe layer overlaying a region in which the material is a mixture of CdS and CdTe. If this mixed region is modeled in terms of a linearly-graded bandgap, we obtain Fig. 7 as a representation for the diode band structure. For photon energies only slightly greater than the CdTe bandgap, all of the pure CdTe layer will absorb energy, but only a small portion of the linearly graded region will be active. As the photon energy increases, more of the linearly graded region becomes electrically active. Thus, for low photon energies it is possible for the yield to be proportional to (E- ET)1’2, and when a sufficient portion of the linearly graded region has become active, the dependence would become Y cc (E-E,)312. The polarity of the photocurrent should be in the same sense for excitations at all photon energies, as is observed. The rectification barrier for the heterojunction model of the Au-Cd%Te diode as described above differs in height from the barrier predicted by

and

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S. MULLER

Schottky theory for the diode.(13) Schottky theory for a direct CdS-Te contact would predict a barrier height (measured from the conduction band of the CdS) of approximately 0.1 eV.@J4) The barrier height predicted by the model shown in Fig. 7 is approximately 0.65 eV. The important difference between the two models is that the heterojunction model predicts a barrier height which is determined by the surface properties of the Te-CdTe interface. The interfacial layer of CdTe is thin compared to a Debye length in either the CdTe or the CdS. Thus, only a small portion of an applied potential will be dropped across this region. Therefore, one would expect the I-V and capacitance vs. voltage characteristics to behave approximately as predicted by Schottky theory.(13) (6) Electrical behavior

The I-V characteristics shown in Figs. l(a) and (b) compare favorably both in shape and in magnitude. This indicates that the introduction of SO-100 A of CdTe does not appreciably change the nature of the existing barrier at the Te contact. When the I-V characteristics are plotted on a log I vs. V scale, the dependence is linear over three decades of current (1 nA to 1 PA), as seen in Fig. 8.

IOOnA

IOnA

, 01

02

03

04

05

06

v

FIG. 8. Plot of log current vs. voltage for the Au-CdSTe and Au-CdS-CdTe-Te diode structures. The curves are identified on the figure.

THIN

FILM

CdS-CdTe

HETEROJUNCTION

The linear regions have slopes of the form n(kT/q) where n is between 1.17 and 2. The exponential temperature dependence was verified at two temperatures for a typical device, The results are shown in Fig. 9. At room temperature n = 2.0

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The capacitance vs. voltage measurements were made using a Wayne-Kerr bridge at two frequencies, 190 and 19 kHz. Plots of l/C2 vs. Y are straight lines as shown in Fig. 10. Using

Log I

0

FIG. 10.

1Ona ,,,,, ,,, ,,

1,,,,,1,,,,,,,,,,,,, d.2V o.iv

+I

b’

Plots of l/C2 vs. voltage, (a) measured 19 KHz (b) measured at 190 KHz.

at

VOlfS

.

0%

FIG. 9. A plot of log vs. voltage for a typical Au-CDS-Te diode at two temperatures.

and at 90°C n g 2.1. Evidently, as forward bias (the Te layer positive) the CdTe layer impedes the flow of carriers only to the extent that some carriers may recombine before they have crossed it. This recombination current as well as the voltage drop in the CdTe would account for the non-unity n values in the log I vs. V plots. At reverse biases, the CdTe layer apparently reduces current by eliminating barrier lowering owing to the Schottky effect.‘15) Since the CdTe layer is of the order of 100 A thick (in the AuCdS-Te structure), it will not support any appreciable tunnel current through it. This is the likely cause for the low reverse currents in the Au-CdSTe diodes (less than 1 nA at 1 V reverse bias). The diodes break down irreversibly at biases varying from 15-20 V. Failure is most likely due to localized heating effects in the region of the junction. The characteristics of several Au-CdS-Au structures were monitored in order to confirm that the lower Au contact in the rectifying diodes was behaving ohmically.

Schottky theory to determine the dopant concentrations, one finds that curve (a) in Fig. 10 corresponds to a doping of 4 x 1Ol3 donors[cm3, while curve (b) implies a doping density of 2 x 1Ol6 donors/cm3. The discrepancy in these concentrations results from the fact that trapped charge cannot respond to the applied signal at higher frequencies. Both plots have a voltage intercept between 0.85 and 0.9 V, about 0.2 V higher than one predicts from the heterojunction model. CONCLUSIONS

It has been shown that a crystalline layer of CdTe is formed at the CdS-Te interface of a thin film Au-CdS-Te diode. The presence of this layer can explain the consistently good rectification properties of deposited Au-CdS-Te diodes. X-ray diffraction studies reveal the presence of the CdTe and show that it is oriented in the (Ill) direction. This orientation constitutes a proper match of cubic CdTe to the hexagonal CdS with (002) orientation. The capacitance vs. voltage data reveal that the presence of the CdTe alters the barrier height as found from the l/C2 vs. V plots. The measured barrier tends to agree with the barrier predicted using a heterojunction model of the

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DUTTON

CdS-CdTe junction with surface states dominating at the interface. The current vs. voltage characteristics of the Au-CdS-Te diode agree with those predicted using the heterojunction model of the CdS-CdTe interface. The low reverse current of the Au-CdS-Te diode is attributed to the presence of the CdTe layer. The layer reduces high field (Schottky emission) lowering of the barrier. The I-V characteristics of the Au-CdS-Te diode are found to be comparable to those of a fabricated Au-CdS-CdTe-Te structure. The Au-CdS-Te diode exhibits a photocurrent for photon energies between 1.5 and 2.4 eV due to band-to-band excitations in a pure CdTe layer as well as in a region with a mixture of CdS and CdTe. The yield for the diode in the range 1.5 to 1.65 eV is found to be proportional to (E-E,)1’2, and in the range 1.65 to 2.0 eV the yield is proportional to (E-E,)3’2. The photoresponse of the Au-CdS-CdTe-Te structure is similar to that of the Au-CdS-Te diode over the range of photon energies between 1.5 and 2.4 eV. There is no observed photocurrent for the Au-CdS-Au structure over the same range of photon energies.

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tion (1966-67) and by the National Science Foundation (1967-68) is gratefully acknowledged. REFERENCES 1. II. FUCHS and K. HEINE, Microminiaturization, p. 335, Oldenbourg, Mtichen, Wien (1966). 2. P. K. WEIMER, et al. Proc. IEEE 52, 1479 (1964). 3. J. DRESNER and F. V. SHALLCROSS, Solid-St. Electron. 5, 205 (1962). 4. R. S. MULLER and R. ZULEEG, J. Appl. Phys. 35, 1550 (1964). 5. R. S. MULLER and J. CONRAGAN, IEEE Trans. electron Devices 12, 590 (1965). 6. N. B. HANNAY, Semiconductors, p. 52, Reinhold, New York (1960). 7. M. BUJATTI and R. S. MULLER, J. electrochem. Sot. 112, 702 (1965). 8. C. A. MEAD, Solid-St. Electron. 9, 1023 (1966). 9. J. J. SCHEER and J. VAN LAAR, Philips Res. Rep. 16, 323 (1961). 10. L. J. VAN RUYVEN, J. M. P. PAPENHIJZEN and A. C. J. VERHOEVEN, Solid-St. Electron. 8, 631 (1965). 11. G. ZEIDENBERGSand R. L. ANDERSON, Solid-St. Electron. 10, 113 (1967). 12. R. L. AP~DERSON, Solid-St. Electron. 5, 341 (1962). Semiconductors, p. 74, 13. E. SPENKE, Electronic McGraw-Hill, New York (1958). 14. L. APKER, E. TAFT and J. DIC~Y, Phys. Rev. 74, 1462 (1948).