Thin Solid Films 487 (2005) 113 – 117 www.elsevier.com/locate/tsf
Thin-film polycrystalline silicon solar cells on ceramic substrates by aluminium-induced crystallization I. GordonT, D. Van Gestel, K. Van Nieuwenhuysen, L. Carnel, G. Beaucarne, J. Poortmans IMEC vzw, Kapeldreef 75, B-3001 Leuven, Belgium Available online 5 March 2005
Abstract Thin polycrystalline bseed layersQ have been created on ceramic substrates using aluminium-induced crystallization (AIC) of amorphous silicon. An intermediate spin-on-oxide between substrate and AIC layer suppresses excessive nucleation and leads to larger grains. Epitaxial growth with high-temperature chemical vapor deposition has been successfully performed on these seed layers, yielding an average grain size around 5 Am. In this way, solar cells with grain size larger than active layer thickness have been made, reaching Voc values up to 460 mV and energy conversion efficiencies around 4.5%. D 2005 Elsevier B.V. All rights reserved. Keywords: Aluminium-induced crystallization; Epitaxy; Polycrystalline silicon; Solar cells
1. Introduction At present the semiconducting material in crystalline silicon solar modules accounts for roughly half of the total module price, while most of the used silicon material only serves as mechanical support. A solar cell technology based on thin crystalline silicon films on cheap foreign substrates could therefore achieve a large cost reduction on the condition that sufficiently high conversion efficiencies are obtained. However, most of the approaches to develop such a technology have so far resulted in devices with a much lower efficiency than the traditional bulk cells. This is mainly due to the lower crystallographic quality of the obtained layers. Recently, there have been promising developments in the field of thin-film polycrystalline Si indicating a large potential for use in photovoltaics [1]. When using polycrystalline silicon for solar cells, the grain size of the material is very important and should be at least as large as the thickness of the layer. A way to obtain such large grains that has recently drawn a lot of attention is the use of aluminium-induced crystallization
* Corresponding author. Tel.: +32 16 288249; fax: +32 16 281501. E-mail address:
[email protected] (I. Gordon). 0040-6090/$ - see front matter D 2005 Elsevier B.V. All rights reserved. doi:10.1016/j.tsf.2005.01.047
(AIC) of amorphous silicon [2]. The AIC process is a lowtemperature alternative to solid-phase and laser crystallization, in which a thin a-Si layer in contact with an Al layer crystallizes at temperatures well below the eutectic temperature of the Al/Si system (Teu=577 8C). Furthermore, both layers also exchange places during the process. The resulting polycrystalline Si layer has a preferential (100) orientation and is highly p-doped (~21018 cm 3) due to the incorporation of Al atoms. Epitaxial thickening of such an AIC seed layer leads to markedly larger grain sizes than when depositing silicon directly on a foreign substrate [3–6]. In this paper we present our recent progress in using AIC seeding layers on ceramic substrates in combination with high-temperature chemical vapor deposition (CVD). We will discuss how to obtain high-quality seed layers on ceramics and we will report on our best solar cell results so far.
2. Experimental The substrates used in this work are alumina substrates (ADS996 from CoorsTek). The AIC layers are made by depositing double layers of Al and amorphous Si using an
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electron-beam high-vacuum evaporator. In between the two depositions, the aluminium is oxidized by exposure to air for 2 min. The thickness of the Al and a-Si layers is fixed at 200 nm and 230 nm, respectively. After deposition, the samples are annealed in a tube furnace under nitrogen ambient at 500 8C for a period of 30 min to 3 h. The top Al layer is then removed in a chemical solution based on phosphoric acid. The quality of the AIC layers is checked by optical microscopy and scanning electron microscopy (SEM). Si layers are deposited on the AIC layers in a commercial single-wafer epitaxial reactor (ASM Epsilon 2000) using trichlorosilane diluted in H2. The depositions are performed at a temperature of 1130 8C, under atmospheric pressure, and with a growth rate of 1.4 Am min 1. In situ doping with B is done by adding diborane to the gas flow. In this way, double layers of p+(~21019 cm 3) and p (variable doping) silicon with different thickness ratios are made. After epitaxial deposition, an emitter layer is formed on the samples by phosphorous diffusion from a P-doped pyrolithic oxide. Hydrogenation of the cells and nitride deposition are performed in a commercial plasma enhanced chemical vapor deposition (PECVD) system (OPT Plasmalab). Finally, photolithography and wet chemical etching are used to define the cell area and the contact area of the solar cell devices, while the metallization is done by electronbeam evaporation.
3. Results and discussion 3.1. AIC on ceramic substrates When reviewing the literature, it is noted that largegrained AIC seed layers for solar cells have been made mainly on glass substrates. This implicates an epitaxial thickening of the layers at temperatures around or below 600 8C using special deposition techniques like ion-assisted deposition (IAD) [3] or electron–cyclotron resonance CVD (ECRCVD) [6]. Although it has been shown that this may lead to absorber layers with a large crystalline fraction [7], results on cell level remain quite poor (efficiencies below 1%). We have opted to deposit absorber layers at higher temperatures (~1130 8C), facilitating the epitaxial growth but forcing us to work on somewhat more expensive ceramic substrates. The AIC process on ceramics usually leads to smaller grains than on glass under the same conditions, due to the much larger surface roughness of the ceramic substrates [4]. The enhanced roughness leads to more silicon nucleation centers in the Al layer and hence to smaller grains. The peak-to-peak surface roughness of the alumina substrates we used, is about 400 nm (RMS roughness ~80 nm). Fig. 1a shows a SEM top view of a typical AIC layer formed directly on alumina according to the method described in the experimental section. The polycrystalline seed layer itself
Fig. 1. SEM top view of an AIC layer formed (a) directly on an alumina substrate and (b) on an alumina substrate covered by a spin-on flowable oxide.
cannot be clearly seen in this picture due to the presence of so-called dislandsT. These are secondary crystallites that are formed during the annealing step in the top layer. This island formation is also observed for AIC on glass, though to a much lesser extent [8]. A thorough analysis of these samples with SEM and transmission electron microscopy (TEM) reveals an average grain size between 1 and 2 Am. This grain size is much smaller than reported for AIC on glass (typically ~20 Am) [8]. Together with the large amount of silicon islands on top, this clearly indicates that much more nucleation takes place in both the top and the bottom layers when using alumina substrates. To investigate whether this excessive nucleation arises from the substrate roughness, we have covered alumina substrates with a spin-on flowable oxide (FOx-23 from Dow Corning). This effectively reduces the surface peak-to-peak roughness to around 100 nm. Before doing the AIC process, the samples are cured at 400 8C and densified at 900 8C. In Fig. 1b, a SEM top view is shown of an AIC layer formed on alumina covered by a spin-on oxide, using exactly the same parameters for the AIC process as above. Since the magnification factor is identical for Fig. 1a and b, it is clear that the density of islands decreases drastically when reducing the substrate roughness. Furthermore, TEM analysis indicates that the average grain size has increased to about 5 Am, although there are still a lot of very small grains. We note that on simple SEM figures (as in Fig. 1b) the grain boundaries are not visible. Although the substrate surface is still far from flat, the use of the spin-on flowable oxide resulted in less nucleation in both top and bottom
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layers, leading to continuous AIC seed layers with larger grains on top of which small islands have grown. These AIC layers therefore resemble those on glass except for the smaller grain sizes. Larger grains on ceramic substrates could possibly be achieved by a further modification of the substrate surface. Alternatively, the Al oxide interface of the AIC bilayer could be made thicker by a longer exposure to air since it is well established that this leads to larger grains [9]. 3.2. Epitaxial deposition The AIC seed layers discussed in the previous section are too thin (~200 nm thickness) and too highly doped (~21018 cm 3 p-type) to be used as active layers for solar cells. We therefore use high-temperature CVD to deposit epitaxial absorber layers on the AIC films. The parameters of the CVD growth are given in the experimental section. No attempt is made at removing the islands from the seed layers. The epitaxial quality is very good since the seed layer cannot be distinguished from the epitaxial layer in cross-section TEM images and the crystallographic orientations of the AIC layers are completely reproduced in the epitaxial layers [10]. Furthermore high-resolution TEM (HRTEM) investigations show a very low defect density. To investigate the grain-size distribution of the epitaxial layers, the samples were polished by mechanical polishing, followed by a defect etch using a mixture of K2Cr2O7, HF, and H2O (Secco etch). This enables us to visualize the grain boundaries of the layers using an optical microscope. Fig. 2 compares optical images after polishing and Secco etch of the surface of absorber layers grown on (a) an alumina/AIC layer and (b) an alumina/spin-on oxide/AIC layer. It is clear that the use of the intermediate spin-on oxide not only leads to larger grains in the seed layers but also in the epitaxial layers. The average grain size, estimated by counting the grain boundaries over a given distance, of the layers grown on alumina/AIC samples is roughly about 2 Am. The layers deposited on alumina/spin-on oxide/AIC samples have an average grain size around 5 Am, with grains reaching a maximum size up to 10 Am. For both types of absorber layers, the grain-size distribution corresponds well to that of the underlying AIC seed layers. 3.3. Solar cells In order to obtain working solar cell devices, an emitter is diffused into the absorber layers according to the method described in the experimental section. Bulk passivation in these poly-Si layers is achieved in a PECVD system by plasma hydrogenation [11]. Surface passivation is achieved by PECVD silicon nitride deposition. More details about the hydrogenation are reported in a companion paper (L. Carnel et al.) [12]. By means of photolithography and wet chemical etching so-called mesa cells with an area of 11 cm2 are formed. The structure of these cells is shown in Fig. 3. The
Fig. 2. Optical microscope image after mechanical polishing and Secco defect etch of an epitaxial layer grown on (a) an alumina/AIC layer and (b) an alumina/spin-on oxide/AIC layer.
base contact is at the periphery of the cell, while the emitter contact consists of fingers on top of the cell. The mesa structure is relatively easy and fast to process, allowing to quickly obtain reliable information about the quality of the absorber layers. However, the high series resistance arising from the large distance the majority carriers (holes) have to travel to the base contact is an important disadvantage of this cell structure [13]. We note that in principle the AIC layer could be used as back surface field (BSF), but since this layer is quite thin (~200 nm) this would lead to an even higher series resistance using our mesa cell structure. Therefore, we first deposit an epitaxial p+ layer (~21019 cm 3) followed by the p-type absorber layer. The thickness ratio of these layers is varied. In Table 1 we compare the illuminated IV parameters (AM1.5, 1 sun) of mesa solar cells with (sample B) and without smoothening (sample A) of the alumina surface by using a spin-on flowable oxide. Both samples were processed in exactly the same way except for the use of the intermediate oxide. The BSF and absorber layers of these samples had a thickness of 2 Am each, while the carrier concentrations were in both cases 21019 cm 3 and 11017 cm 3 for the BSF and absorber layer, respectively. The larger average grain size of sample B compared to sample A (see Fig. 2) clearly leads to better solar cell parameters. The use of the intermediate spin-on flowable oxide leads to an increase in efficiency from 3.2% to 4%. Especially the open circuit voltage (Voc), increasing from
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1,0
Sample B Sample C Sample D
0,8
IQE
0,6
0,4
0,2
0,0 300 400 500 600 700 800 900 1000 1100 1200
Wavelength (nm)
Fig. 3. Schematic structure of polycrystalline mesa solar cells (the intermediate spin-on oxide layer is not shown).
377 mV to 424 mV, is enhanced due to the presence of less grain boundaries. The fill factor of sample B is somewhat better than that of sample A mainly due to a lower series resistance (2.5 V cm2 compared to 4.1 V cm2). In a previous paper [10], we reported that the base doping (ranging between 51015 cm 3 and 11017 cm 3) only has a little influence on the short circuit current density J sc and on the Voc of our polycrystalline cells. For this paper we have investigated the influence of different layer thickness on the cell parameters. We prepared two samples with a total thickness (BSF+absorber layers) of 2 Am (sample C) and 6 Am (sample D), respectively. In both cases the thickness ratio of base layer versus BSF layer (t Base/t BSF) is fixed at three. Table 1 shows the illuminated IV parameters of these samples. There is a large difference in Voc and J sc observable. The thin sample has a Voc of 458 mV, which is to our knowledge the highest value obtained for polycrystalline solar cells based on the AIC process. In contrast to this, the thick sample shows a Voc of only 373 mV. Since both samples were processed in the same way, using AIC layers of the same quality, the difference in Voc arises from the thickness difference. In fact, the Voc of sample D is comparable in size to that of sample A which was made on an AIC seed layer with much smaller average grain size. When comparing the Voc of these two samples with that of sample B (total thickness of 4 Am and the same base doping as C and D), it is noticed that the Voc of these 3 samples depends almost linearly on the total sample
Fig. 4. Internal quantum efficiency of polycrystalline mesa solar cells with different thickness.
thickness. Although sample C shows the highest Voc, its has a relatively poor efficiency due to a low fill factor resulting mainly from a high series resistance (~9.5 V cm2). This high series resistance arises from the thin BSF layer and could be substantially lowered by using an interdigitated cell structure instead of the mesa structure. Besides the Voc, the short circuit current is also affected by the thickness of the cell. The thinnest cells show a J sc of around 15.3 mA cm 2 while the thickest cells have a J sc of about 16.9 mA cm 2. To investigate the origin of this difference, we performed measurements of the internal quantum efficiencies (IQE) of the different samples as a function of wavelength. The results are shown in Fig. 4. Below 650 nm, the carrier collection becomes better with increasing cell thickness. This might indicate an enhancement of the material quality with increasing thickness. Above 650 nm, however, sample D (6 Am) has a much lower carrier collection than the thinner cells. The shoulder in the IQE curves in the infrared region arises from enhanced photon absorption due to light reflection at the alumina substrate. Since the BSF layer acts as a dead layer due to its high doping level and the effective diffusion length in the base layer is very low (estimated roughly as L effc0.6 Am [10]), the enhanced infrared absorption is much smaller in the thick sample D than in the thinner samples B and C.
Table 1 Properties and illuminated IV parameters of polycrystalline solar cells on alumina Sample A B C D E
FOx No Yes Yes Yes Yes
t Base (Am) 2 2 1.5 4.5 3
t BSF (Am)
N Base (cm 3)
J sc (mA cm 2)
Voc (mV)
Fill factor (%)
Efficiency (%)
2 2 0.5 1.5 3
11017 11017 11017 11017 31016
15.3 15.7 15.3 16.9 17.3
377 424 458 373 411
54.6 60.5 43.7 58.4 63.7
3.2 4.0 3.1 3.7 4.5
The column labeled FOx indicates whether an intermediate spin-on flowable oxide between alumina and AIC layer was used. The BSF doping level is 21019 cm 3 for all samples.
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Finally, the best efficiency obtained so far for our polycrystalline mesa solar cells is 4.5% (see sample E in Table 1). This was achieved by slightly modifying our emitter diffusion process to obtain higher current densities and higher open circuit voltages. To our knowledge, this is the best solar cell result on ceramic substrates where no silicon (re)melting is involved [1]. The main limiting factor of our solar cells at the moment is the low effective diffusion length L effc0.6 Am [10]. This value could be enhanced by using seed layers with larger average grains and by optimizing the defect passivation.
4. Conclusions We have used aluminium-induced crystallization of amorphous silicon in combination with high-temperature chemical vapor deposition to make thin-film polycrystalline solar cells on alumina substrates. By applying an intermediate spin-on flowable oxide between substrate and AIC layer, seed layers with larger average grain size and smaller island density were produced. Epitaxial deposition on these seed layers led to absorber layers with an average grain size around 5 Am. Solar cells with an efficiency up to 4.5% and a Voc up to 460 mV were made. These results indicate that the AIC process has a lot of potential to produce good quality silicon solar cells on cheap foreign substrates.
Acknowledgements This work was partly funded by the European Commission under project number ENK5-CT-2001-00543 (dMETEORT). The authors would like to thank M. StfgerPollach and P. Schattschneider from TU Wien for TEM measurements and A. Slaoui, A. Focsa, and E. Pihan from PHASE-CNRS for the help with the sample polishing.
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Finally, we are indebted to our Meteor partners at HMI Berlin for the many useful discussions about the AIC process.
References [1] G. Beaucarne, S. Bourdais, A. Slaoui, J. Poortmans, Appl. Phys., A 79 (2004) 469. [2] O. Nast, S. Brehme, D.H. Neuhaus, S.R. Wenham, IEEE Trans. Electron Devices 46 (1999) 2062. [3] A. Straub, P.I. Widenborg, N.-P. Harder, A.B. Sproul, Y. Huang, A.G. Aberle, Technical Digest of the International PVSEC-14 Conference, Bangkok, Thailand, 2004 (January), p. 29. [4] C. Ornagi, M. Stfger-Pollach, G. Beaucarne, J. Poortmans, P. Schattschneider, IEE Proc., Circ. Devices Syst. 150 (2003) 287. [5] C. Ornagi, G. Beaucarne, J. Poortmans, J. Nijs, R. Mertens, Thin Solid Films 451–452 (2004) 476. [6] B. Rau, I. Sieber, J. Schneider, M. Muske, M. Stfger-Pollach, P. Schattschneider, S. Gall, W. Fuhs, J. Cryst. Growth (2004) (accepted for publication). [7] S. Gall, J. Schneider, J. Klein, M. Muske, B. Rau, E. Conrad, I. Sieber, W. Fuhs, C. Ornaghi, D. Van Gestel, I. Gordon, K. Van Nieuwenhuysen, G. Beaucarne, J. Poortmans, M. Stfger-Pollach, J. Bernardi, P. Schattschneider, Y. Wang, O. Van Der Biest, Proceedings of the 19th European Photovoltaic Solar Energy Conference, Paris, France, June 7–11, 2004, p. 475. [8] S. Gall, M. Muske, I. Sieber, J. Schneider, O. Nast, W. Fuhs, Proceedings of the 29th IEEE Photovoltaic Specialists Conference, New Orleans, USA, May 19–24, p. 1202. [9] O. Nast, A.J. Hartmann, J. Appl. Phys. 88 (2000) 716. [10] G. Beaucarne, D. Van Gestel, I. Gordon, L. Carnel, K. Van Nieuwenhuysen, C. Ornaghi, J. Poortmans, M. Stfger-Pollach, P. Schattschneider, Proceedings of the 19th European Photovoltaic Solar Energy Conference, Paris, France, June 7–11, 2004, p. 467. [11] G. Beaucarne, S. Bourdais, A. Slaoui, J. Poortmans, Thin Solid Films 403–404 (2002) 229. [12] L. Carnel, I. Gordon, K. Van Nieuwenhuysen, D. Van Gestel, G. Beaucarne, J. Poortmans, Thin Solid Films 487 (2005) 147 (this issue). [13] The high series resistance can probably be reduced by using an interdigitated structure in which two separate sets of fingers on top of the cell serve as base and emitter contacts.