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Thin silicon ion-implanted p-i-n photodiodes
558
World Abstracts on Microelectronics and Reliability
The roughness parameters of glass films. D. J. WALTERand J. HOUGHTON. Vacuum 27 (I) 7 (1977). Thin films of Corning 7059 glass were deposited onto soda lime glass substrates by rf sputtering. Profiles of the surfaces of the films and substrates were obtained using a Tallystep, and these were digitally processed to yield the rms roughness amplitude of approximately 6 nm, the autocorrelation length of about 2.9 #m, and also the rms roughness angle of 0.3'. There was normally little difference between the roughness of the film and substrate. However it was found that the surface roughness of the films grown with the sputtering electrode earthing shield exposed, or else when a metal mask was placed on the substrate, were substantially rougher than films sputtered whilst the target covered the earthing shield and when a glass mask was used. It was concluded that the large roughness nodules were largely attributable to sputtered metallic particles forming preferential nucleation sites around which rapid growth occurred. Surface roughness profiles of Pilkington Float Glass were also obtained; the rms amplitude was 0.8 nm and the correlation length was 26.6#m. The extreme smoothness of this glass indicates that it might be useful as a substrate for rf sputtered glass ~ptical waveguides. A silicon slice as prepared for the manufacture of integrated circuits was also found to be very smooth. Possibility of application of thin Pb~ _~Sn~Te films as the mechanical stress transducers. ANTOM ROGALSK1 and JANUSC RYBINSKI. Electron, Technol. 9, (3/4) 71 (1976). This paper presents the results on application of Pb~_~SnxTe (x = 0.18) thin films as the transducers of isotropic and anisotropic mechanical strains. Anisotropic compressive stresses cause conductivity increase of the p-type layers, and the tensile ones qts decrease, Opposite changes are induced in the n-type layers. Deformation sensitivity coefficient for the p-type layers is about 50 and depends very slightly on temperature in the range of 200 to 310 K. How-
ever, for the n-type layers this coefficient does not exceed 20 and increases with the temperature decrease. An attempt was made to explain the mechanism of physical phenomena occurring in the layer under stress. The isotropic pressure sensitivity was determined. There were also studied the properties of the /;-type thin films operating as the transducers of vary-varying pressures in non-conducting liquid media in the range up to 50(!a~ Transmission of the vary-varying pressures by layers tmdc~ coasideration and by the piezo-quartz transducer was compared. The dynamic error of pressure in the measurement track with the layers examined was estimated to be smaller than 1.5<;.
Application of tape automated bonding technology to hybrid microcircuits. DR. RUDOLPH, G. OSWALD and WILLIAM R. DE MIRANDA. Solid St. Technol, p. 33 (March 1977), There is currently a major effort underway to adapt Tape Automated Bonding (TAB) to hybrids. This effort involves pursuing tasks which seek to: (1) adapt available hmer Icad Bonding (ILB) technology to hybrid circuits and, {2} develop a form of Outer Lead Bonding (OLB) to single and multilayer ceramic substrates. Conventional hybrid lhbrication steps of wire bonding and die attach may then be replaced by steps which involve gang bonding of tape-supported leads to the chip pads and subsequent simultaneous positioning and bonding of the chip and leads to a ceramic substrate. A significant advantage of this assembly procedure is that electrical testing of chips is possible prior to mounting to the substrate. This results in minimized rework, corresponding high first pass )icld. and lower hybrid cost. Process steps within the TAB technology include tape manufacture, bumping (raising) of the pads on the integrated circuit chip,'inner lead bonding, chip testing, and outer lead bonding. Optional process steps now being considered are high and low temperature electrical lesting and burn-in of the chips while on tape
9. E L E C T R O N , ION AND LASER BEAMS Reduced lateral diffusion and reverse leakage in Beimplanted GaAst-xP~ diodes. PALLAB K. CHATTERJEE and B. G. STREETMAN. Solid-St. Electron. 2, 305 (1977). Lateral Zn diffusion under the Si3N 4 mask encountered in standard red GaAs0.rPo. 4 light emitting diodes can be eliminated in Be-implanted junctions. Typical reverse leakage current for implanted devices is ~ 5nA compared with 250nA for Zn-diffused diodes. Regrowth kinetics of amorphous Ge layers created by 74Ge and 2ssi implantation of Ge crystals. L. CSEVREGI, R. P. KULLEN, J. W. MAYER and T. W. SIGMON. Solid St. Corn, mun. 21, 1019 (1977). Epitaxial regrowth of ion-implanted amorphous Ge on the underlying crystal substrate occurs between 300 to 400°C with an activation energy of 2.0 eV and a rate of 100A/rain on (100) Ge at 350°C. The regrowth rate is strongly dependent on the orientation of the underlying Ge crystal. The regrowth behavior of amorphous Ge ig similar to that of implanted amorphous Si. Influence of ion sputtering and etching on the surface potential of passivated silicon. DANUTA BRZESINSKA, OLGA IKANOWICZ and JOZEF MITROS. Electron. Technol. 9, (3/4) 51 (1976). Effect of sputtering and ion-etching of dielectric and metallic films on the surface potential of the passivated silicon was investigated. The experiments were performed for determining the optimum conditions of sputtering and ion-etching processes used in the fabrication of sophisticated metallization and connexions of IC's. The annealing conditions which reduced the change of the surface potential due to the above mentioned processes were adjusted.
The r.fi sputtered silica films (0.1 0.6 Itml were deposited onto thermally oxided silicon wafers. Platinum layers used in multi-metal system (Ti-Pt-Aut were ion-etched in d.c. and r.f. discharge. The silicon surface potential was determined b~ high frequency capacitance-voltage measurements of the MOS capacitor.
An ion implanted bipolar silicon integrated circuit process. I. g. SANDERS. Microelectron. Reliah. 16, 75 (1977). Ioll implantation has been applied to the fabrication of bipolar transistors with improved high frequency performance and of fast logic bipolar integrated circuits, tn particular, the controlled production of buried n-type regions and narrow base widths has been achieved. The high dose arsenic implants (10~rionscm 2)required for the buried ~>type regions necessitate high ion dose rates. This can resull in unacceptably high defect densities in the subsequently grown epitaxial layer unless the beam power density is kept to a minimum whilst not compromising slice throughput. Integrated bipolar transistors have been fabricated with reproducible base widths of less than 2000 ~, implanting boron and arsenic current gain and peak F r in excess of 6 GHz, Thin silicon ion-implanted p-i-n photodiodes. R. G PLt~M~ and J. E. CARROLL. Solid St. Electron. Devices 1, (3) 89 (April 1977). Thin (6 #m) thick Si has been ion implanted to fabricate a p-i-n photodiode with an overall rise time probably better than 80ps. The narrow depletion region gives short transit times, and the shallow ion-implanted
World Abstracts on Microelectronics junctions lead to minimal amounts of minority carrier storage, thus eliminating any slow tail to the voltage-output response to a step change of fight input. Microwave field-effect transistors from sulpbur-implanted GaAs. W. KELLNW, H. KNIBPKAMP, D. RIS~W, M. HEINZLE and H. BOROFFKA. Solid-St. Electron. 20, 459
(1977). Sulphur implantation into semi-insulating Cr doped GaAs has been used to fabricate MESFETs with 1.5 am gatelength showing microwave gain equivalent to epitaxial FETs (MAG = 9 dB at 10 GHz) but higher noise. Room temperature implantation of S at an energy of 30 keV and a dose of 5 x 101Zcm-2 sputtered SiO, and SisN, as encapsulants and heat treatments from 820 to 900°C have been used. Electrical activation was found to depend critically on the substrate material. SisN,-encapsulation gave slightly higher electrical activation than SiOr. GaAs planar Gunn devices with sulfur-ion implanted n layers. TAKASHI MIZUTANI, TAKASH~ HONDA, HAHIME YAMAZAKI and MASAT~MO FUGJIIUOT~.Solid-St. Electron. 20,443 (1977). Planar type Gunn effect devices have been
fabricated by sulfur-ion implantation into the Cr doped semi-insulating GaAs substrates. The high doping efficiency as 90% was obtained as a result of long heat treatment. The mobility of the sulfur-ion implanted n layers with average carrier concentration of 4 x lOI cmm3 was 52OOcm*/Vsec at room temperature and 12,000cm2/Vsec at 77 K. The minimum gate trigger voltage of the Gunn effect digital devices was 1OOmV. Sulfur-ion implanted Gunn effect devices have shown superior current drop ratio dependence on doping-depth product, compared to the devices prepared from the epitaxial layer.
MA 1615-c
and Reliability
559
Mpltihyered ion-implanted Baritt diodes with improved efficiency. 0. EKNOYAN, E. S. YANG and S. M. SZE. Solid-St. Electron. 24l, 291 (1977). Based on the model suggested
in an accompanying paper Cl], diodes having the multilayered n+ipun+ structure have been fabricated from silicon material using ion implantation techniques. Systematic descriptions of their fabrication and evaluation are presented. Microwave CW oscillations at C-band (- 7.5 GHz) have been observed in some of our devices. The measured maximum power output was in the range of 40mW and the efficiency was - 5%. The obtained efficiency is the best reported for any BARITT diode. This result indicates that the retarding field region in BARITT diodes may be used advantageously to provide a favorable phase delay between the injected current and the a.c. voltage and leads to improved efficiency BARITT oscillators.
Optically
induced charge storage. in ion implanted SiOz. G. D~RDA. Solid-St. Electron. 20,
ERWIN P. JACOBSand
367 (1977). Charge storage in MOS structures with an ion
implanted oxide layer has been investigated. The electrons generated by internal photoemission are captured in Si02 traps which are created by the implantation of Kr+ and N+ ions at energies of SO-290 keV and a fluence up to 1014cm-2. The charge storage results in a voltage shift of the high frequency C-V curve. The dependence of electron storage on exposure time has been measured and compared with approximative calculations. The discharge of traps occurs by heating treatment and hints at the existence of deep oxide traps combined with structural lattice defects.
World Abstracts on Microelectronics and Reliability
The roughness parameters of glass films. D. J. WALTERand J. HOUGHTON. Vacuum 27 (I) 7 (1977). Thin films of Corning 7059 glass were deposited onto soda lime glass substrates by rf sputtering. Profiles of the surfaces of the films and substrates were obtained using a Tallystep, and these were digitally processed to yield the rms roughness amplitude of approximately 6 nm, the autocorrelation length of about 2.9 #m, and also the rms roughness angle of 0.3'. There was normally little difference between the roughness of the film and substrate. However it was found that the surface roughness of the films grown with the sputtering electrode earthing shield exposed, or else when a metal mask was placed on the substrate, were substantially rougher than films sputtered whilst the target covered the earthing shield and when a glass mask was used. It was concluded that the large roughness nodules were largely attributable to sputtered metallic particles forming preferential nucleation sites around which rapid growth occurred. Surface roughness profiles of Pilkington Float Glass were also obtained; the rms amplitude was 0.8 nm and the correlation length was 26.6#m. The extreme smoothness of this glass indicates that it might be useful as a substrate for rf sputtered glass ~ptical waveguides. A silicon slice as prepared for the manufacture of integrated circuits was also found to be very smooth. Possibility of application of thin Pb~ _~Sn~Te films as the mechanical stress transducers. ANTOM ROGALSK1 and JANUSC RYBINSKI. Electron, Technol. 9, (3/4) 71 (1976). This paper presents the results on application of Pb~_~SnxTe (x = 0.18) thin films as the transducers of isotropic and anisotropic mechanical strains. Anisotropic compressive stresses cause conductivity increase of the p-type layers, and the tensile ones qts decrease, Opposite changes are induced in the n-type layers. Deformation sensitivity coefficient for the p-type layers is about 50 and depends very slightly on temperature in the range of 200 to 310 K. How-
ever, for the n-type layers this coefficient does not exceed 20 and increases with the temperature decrease. An attempt was made to explain the mechanism of physical phenomena occurring in the layer under stress. The isotropic pressure sensitivity was determined. There were also studied the properties of the /;-type thin films operating as the transducers of vary-varying pressures in non-conducting liquid media in the range up to 50(!a~ Transmission of the vary-varying pressures by layers tmdc~ coasideration and by the piezo-quartz transducer was compared. The dynamic error of pressure in the measurement track with the layers examined was estimated to be smaller than 1.5<;.
Application of tape automated bonding technology to hybrid microcircuits. DR. RUDOLPH, G. OSWALD and WILLIAM R. DE MIRANDA. Solid St. Technol, p. 33 (March 1977), There is currently a major effort underway to adapt Tape Automated Bonding (TAB) to hybrids. This effort involves pursuing tasks which seek to: (1) adapt available hmer Icad Bonding (ILB) technology to hybrid circuits and, {2} develop a form of Outer Lead Bonding (OLB) to single and multilayer ceramic substrates. Conventional hybrid lhbrication steps of wire bonding and die attach may then be replaced by steps which involve gang bonding of tape-supported leads to the chip pads and subsequent simultaneous positioning and bonding of the chip and leads to a ceramic substrate. A significant advantage of this assembly procedure is that electrical testing of chips is possible prior to mounting to the substrate. This results in minimized rework, corresponding high first pass )icld. and lower hybrid cost. Process steps within the TAB technology include tape manufacture, bumping (raising) of the pads on the integrated circuit chip,'inner lead bonding, chip testing, and outer lead bonding. Optional process steps now being considered are high and low temperature electrical lesting and burn-in of the chips while on tape
9. E L E C T R O N , ION AND LASER BEAMS Reduced lateral diffusion and reverse leakage in Beimplanted GaAst-xP~ diodes. PALLAB K. CHATTERJEE and B. G. STREETMAN. Solid-St. Electron. 2, 305 (1977). Lateral Zn diffusion under the Si3N 4 mask encountered in standard red GaAs0.rPo. 4 light emitting diodes can be eliminated in Be-implanted junctions. Typical reverse leakage current for implanted devices is ~ 5nA compared with 250nA for Zn-diffused diodes. Regrowth kinetics of amorphous Ge layers created by 74Ge and 2ssi implantation of Ge crystals. L. CSEVREGI, R. P. KULLEN, J. W. MAYER and T. W. SIGMON. Solid St. Corn, mun. 21, 1019 (1977). Epitaxial regrowth of ion-implanted amorphous Ge on the underlying crystal substrate occurs between 300 to 400°C with an activation energy of 2.0 eV and a rate of 100A/rain on (100) Ge at 350°C. The regrowth rate is strongly dependent on the orientation of the underlying Ge crystal. The regrowth behavior of amorphous Ge ig similar to that of implanted amorphous Si. Influence of ion sputtering and etching on the surface potential of passivated silicon. DANUTA BRZESINSKA, OLGA IKANOWICZ and JOZEF MITROS. Electron. Technol. 9, (3/4) 51 (1976). Effect of sputtering and ion-etching of dielectric and metallic films on the surface potential of the passivated silicon was investigated. The experiments were performed for determining the optimum conditions of sputtering and ion-etching processes used in the fabrication of sophisticated metallization and connexions of IC's. The annealing conditions which reduced the change of the surface potential due to the above mentioned processes were adjusted.
The r.fi sputtered silica films (0.1 0.6 Itml were deposited onto thermally oxided silicon wafers. Platinum layers used in multi-metal system (Ti-Pt-Aut were ion-etched in d.c. and r.f. discharge. The silicon surface potential was determined b~ high frequency capacitance-voltage measurements of the MOS capacitor.
An ion implanted bipolar silicon integrated circuit process. I. g. SANDERS. Microelectron. Reliah. 16, 75 (1977). Ioll implantation has been applied to the fabrication of bipolar transistors with improved high frequency performance and of fast logic bipolar integrated circuits, tn particular, the controlled production of buried n-type regions and narrow base widths has been achieved. The high dose arsenic implants (10~rionscm 2)required for the buried ~>type regions necessitate high ion dose rates. This can resull in unacceptably high defect densities in the subsequently grown epitaxial layer unless the beam power density is kept to a minimum whilst not compromising slice throughput. Integrated bipolar transistors have been fabricated with reproducible base widths of less than 2000 ~, implanting boron and arsenic current gain and peak F r in excess of 6 GHz, Thin silicon ion-implanted p-i-n photodiodes. R. G PLt~M~ and J. E. CARROLL. Solid St. Electron. Devices 1, (3) 89 (April 1977). Thin (6 #m) thick Si has been ion implanted to fabricate a p-i-n photodiode with an overall rise time probably better than 80ps. The narrow depletion region gives short transit times, and the shallow ion-implanted
World Abstracts on Microelectronics junctions lead to minimal amounts of minority carrier storage, thus eliminating any slow tail to the voltage-output response to a step change of fight input. Microwave field-effect transistors from sulpbur-implanted GaAs. W. KELLNW, H. KNIBPKAMP, D. RIS~W, M. HEINZLE and H. BOROFFKA. Solid-St. Electron. 20, 459
(1977). Sulphur implantation into semi-insulating Cr doped GaAs has been used to fabricate MESFETs with 1.5 am gatelength showing microwave gain equivalent to epitaxial FETs (MAG = 9 dB at 10 GHz) but higher noise. Room temperature implantation of S at an energy of 30 keV and a dose of 5 x 101Zcm-2 sputtered SiO, and SisN, as encapsulants and heat treatments from 820 to 900°C have been used. Electrical activation was found to depend critically on the substrate material. SisN,-encapsulation gave slightly higher electrical activation than SiOr. GaAs planar Gunn devices with sulfur-ion implanted n layers. TAKASHI MIZUTANI, TAKASH~ HONDA, HAHIME YAMAZAKI and MASAT~MO FUGJIIUOT~.Solid-St. Electron. 20,443 (1977). Planar type Gunn effect devices have been
fabricated by sulfur-ion implantation into the Cr doped semi-insulating GaAs substrates. The high doping efficiency as 90% was obtained as a result of long heat treatment. The mobility of the sulfur-ion implanted n layers with average carrier concentration of 4 x lOI cmm3 was 52OOcm*/Vsec at room temperature and 12,000cm2/Vsec at 77 K. The minimum gate trigger voltage of the Gunn effect digital devices was 1OOmV. Sulfur-ion implanted Gunn effect devices have shown superior current drop ratio dependence on doping-depth product, compared to the devices prepared from the epitaxial layer.
MA 1615-c
and Reliability
559
Mpltihyered ion-implanted Baritt diodes with improved efficiency. 0. EKNOYAN, E. S. YANG and S. M. SZE. Solid-St. Electron. 24l, 291 (1977). Based on the model suggested
in an accompanying paper Cl], diodes having the multilayered n+ipun+ structure have been fabricated from silicon material using ion implantation techniques. Systematic descriptions of their fabrication and evaluation are presented. Microwave CW oscillations at C-band (- 7.5 GHz) have been observed in some of our devices. The measured maximum power output was in the range of 40mW and the efficiency was - 5%. The obtained efficiency is the best reported for any BARITT diode. This result indicates that the retarding field region in BARITT diodes may be used advantageously to provide a favorable phase delay between the injected current and the a.c. voltage and leads to improved efficiency BARITT oscillators.
Optically
induced charge storage. in ion implanted SiOz. G. D~RDA. Solid-St. Electron. 20,
ERWIN P. JACOBSand
367 (1977). Charge storage in MOS structures with an ion
implanted oxide layer has been investigated. The electrons generated by internal photoemission are captured in Si02 traps which are created by the implantation of Kr+ and N+ ions at energies of SO-290 keV and a fluence up to 1014cm-2. The charge storage results in a voltage shift of the high frequency C-V curve. The dependence of electron storage on exposure time has been measured and compared with approximative calculations. The discharge of traps occurs by heating treatment and hints at the existence of deep oxide traps combined with structural lattice defects.