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Thin SiO2 films nitrided by rapid thermal processing in NH3 or N2O for applications in EEPROMs
Microelectronics Journal, 25 (1994) 539-551
Thin Si02 films nitrided by rapid thermal processing in NHs or N20 for
applications in EEPROMs M. Dutoit, D. Bouvet, J. Mi, N. Novkovski* and P. Letourneau Institute for Micro- and Optoelectronics, Swiss Federal Institute of Technology, CH 1015 Lausanne, Switzerland
Thin silicon dioxide (SiO2) films nitrided by rapid thermal processing (RTP) in ammonia and nitrous oxide are compared. Their electrical characteristics (oxide and interface trapped charge densities, resistance to high-field stress, breakdown charge) are correlated with the concentration of nitrogen at the Si/SiO2 interface. An optimum in several parameters is found for very light nitridations (0.5-1 at.% N). In this case, a significant improvement in the reliability of non-volatile memories (EEPROMs) is anticipated.
programmable read-only memories (EEPROMs). These devices are programmed by the injection
o f electrons across a very thin film o f silicon dioxide (Si02). T h e reduction in oxide thickness, which is dictated by scaling rules, is currently being slowed d o w n (Fig. 1) because of the difficulty o f producing adequate films o f Si02. Process- and electrical stress-induced defects pose an ultimate limit. They are responsible for variations in the width o f the m e m o r y w i n d o w (the difference between written and erased threshold voltages) during operation and determine the endurance ( m a x i m u m n u m b e r o f programming cycles). Dielectric breakdown may also occur prematurely. Low-level leakage across the oxide, which affects the retention o f stored information, increases during the lifetime o f the memory.
*Visiting scientist at Lausanne. Permanent address: Physics Department, University ofSkopje, Skopje, Macedonia.
Thermal nitridation is k n o w n to improve the reliability o f thin films o f Si02. It lowers the
0026-2692/94/$7.00 © 1994 Elsevier Science Ltd
539
1. Introduction
ighly reliable thin dielectric films are needed for advanced integrated circuits, in H particular for electrically erasable and
M. Dutoit e t al./Thin Si02 films for EEPROMs
100
k
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Tunn~ oxide
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1995
Year
Fig. 1. Historical evolution of gate and tunnel oxide thicknesses. Data for tunnel oxide thickness are from two differentmanufacturers. electron trap generation rate during high-field stress and increases the breakdown charge. Processes using ammonia (NH3) [1, 2] or nitrous oxide (N20) [3, 4] in classical multiwafer or single-wafer rapid thermal processing (RTP) furnaces have been proposed. In the former case, a post-nitridation anneal in 02 (reoxydation) is needed to achieve satisfactory results. Its role seems to be to remove hydrogen which produces excess electron traps. Simultaneous oxidation and nitridation of bulk Si in N2 O or mixtures of 02 and N 2 0 were also investigated [5-7]. Other VLSI-compatible processes, such as plasma nitridation [8, 9] or ion implantation [10], have received less attention. In order to optimize a nitridation process for applications in EEPROMs, its impact on the initial electrical characteristics of the films and their variation after operation at high electrical fields needs to be assessed. The incorporation of nitrogen at the interfaces lowers the barrier height between the bulk, the gate and the oxide and creates or suppresses a number of processinduced defects (electron and hole traps, including interface traps). It reduces the damage induced by a high-field stress, although the contrary can also be observed.
540
A rigorous scientific approach to this problem would consist in determining the microscopic nature of these traps, their relationship with the profile and chemical bonding of nitrogen, and their electrical parameters (energy level in the SiO2 bandgap, capture and emission rates). One could then deduce the current-voltage characteristics by adequate models. Unfortunately, in spite of a very large body of literature on the subject, little progress has been made along this route. The difficulty is that, while electrical measurements are very sensitive to minute amounts of impurities or defects, they are difficult to unravel unambiguously. Often, the variation of trapped charge with electric field or current [11, 12] is neglected. This may explain some of the discrepancy between the conclusions of different authors. Physico-chemical analytical techniques still lack sensitivity and/or depth resolution. Much work still needs to be done in modelling the electrical behaviour of defects in SiO2. On the other hand, the pressure to obtain usable results fast has encouraged a more pragmatic engineering approach. By examining the influence of various technological parameters on the relevant electrical characteristics, adequate process recipes have been developed. A major problem in this case is the choice of which parameter to monitor. Direct optimization of a new tunnel oxide process module with complete EEPROMs is too time-consuming and costly. Therefore, simple MOS capacitor structures are widely used for this purpose. Most often, one monitors the charge to breakdown and the trap generation rate under constant-current or constant-voltage stress. There are several ways to estimate this rate, which differ according to the electric field used for the measurement. The relationship between measurements on MOS capacitors and the behaviour of EEPROMs is not yet precisely known [13-15]. MOS capacitors generally contain a much larger thin oxide area than E E P R O M cells. Differences in electric field and current waveforms in these devices
Microelectronics Journal, Vol. 25
further complicate the comparison. Furthermore, the processing of EEPROMs requires many more process steps which affect their electrical characteristics. This paper reviews our empirical optimization of NH3 and Y 2 0 processes. The goal was to evaluate the best results achievable in both cases. As far as possible, comparable samples and evaluation procedures were used.
2. Experimental Dielectric films of about 10 nm thickness were desired. Phosphorus-doped polysilicon gates were used in all cases. The optimization of the NH3 process was performed in an industrial facility on 4 in.-diameter boron-implanted (NA = 10 TM cm -3) wafers. All results shown here were obtained on reoxidized films. The range of parameters studied is shown in Table 1. Further process details can be found in [16]. The optimization of the N 2 0 process was done on 2 in.-diameter n-type (ND = 1016 cm -3) wafers in a research facility. Differences between these results and those obtained in an industrial line with similar process recipes will be noted when warranted. A preliminary account of our work with N 2 0 was presented previously [17]. Both high- and low-field electrical measurements were performed during and after constant-current stress. The former provide the electron trap generation rate (more exactly, they
evaluate the density of traps occupied at high fields, i.e. 7-12 MV/cm) and the charge to breakdown. High-frequency and quasi-static C-V measurements were used to determine oxide and interface traps filled at low fields (1-2 MV/cm). N o attempt was made to combine these two types of measurement to extract other parameters (e.g. charge centroid) since trap occupation changes too much between these field ranges [18]. In the first stages of a high-field stress, positive charges are revealed. Later on, electron trapping dominates [19]. Accordingly, we will refer to the low- and high-fluence regions respectively. The boundary between these regions depends on the relative importance of positive versus negative charge trapping and is thus sensitive to the injected current density. All along interface traps are also created. The two nitridation processes provide very similar results. The electrical characteristics of nitrided films seem to be related in a unique fashion to the concentration of N incorporated at the Si/SiO2 interface. Since, for optimum electrical results, very low concentrations of N (less than 1 at.%) are needed near the SiO//Si interface only [16, 20], accurate measurements of the nitrogen profile are very difficult. Auger electron spectroscopy, which is often used for this purpose, provides a limiting sensitivity of not much better than 1 at.%. Secondary ion mass spectroscopy (SIMS) can provide a higher useful sensitivity if proper precautions are taken [21].
TABLE 1 Range of process parameters for NH3 and N 2 0 nitridation (final film thickness 10 nm) Process
Oxidation
NH3
furnace: Tox = 900°C, RTP: Tox = 1050-1150°C
N20
RTP: Tox = 1100°C
Nitridation
Post-nitridation anneal
RTP: Tn = 950-1200°C t. variable RTP: T. = 900-1200°C tn variable
RTP: Tr = 1050-1150°C tr variable, 0 2 or N 2 none
541
M. Dutoit et al./Thin Si02 films for EEPROMs
3. 3.1
Results Ammonia-based
process
An important process parameter is the nitridation time tn. T h e charge to breakdown, Qba, after nitridation and reoxidation goes through a m a x i m u m for a very short nitridation time tnopt (Fig. 2), which decreases with increasing nitridation temperature Tn. Only near tnopt can Qb-a (under negative stress) be enhanced over that in pure oxides. Indeed, as a rule, for polysilicongate capacitors, it is m u c h more difficult to obtain satisfactory reliability for electron injection from the gate than from the substrate [22]. The reasons for this asymmetry are not well known. T h e magnitude o f the improvement afforded by nitridation depends only weakly on T,. As shown in Fig. 2, tnopt depends on current density. It is important to note that the quality o f the starting oxide plays a large role in the result achieved by nitridation: the worse the oxide, the larger the improvement [16]. For o p t i m u m nitridation conditions, reoxidation continuously improves Qba, as long as one does not start to reoxidize the interface. At 1150°C, a 60 s anneal 200
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in 0 2 provides the largest Qbd [16]. At lower temperatures, longer durations are needed, which reduce throughput. T h e reoxidation step complicates processing and makes it more difficult to accurately control the final film thickness. It would be preferable to perform this anneal under a non-oxidizing ambient. Unfortunately, annealing in N2 does not improve Qba as m u c h as in 0 2 [16]. W e ascribe the difference to the fact that the elimination o f nitrogen at the surface is slower in N2 than in 0 2 and thus impedes the escape o f hydrogen from the film. Furthermore, during reoxidation, more so than during annealing in N2, nitrogen is removed from the bulk o f the oxide. W e shall see later on that this might also explain the better result. T h e electron trap generation rate in the highfluence region (determined from the positive slope o f the ]Vg I - t curve during constantcurrent stress) decreases over the range o f tn studied here. T h e largest improvement is observed in the first 20 s (Fig. 3). For negative stress, a m i n i m u m can be surmised. Thus, the o p t i m u m tn is that which gives the qbd at the required m a x i m u m current density. T h e choice o f Tn is determined by the
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542
Microelectronics Journal, Vol. 25
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543
M. Dutoit et al./Thin Si02 films for EEPROMs
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Complete 1 kbit arrays were also fabricated on the same test chips. The read current distribution o f 10 arrays was measured. Whereas the initial distributions were very similar, the arrays with a nitrided tunnel oxide were m u c h less degraded after 2 million cycles than those with a standard oxide. An endurance o f well over 106 cycles was thus achieved, which is an order o f magnitude improvement. More recently, nchannel cells fabricated with an n-well 2 / a m S A C M O S process yielded very similar results.
Fig. 5. Fixed charge density vs. nitridation time in virgin samples (same batch as in Fig. 2). 3.2 Nitrous oxide-based process
grown in a classical or an R T P furnace. For optimized films, it is comparable, or even slightly better, than that o f the starting oxides. The reduction in barrier height at both interfaces is at most 0.1 eV for tn ~< 50 S at 1000°C [16]. O n the basis o f the above discussion, we chose the following optimum tunnel dielectric process module for further evaluation: furnace oxidation at 900°C, R T P nitridation at 1000°C for 10 s, and reoxidation at 1150°C for 60 s. In order to confirm the results obtained on M O S capacitors, we fabricated a few batches o f wafers with F L O T O X - t y p e E E P R O M cells and arrays. We used an industrial p-well 3 / a m C M O S process with self-aligned contacts (SACMOS) [16]. Note that the 56 nm-thick gate oxide was also exposed to nitridation and reoxidation. The electrical parameters measured on test chips (e.g. M O S F E T threshold voltage, current gain, diode leakage etc.) were not affected. The endurance o f individual cells exceeded 107 cycles. As expected from our results on M O S capacitors, w i n d o w closure was m u c h reduced. E E P R O M cells with an optimized tunnel dielectric had a slightly better retention (after a 20 h bake at 200°C) than those with a conven-
544
Several variants o f (oxy)nitridation processes in N 2 0 have been proposed in the literature. Direct oxidation o f Si in N 2 0 is the simplest one. Yet we choose to nitride a previously R T P grown SiO2 film because, in our R T P reactor (AG Heatpulse 410), we obtain a better thickness uniformity. This latter process also results in a lower N concentration in the film, which was found to be beneficial. With this process, the thickness o f the initial oxide must be adjusted to account for the growth during nitridation in N2O. The dependence o f electrical parameters on nitridation time and temperature is similar to that shown in Section 3.1. Qbd goes through a m a x i m u m as a function o f nitridation time (Fig. 6). The optimum nitridation time decreases w h e n the temperature is increased. At a given temperature, tnopt is somewhat longer than in NH3. The magnitude o f the improvement in Qba achieved under positive stress is somewhat smaller. The variation in the gate bias V~ needed to drive a constant current of+0-1 A/cm across a capacitor as a function o f injected fluence Qinj is shown in Fig. 7. The electron trap generation rate at high
Microelectronics Journal, Vol. 25
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fluences is strongly reduced in the early stages of nitridation before reaching a m i n i m u m value (Fig. 7). For a negative stress, the initial, positive charge trapping is also reduced, yielding flat VgQinj curves. This behaviour is similar to that observed for N H 3 processes. T h e variations in fixed and interface-trapped charge densities, Qf and Dit, as a function o f injected charge at a current density o f
j = +0.1 A/cm 2 are shown in Figs. 8 and 9. Veo first shifts to more negative values, revealing positive charges. U n d e r positive stress, for higher fluences, negative traps are apparent. Both positive and negative trapping is reduced by nitridation. Similarly, the interface trap generation rate is lowered (Fig. 9). T h e latter tendency can be reversed if nitridation is too strong (e.g. 80 s at 1100°C, not shown). For both parameters, a negative stress is more harmful.
545
M. Dutoit et al./Thin Si02 films for EEPROMs
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Fig. 9. Change in midgap interface trap density during stress at +0.1 A/cm2, with nitridation time in NzO at 1000°C as a parameter.
The reduction in these trap generation rates is thermally activated: the higher the nitridation temperature, the faster an approximately constant minimum value is reached. Below about 900°C, the nitridation is too weak to provide a sufficient improvement.
After a positive stress, it increases slightly; after a negative stress, it is reduced by nitridation.
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546
The initial quality o f these films is also enhanced for short nitridation times (Fig. 11). As a consequence, it appears that a very light nitridation yields the best results: improved initial quality and higher resistance to high-field stress. A suitable o p t i m u m process consists in nitriding a 7 nm thermal oxide in N 2 0 for about 10 s at
Microelectronics Journal, Vol. 25
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1000°C. Higher temperatures are n o t desirable; lower ones are insufficient to incorporate significant a m o u n t s o f N at the interface. W e have n o t yet confirmed the improvements obtained w i t h M O S capacitors o n complete E E P R O M s . Nevertheless, we are confident that endurance and retention can be significantly increased• This has already been demonstrated to
some extent, albeit w i t h process conditions that differ f r o m ours [24, 25].
4. Comparison of processes T h e modifications o f the electrical characteristics o f thin SiO2 films i n d u c e d by nitridation are summarized in Table 2. Even t h o u g h the processing was n o t the same, almost identical
547
M. Dutoit et al./Thin Si02 films for EEPROMs
TABLE 2 Summary o f changes due to nitridation Parameter
N H 3 (reoxidized)
N20
Initial characteristics Fixed charge density, Qf Interface state density, Dit After high-field stress
rain min
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min rain max
Note - indicates a decrease o f parameter with nitridation time; max (rain) indicates that parameter goes through a maximum (minimum) vs. nitridation time at at least one temperature.
trends are seen for the NH3 and Y 2 0 processes. Substrate type and resistivity play a minor role on charge trapping and breakdown [26]. A m o n g the other differences, the etching o f the polysilicon gates is probably the most important. T h e high-field trap generation rates are significantly higher after reactive ion etching (as on our NH3 wafers, Fig. 3) than after wet etching ( N 2 0 , Fig. 7). In the latter case, minimal trap generation rates o f about 3 x 108 cm-2s -1 were obtained. This difference was confirmed by comparing the results of our N 2 0 process with those obtained with the same nltridation recipe in an industrial line [17, 27]. It was previously demonstrated that Qt, a is closely related to the properties o f the Si/SiO2 interface. It tracks the oxidation resistance o f the residual oxynitride film, which is left on the Si substrate after stripping the SiO2 layer in diluted HF [28], and the midgap interface state density [23]. These and related results [20, 29-34] show the importance o f the N profile near the interface on the electrical characteristics o f nitrided S i O 2 films. In Fig. 12, we show the quantitative relationship between Qbd and the interface nitrogen concentration Nin t for a wide variety o f samples processed at different temperatures in N 2 0 . T h e
548
results for all these samples follow a unique trend, which is very similar for both stress polarities. Variations in the other electrical parameters are also mainly determined by Nin t [35]. In most cases, an o p t i m u m Nint between 2 and 4 x 1020 at./cm 3 is observed, which corresponds to about 0.5-1 at.%. In a previous paper, based on our measurements o f oxidation resistance of nitrided layers, we asserted that Nint goes through a m a x i m u m as a function o f nitridation time [28]. Recently, more accurate SIMS measurements showed that Nint increases monotonically as a function o f tn and saturates at a thermally activated value [21, 36]. Since some electrical properties go through an extremum as a function of Nint (Fig. 12, for example), it is clear that too m u c h N at the interface, and perhaps spill-over into the bulk o f the SiO2 film, is harmful. Even for the strongest nitridation studied here, we detect little or no diffusion of N into the Si [21]. Thus, there exists an o p t i m u m Ni,t between 0-5 and 1 at.%, which depends little on the way in which it is obtained. This value is similar to that necessary for the optimization of M O S F E T s [20]. For a nitridation in N 2 0 at 950°C, the maxim u m concentration is nearly the o p t i m u m value determined above. This explains w h y a furnace
Microelectronics Journal, Vol. 25
160
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Fig. 12. Relationship between breakdown charge and interface nitrogen concentration for samples nitrided in N20: (a) positive, (b) negativestress. nitridation at this temperature, which is very long compared to the time frame investigated here by RTP, yields satisfactory results [25]. The reason for the non-monotonous dependence of the electrical parameters o n N i n t is not clear. For NH3-nitrided films, charge trapping was modelled as the result of the opposing effects of nitrogen and hydrogen [2]. O f course, this does not apply in the case of an S 2 0 process. It is more likely that structural (mechanical strain) or chemical (coordination of Si at the interface) factors are responsible for the non-monotonous behaviour. Nitridation of thin films of SiO2 in NH3 introduces some N into the bulk of the oxide layer, whereas, during nitridation in N 2 0 , N mainly accumulates at the Si/SiO2 interface. According to our results, the latter seems to be preferable. 5. S u m m a r y
and c o n c l u s i o n s
W e described the successful empirical optimization of NH3- and N20-nitrided films for applications in EEPROMs. Similar results were obtained with both processes. In both cases, light nitridations provide the best compromise. Yet
the N20-based one is simpler and eliminates the deleterious effect of hydrogen. A further advantage o f N 2 0 nitridation is to provide N at the Si/ SiO2 interface only, without introducing any into the bulk of the oxide film. Indeed, the nitrogen concentration at the Si/SiO2 interface was shown to be the main factor determining the variation of the electrical properties of these films. An optimum for very small concentrations (about 0-5 at.%) was found in terms of both initial quality and resistance to high-field degradation. Several open questions remain. Foremost among them, the microscopic origin of the defect reduction due to nitridation is not known. Whereas the paramount importance of the bulk/ SiO2 interface was demonstrated, the role of the gate/SiO2 interface is not clear. It appears to be much less critical than the former. However, the mechanical stress imposed by the gate on the structure certainly plays a role. Even though an improvement of the endurance of EEPROMs was obtained, the precise relationship between the electrical properties of MOS capacitors and E E P R O M cells needs further research.
549
M. Dutoit et al./'l'hin Si02 if~ms for EEPROMs
Acknowledgements This w o r k w o u l d n o t have b e e n possible w i t h out the active collaboration o f o u r industrial partners. W e wish to thank J. Solo de Zaldivar, Faselec (Philips C o m p o n e n t s ) , Zurich, F. Pio and C. Riva, S G S - T h o m s o n Microelectronics, Central R & D , Agrate-Brianza, for their enthusiastic i n v o l v e m e n t in this research. W e also thank C. D u b o i s and J.C. D u p u y , I N S A , L y o n , for the high-resolution SIMS measurements. T h e c o n t i n u i n g e n c o u r a g e m e n t o f M. Ilegems is gratefully acknowledged. This w o r k was supported by grants f r o m the C o m m i s s i o n for the E n c o u r a g e m e n t o f Scientific Research, the Swiss National Science F o u n d a t i o n and the Swiss Federal Office for E d u c a t i o n and Science.
References [1] C.S. Jenq, T.-L. Chiu, B. Joshi andJ. Hu, Properties of thin oxynitride films used as floating-gate tunneling dielectrics, IEDM '82 Tech. Dig., San Francisco, 1982, p. 811. [2] T. Hori, H. Iwasaki and K. Tsuji, Electrical and physical properties of ultrathin reoxidized nitrided oxides prepared by rapid thermal processing, IEEE, ED 36 (1989) 340. [3] J. Ahn, W. Ting and D.-L. Kwong, Furnace nitridation of thermal SiO2 in pure N20 ambient for VLSI MOS applications, IEEE, EDL 13, (1992) 117. [4] H. Fukuda, M. Yasuda, T. Iwabuchi and S. Ohno, Novel N/O oxynitridation technology for forming highly reliable EEPROM tunnel oxide films, IEEE, EDL 12, (1991) 587. [5] H. Hwang, W. Ting, B. Maiti, D.-L. Kwong and J. Lee, Electrical characteristics of ultrathin oxynitride gate dielectric prepared by rapid thermal oxidation of Si in NzO, Appl. Phys. Lett., 57, (1990) 1010. [6] J. Ahn, W. Ting, S.N. Lin and D.L. Kwong, High quality ultrathin gate dielectrics formation by thermal oxidation of Si in N20, J. Electrochem. Soc., 138 (1991) L39. [7] Y. Okada, P.J. Tobin, R.I. Hegde, J. Liao and P. Rushbrook, Oxynitride gate dielectrics prepared by rapid thermal processing using mixtures of nitrous oxide and oxygen, Appl. Phys. Lett., 61 (1992) 3163. [8] S.S. Wong, C.G. Sodini, T.W. Ekstedt, H.R.
550
Grinolds, K.H. Jackson, S.H. Kwan and W.G. Oldham, Low pressure nitrided oxide as a thin gate dielectric for MOSFETs, J. Electrochem. Soc., 130 (1983) 1139. [9] P. Fazan, M. Dutoit and M. Ilegems, Nitridation of thin films of SiO2 in N2 and NH3 plasmas, Appl. Su~. Sci., 30 (1987) 224. [10] S. Haddad and M.-S. Liang, Improvement of thingate oxide integrity using through-silicon-gate nitrogen ion implantation, IEEE, EDL 8 (1987) 58. [11] M.V. Fischetti, R. Gastaldi, F. Maggioni and A. Modelli, Slow and fast states induced by hot electrons at Si-SiO2 interface, J. Appl. Phys., 53 (1982) 3136. [12] Y. Nissan-Cohen, J, Shappir and D. FrohmanBentchkowsky, Trap generation and occupation dynamics in SiO2 under charge injection stress, J. Appl. Phys., 60 (1986) 2024. [13] J. Manthey, M. Dutoit and M. Ilegems, Correlation between flatband voltage shift in MOS capacitors and endurance degradation of EEPROM cells, in G. Soncini and P. U. Calzolari (eds.), Solid State Devices, North-Holland, Amsterdam, 1988, p. 269. [14] J.S. Witters, G. Groeseneken and H.E. Maes, Degradation of tunnel-oxide floating gate EEPROM devices and the correlation with high field-currentinduced degradation of thin gate oxides, IEEE, ED 36 (1989) 1663. [15] C. Papadas, G. Ghibaudo, G. Pananakakis and C. Riva, Numerical transient simulation of the programming window degradation in FLOTOX EEPROM cells, Solid State Electron., 36 (1993) 1303. [16] M. Dutoit, P. Letourneau, J. Mi, N. Novkovski, J. Manthey and J. Solo de Zaldivar, Optimization of thin oxynitride films produced by rapid thermal processing for applications in EEPROMs, J. Electrochem. Soc., .140 (1993) 549. [17] D. Bouvet, N. Novkovski, J. Mi, P. Letourneau, M. Dutoit, F. Pio, C. Riva and N. Bellafiore, Comparison of RTP N20- and NH3-nitrided thin SiO2 films, in J. Borel, P. Gentil, J.P. Noblanc A. Nouailhat and M. Verdone (eds.), Proc. ESSDERC '93, Editions Fronti~res, Gyf-sur-Yvette, 1993, p. 407. [18] D.J. DiMaria and J.H. Stathis, Trapping and trap creation studies on nitrided and reoxidized-nitrided silicon dioxide films on silicon, J. Appl. Phys., 70 (1991) 1500. [19] P. Fazan, M. Dutoit, C. Martin and M. Ilegems, Charge generation in thin Si02 polysilicon-gate MOS capacitors, Solid-State Electron., 30 (1987) 829. [20] H.S. Momose, T. Morimoto, Y. Ozawa, M. Tsuchiaki, M. Ono, K. Yamabe and H. Iwai, Very lightly nitrided oxide gate MOSFETs for deepsub-micron CMOS devices, IEDM '91 Tech. Dig.,
Microelectronics Journal, Vol. 25
Washington, DC, 1991, p. 359; to be published in IEEE ED. [21] J. Mi, D. Bouvet, P. Letourneau, N. Xanthopoulos, H.J. Mathieu, M. Dutoit, C. Dubois andJ.C. Dupuy, High-resolution SIMS profiling of nitrogen in ultrathin Si02 films nitrided by RTP in NH3 and N20, Microelectron. Eng., 22 (1993) 81. [22] A.T. Wu, V. Murah, J. Nulman, B. Triplett, D.P. Fraser and M. Garner, Gate bias polarity dependence of charge trapping and time-dependent dielectric breakdown in nitrided and reoxidized nitrided oxides, IEEE, EDL 10 (1989) 443. [23] N. Novkovski, M. Dutoit and J. Solo de Zaldivar, Dielectric breakdown in thin Si oxynitride films produced by rapid thermal processing, Appl. Phys. Lett., 56 (1990) 2120. [24] U. Sharma, R. Maozzami, P. Tobin, Y. Okada, S. Cheng and J. Yeargain, Vertically scaled, high reliability EEPROM devices with ultra-thin oxynitride films prepared by RTP in N20/02 ambient, IEDM '92 Tech. Dig., San Francisco, 1992, p. 461. [25] H.G. Pomp, P.H. Woerlee, R. Woltjer, G. Paulzen, H. Lifka, J.S. de Zaldivar and S. Vecsernyes, Lightly N20 nitrided dielectrics grown in a conventional furnace for E2PROM and 0.25 pm CMOS, IEDM '93 Tech. Dig., Washington, DC, 1993, p. 463. [26] J. Manthey, Degradation of thin silicon dioxide films and EEPROM cells, DSc Thesis No 832, EPFL 1990. [27] N. Bellafiore, F. Pio and C. Riva, Thin oxide nitridation in N20 by RTP for non-volatile memories, Microelectmn. J., 24 (1992) 453. [28] N. Novkovski, I. Aizenberg, E. Goin, E. Fullin and
[29]
[30] [31]
[32]
[33]
[34]
[35] [36]
M. Dutoit, Characterization of very thin Si oxynitride films produced by rapid thermal processing, Appl. Phys. Lett., 54 (1989) 2408. Y. Naito, T. Hori, H. lwasaki and H. Esaki, Effect of nitrogen distribution in nitrided oxide prepared by rapid thermal annealing on its electrical characteristics,J. Vac. Sci. Technol., B5 (1987) 633. W. Yang, R. Jayaraman and C.G. Sodoni, Optimization of low-pressure nitridation/reoxidation of SiO2 for scaled MOS devices, IEEE, ED 35 (1988) 935. T. Hori, H. Iwasaki, T. Ohmura, A. Samizo, M. Sato and Y. Yoshioka, Compositional study of ultrathin rapidly reoxidized nitrided oxides,J. Appl. Phys., 65, (1989) 629. L.V. Munukutla, B. Morady, J.N. Fordemwalt, M.R. Moore and K. Evans, Correlation between interface nitrogen and its fixed charge in thermally nitrided silicon dioxide on silicon, J. Appl. Phys., 68 (1990) 4662. M. Yasuda, H. Fukuda, T. Iwabuchi and S. Ohno, Role of SiN bond formed by N20-oxynitridation for improving dielectric properties of ultrathin SiO2 films,Jpn.J. Appl. Phys., 30 (1991) 3597. Y. Okada, P.J. Tobin, V. Lakhotia, W.A. Feil, S.A. Ajuria and R.I. Hegde, Relationship between growth conditions, nitrogen profile, and charge to breakdown of gate oxynitrides grown from pure N20, Appl. Phys. Lett., 63 (1993) 194. D. Bouvet, to be published. G. Weidner, R. Kurps, K. Blum and D. Kriiger, Nitrogen saturation behaviour near the SiO2/Siinterface during N20-rapid thermal oxidation, Microelectron. Eng., 22 (1993) 77.
551
Thin Si02 films nitrided by rapid thermal processing in NHs or N20 for
applications in EEPROMs M. Dutoit, D. Bouvet, J. Mi, N. Novkovski* and P. Letourneau Institute for Micro- and Optoelectronics, Swiss Federal Institute of Technology, CH 1015 Lausanne, Switzerland
Thin silicon dioxide (SiO2) films nitrided by rapid thermal processing (RTP) in ammonia and nitrous oxide are compared. Their electrical characteristics (oxide and interface trapped charge densities, resistance to high-field stress, breakdown charge) are correlated with the concentration of nitrogen at the Si/SiO2 interface. An optimum in several parameters is found for very light nitridations (0.5-1 at.% N). In this case, a significant improvement in the reliability of non-volatile memories (EEPROMs) is anticipated.
programmable read-only memories (EEPROMs). These devices are programmed by the injection
o f electrons across a very thin film o f silicon dioxide (Si02). T h e reduction in oxide thickness, which is dictated by scaling rules, is currently being slowed d o w n (Fig. 1) because of the difficulty o f producing adequate films o f Si02. Process- and electrical stress-induced defects pose an ultimate limit. They are responsible for variations in the width o f the m e m o r y w i n d o w (the difference between written and erased threshold voltages) during operation and determine the endurance ( m a x i m u m n u m b e r o f programming cycles). Dielectric breakdown may also occur prematurely. Low-level leakage across the oxide, which affects the retention o f stored information, increases during the lifetime o f the memory.
*Visiting scientist at Lausanne. Permanent address: Physics Department, University ofSkopje, Skopje, Macedonia.
Thermal nitridation is k n o w n to improve the reliability o f thin films o f Si02. It lowers the
0026-2692/94/$7.00 © 1994 Elsevier Science Ltd
539
1. Introduction
ighly reliable thin dielectric films are needed for advanced integrated circuits, in H particular for electrically erasable and
M. Dutoit e t al./Thin Si02 films for EEPROMs
100
k
A
E
!
k Gain oxide
i,o
Tunn~ oxide
111,~
~
•
197s
gbo
1995
Year
Fig. 1. Historical evolution of gate and tunnel oxide thicknesses. Data for tunnel oxide thickness are from two differentmanufacturers. electron trap generation rate during high-field stress and increases the breakdown charge. Processes using ammonia (NH3) [1, 2] or nitrous oxide (N20) [3, 4] in classical multiwafer or single-wafer rapid thermal processing (RTP) furnaces have been proposed. In the former case, a post-nitridation anneal in 02 (reoxydation) is needed to achieve satisfactory results. Its role seems to be to remove hydrogen which produces excess electron traps. Simultaneous oxidation and nitridation of bulk Si in N2 O or mixtures of 02 and N 2 0 were also investigated [5-7]. Other VLSI-compatible processes, such as plasma nitridation [8, 9] or ion implantation [10], have received less attention. In order to optimize a nitridation process for applications in EEPROMs, its impact on the initial electrical characteristics of the films and their variation after operation at high electrical fields needs to be assessed. The incorporation of nitrogen at the interfaces lowers the barrier height between the bulk, the gate and the oxide and creates or suppresses a number of processinduced defects (electron and hole traps, including interface traps). It reduces the damage induced by a high-field stress, although the contrary can also be observed.
540
A rigorous scientific approach to this problem would consist in determining the microscopic nature of these traps, their relationship with the profile and chemical bonding of nitrogen, and their electrical parameters (energy level in the SiO2 bandgap, capture and emission rates). One could then deduce the current-voltage characteristics by adequate models. Unfortunately, in spite of a very large body of literature on the subject, little progress has been made along this route. The difficulty is that, while electrical measurements are very sensitive to minute amounts of impurities or defects, they are difficult to unravel unambiguously. Often, the variation of trapped charge with electric field or current [11, 12] is neglected. This may explain some of the discrepancy between the conclusions of different authors. Physico-chemical analytical techniques still lack sensitivity and/or depth resolution. Much work still needs to be done in modelling the electrical behaviour of defects in SiO2. On the other hand, the pressure to obtain usable results fast has encouraged a more pragmatic engineering approach. By examining the influence of various technological parameters on the relevant electrical characteristics, adequate process recipes have been developed. A major problem in this case is the choice of which parameter to monitor. Direct optimization of a new tunnel oxide process module with complete EEPROMs is too time-consuming and costly. Therefore, simple MOS capacitor structures are widely used for this purpose. Most often, one monitors the charge to breakdown and the trap generation rate under constant-current or constant-voltage stress. There are several ways to estimate this rate, which differ according to the electric field used for the measurement. The relationship between measurements on MOS capacitors and the behaviour of EEPROMs is not yet precisely known [13-15]. MOS capacitors generally contain a much larger thin oxide area than E E P R O M cells. Differences in electric field and current waveforms in these devices
Microelectronics Journal, Vol. 25
further complicate the comparison. Furthermore, the processing of EEPROMs requires many more process steps which affect their electrical characteristics. This paper reviews our empirical optimization of NH3 and Y 2 0 processes. The goal was to evaluate the best results achievable in both cases. As far as possible, comparable samples and evaluation procedures were used.
2. Experimental Dielectric films of about 10 nm thickness were desired. Phosphorus-doped polysilicon gates were used in all cases. The optimization of the NH3 process was performed in an industrial facility on 4 in.-diameter boron-implanted (NA = 10 TM cm -3) wafers. All results shown here were obtained on reoxidized films. The range of parameters studied is shown in Table 1. Further process details can be found in [16]. The optimization of the N 2 0 process was done on 2 in.-diameter n-type (ND = 1016 cm -3) wafers in a research facility. Differences between these results and those obtained in an industrial line with similar process recipes will be noted when warranted. A preliminary account of our work with N 2 0 was presented previously [17]. Both high- and low-field electrical measurements were performed during and after constant-current stress. The former provide the electron trap generation rate (more exactly, they
evaluate the density of traps occupied at high fields, i.e. 7-12 MV/cm) and the charge to breakdown. High-frequency and quasi-static C-V measurements were used to determine oxide and interface traps filled at low fields (1-2 MV/cm). N o attempt was made to combine these two types of measurement to extract other parameters (e.g. charge centroid) since trap occupation changes too much between these field ranges [18]. In the first stages of a high-field stress, positive charges are revealed. Later on, electron trapping dominates [19]. Accordingly, we will refer to the low- and high-fluence regions respectively. The boundary between these regions depends on the relative importance of positive versus negative charge trapping and is thus sensitive to the injected current density. All along interface traps are also created. The two nitridation processes provide very similar results. The electrical characteristics of nitrided films seem to be related in a unique fashion to the concentration of N incorporated at the Si/SiO2 interface. Since, for optimum electrical results, very low concentrations of N (less than 1 at.%) are needed near the SiO//Si interface only [16, 20], accurate measurements of the nitrogen profile are very difficult. Auger electron spectroscopy, which is often used for this purpose, provides a limiting sensitivity of not much better than 1 at.%. Secondary ion mass spectroscopy (SIMS) can provide a higher useful sensitivity if proper precautions are taken [21].
TABLE 1 Range of process parameters for NH3 and N 2 0 nitridation (final film thickness 10 nm) Process
Oxidation
NH3
furnace: Tox = 900°C, RTP: Tox = 1050-1150°C
N20
RTP: Tox = 1100°C
Nitridation
Post-nitridation anneal
RTP: Tn = 950-1200°C t. variable RTP: T. = 900-1200°C tn variable
RTP: Tr = 1050-1150°C tr variable, 0 2 or N 2 none
541
M. Dutoit et al./Thin Si02 films for EEPROMs
3. 3.1
Results Ammonia-based
process
An important process parameter is the nitridation time tn. T h e charge to breakdown, Qba, after nitridation and reoxidation goes through a m a x i m u m for a very short nitridation time tnopt (Fig. 2), which decreases with increasing nitridation temperature Tn. Only near tnopt can Qb-a (under negative stress) be enhanced over that in pure oxides. Indeed, as a rule, for polysilicongate capacitors, it is m u c h more difficult to obtain satisfactory reliability for electron injection from the gate than from the substrate [22]. The reasons for this asymmetry are not well known. T h e magnitude o f the improvement afforded by nitridation depends only weakly on T,. As shown in Fig. 2, tnopt depends on current density. It is important to note that the quality o f the starting oxide plays a large role in the result achieved by nitridation: the worse the oxide, the larger the improvement [16]. For o p t i m u m nitridation conditions, reoxidation continuously improves Qba, as long as one does not start to reoxidize the interface. At 1150°C, a 60 s anneal 200
....
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.
in 0 2 provides the largest Qbd [16]. At lower temperatures, longer durations are needed, which reduce throughput. T h e reoxidation step complicates processing and makes it more difficult to accurately control the final film thickness. It would be preferable to perform this anneal under a non-oxidizing ambient. Unfortunately, annealing in N2 does not improve Qba as m u c h as in 0 2 [16]. W e ascribe the difference to the fact that the elimination o f nitrogen at the surface is slower in N2 than in 0 2 and thus impedes the escape o f hydrogen from the film. Furthermore, during reoxidation, more so than during annealing in N2, nitrogen is removed from the bulk o f the oxide. W e shall see later on that this might also explain the better result. T h e electron trap generation rate in the highfluence region (determined from the positive slope o f the ]Vg I - t curve during constantcurrent stress) decreases over the range o f tn studied here. T h e largest improvement is observed in the first 20 s (Fig. 3). For negative stress, a m i n i m u m can be surmised. Thus, the o p t i m u m tn is that which gives the qbd at the required m a x i m u m current density. T h e choice o f Tn is determined by the
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542
Microelectronics Journal, Vol. 25
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543
M. Dutoit et al./Thin Si02 films for EEPROMs
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Complete 1 kbit arrays were also fabricated on the same test chips. The read current distribution o f 10 arrays was measured. Whereas the initial distributions were very similar, the arrays with a nitrided tunnel oxide were m u c h less degraded after 2 million cycles than those with a standard oxide. An endurance o f well over 106 cycles was thus achieved, which is an order o f magnitude improvement. More recently, nchannel cells fabricated with an n-well 2 / a m S A C M O S process yielded very similar results.
Fig. 5. Fixed charge density vs. nitridation time in virgin samples (same batch as in Fig. 2). 3.2 Nitrous oxide-based process
grown in a classical or an R T P furnace. For optimized films, it is comparable, or even slightly better, than that o f the starting oxides. The reduction in barrier height at both interfaces is at most 0.1 eV for tn ~< 50 S at 1000°C [16]. O n the basis o f the above discussion, we chose the following optimum tunnel dielectric process module for further evaluation: furnace oxidation at 900°C, R T P nitridation at 1000°C for 10 s, and reoxidation at 1150°C for 60 s. In order to confirm the results obtained on M O S capacitors, we fabricated a few batches o f wafers with F L O T O X - t y p e E E P R O M cells and arrays. We used an industrial p-well 3 / a m C M O S process with self-aligned contacts (SACMOS) [16]. Note that the 56 nm-thick gate oxide was also exposed to nitridation and reoxidation. The electrical parameters measured on test chips (e.g. M O S F E T threshold voltage, current gain, diode leakage etc.) were not affected. The endurance o f individual cells exceeded 107 cycles. As expected from our results on M O S capacitors, w i n d o w closure was m u c h reduced. E E P R O M cells with an optimized tunnel dielectric had a slightly better retention (after a 20 h bake at 200°C) than those with a conven-
544
Several variants o f (oxy)nitridation processes in N 2 0 have been proposed in the literature. Direct oxidation o f Si in N 2 0 is the simplest one. Yet we choose to nitride a previously R T P grown SiO2 film because, in our R T P reactor (AG Heatpulse 410), we obtain a better thickness uniformity. This latter process also results in a lower N concentration in the film, which was found to be beneficial. With this process, the thickness o f the initial oxide must be adjusted to account for the growth during nitridation in N2O. The dependence o f electrical parameters on nitridation time and temperature is similar to that shown in Section 3.1. Qbd goes through a m a x i m u m as a function o f nitridation time (Fig. 6). The optimum nitridation time decreases w h e n the temperature is increased. At a given temperature, tnopt is somewhat longer than in NH3. The magnitude o f the improvement in Qba achieved under positive stress is somewhat smaller. The variation in the gate bias V~ needed to drive a constant current of+0-1 A/cm across a capacitor as a function o f injected fluence Qinj is shown in Fig. 7. The electron trap generation rate at high
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fluences is strongly reduced in the early stages of nitridation before reaching a m i n i m u m value (Fig. 7). For a negative stress, the initial, positive charge trapping is also reduced, yielding flat VgQinj curves. This behaviour is similar to that observed for N H 3 processes. T h e variations in fixed and interface-trapped charge densities, Qf and Dit, as a function o f injected charge at a current density o f
j = +0.1 A/cm 2 are shown in Figs. 8 and 9. Veo first shifts to more negative values, revealing positive charges. U n d e r positive stress, for higher fluences, negative traps are apparent. Both positive and negative trapping is reduced by nitridation. Similarly, the interface trap generation rate is lowered (Fig. 9). T h e latter tendency can be reversed if nitridation is too strong (e.g. 80 s at 1100°C, not shown). For both parameters, a negative stress is more harmful.
545
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The reduction in these trap generation rates is thermally activated: the higher the nitridation temperature, the faster an approximately constant minimum value is reached. Below about 900°C, the nitridation is too weak to provide a sufficient improvement.
After a positive stress, it increases slightly; after a negative stress, it is reduced by nitridation.
Fig. 10 shows the leakage current after 1 C / c m 2 was injected across the oxide at +0-1 A/cm 2.
546
The initial quality o f these films is also enhanced for short nitridation times (Fig. 11). As a consequence, it appears that a very light nitridation yields the best results: improved initial quality and higher resistance to high-field stress. A suitable o p t i m u m process consists in nitriding a 7 nm thermal oxide in N 2 0 for about 10 s at
Microelectronics Journal, Vol. 25
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1000°C. Higher temperatures are n o t desirable; lower ones are insufficient to incorporate significant a m o u n t s o f N at the interface. W e have n o t yet confirmed the improvements obtained w i t h M O S capacitors o n complete E E P R O M s . Nevertheless, we are confident that endurance and retention can be significantly increased• This has already been demonstrated to
some extent, albeit w i t h process conditions that differ f r o m ours [24, 25].
4. Comparison of processes T h e modifications o f the electrical characteristics o f thin SiO2 films i n d u c e d by nitridation are summarized in Table 2. Even t h o u g h the processing was n o t the same, almost identical
547
M. Dutoit et al./Thin Si02 films for EEPROMs
TABLE 2 Summary o f changes due to nitridation Parameter
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trends are seen for the NH3 and Y 2 0 processes. Substrate type and resistivity play a minor role on charge trapping and breakdown [26]. A m o n g the other differences, the etching o f the polysilicon gates is probably the most important. T h e high-field trap generation rates are significantly higher after reactive ion etching (as on our NH3 wafers, Fig. 3) than after wet etching ( N 2 0 , Fig. 7). In the latter case, minimal trap generation rates o f about 3 x 108 cm-2s -1 were obtained. This difference was confirmed by comparing the results of our N 2 0 process with those obtained with the same nltridation recipe in an industrial line [17, 27]. It was previously demonstrated that Qt, a is closely related to the properties o f the Si/SiO2 interface. It tracks the oxidation resistance o f the residual oxynitride film, which is left on the Si substrate after stripping the SiO2 layer in diluted HF [28], and the midgap interface state density [23]. These and related results [20, 29-34] show the importance o f the N profile near the interface on the electrical characteristics o f nitrided S i O 2 films. In Fig. 12, we show the quantitative relationship between Qbd and the interface nitrogen concentration Nin t for a wide variety o f samples processed at different temperatures in N 2 0 . T h e
548
results for all these samples follow a unique trend, which is very similar for both stress polarities. Variations in the other electrical parameters are also mainly determined by Nin t [35]. In most cases, an o p t i m u m Nint between 2 and 4 x 1020 at./cm 3 is observed, which corresponds to about 0.5-1 at.%. In a previous paper, based on our measurements o f oxidation resistance of nitrided layers, we asserted that Nint goes through a m a x i m u m as a function o f nitridation time [28]. Recently, more accurate SIMS measurements showed that Nint increases monotonically as a function o f tn and saturates at a thermally activated value [21, 36]. Since some electrical properties go through an extremum as a function of Nint (Fig. 12, for example), it is clear that too m u c h N at the interface, and perhaps spill-over into the bulk o f the SiO2 film, is harmful. Even for the strongest nitridation studied here, we detect little or no diffusion of N into the Si [21]. Thus, there exists an o p t i m u m Ni,t between 0-5 and 1 at.%, which depends little on the way in which it is obtained. This value is similar to that necessary for the optimization of M O S F E T s [20]. For a nitridation in N 2 0 at 950°C, the maxim u m concentration is nearly the o p t i m u m value determined above. This explains w h y a furnace
Microelectronics Journal, Vol. 25
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Fig. 12. Relationship between breakdown charge and interface nitrogen concentration for samples nitrided in N20: (a) positive, (b) negativestress. nitridation at this temperature, which is very long compared to the time frame investigated here by RTP, yields satisfactory results [25]. The reason for the non-monotonous dependence of the electrical parameters o n N i n t is not clear. For NH3-nitrided films, charge trapping was modelled as the result of the opposing effects of nitrogen and hydrogen [2]. O f course, this does not apply in the case of an S 2 0 process. It is more likely that structural (mechanical strain) or chemical (coordination of Si at the interface) factors are responsible for the non-monotonous behaviour. Nitridation of thin films of SiO2 in NH3 introduces some N into the bulk of the oxide layer, whereas, during nitridation in N 2 0 , N mainly accumulates at the Si/SiO2 interface. According to our results, the latter seems to be preferable. 5. S u m m a r y
and c o n c l u s i o n s
W e described the successful empirical optimization of NH3- and N20-nitrided films for applications in EEPROMs. Similar results were obtained with both processes. In both cases, light nitridations provide the best compromise. Yet
the N20-based one is simpler and eliminates the deleterious effect of hydrogen. A further advantage o f N 2 0 nitridation is to provide N at the Si/ SiO2 interface only, without introducing any into the bulk of the oxide film. Indeed, the nitrogen concentration at the Si/SiO2 interface was shown to be the main factor determining the variation of the electrical properties of these films. An optimum for very small concentrations (about 0-5 at.%) was found in terms of both initial quality and resistance to high-field degradation. Several open questions remain. Foremost among them, the microscopic origin of the defect reduction due to nitridation is not known. Whereas the paramount importance of the bulk/ SiO2 interface was demonstrated, the role of the gate/SiO2 interface is not clear. It appears to be much less critical than the former. However, the mechanical stress imposed by the gate on the structure certainly plays a role. Even though an improvement of the endurance of EEPROMs was obtained, the precise relationship between the electrical properties of MOS capacitors and E E P R O M cells needs further research.
549
M. Dutoit et al./'l'hin Si02 if~ms for EEPROMs
Acknowledgements This w o r k w o u l d n o t have b e e n possible w i t h out the active collaboration o f o u r industrial partners. W e wish to thank J. Solo de Zaldivar, Faselec (Philips C o m p o n e n t s ) , Zurich, F. Pio and C. Riva, S G S - T h o m s o n Microelectronics, Central R & D , Agrate-Brianza, for their enthusiastic i n v o l v e m e n t in this research. W e also thank C. D u b o i s and J.C. D u p u y , I N S A , L y o n , for the high-resolution SIMS measurements. T h e c o n t i n u i n g e n c o u r a g e m e n t o f M. Ilegems is gratefully acknowledged. This w o r k was supported by grants f r o m the C o m m i s s i o n for the E n c o u r a g e m e n t o f Scientific Research, the Swiss National Science F o u n d a t i o n and the Swiss Federal Office for E d u c a t i o n and Science.
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