- Email: [email protected]
Three-level Gunn-effect logic
Solid-Stole Ekcrmnics
Pergamon Press 1971. Vol. 14, pp. 439-444.
THREE-LEVEL Electrotechnical
Printed in Great Britain
GUNN-EFFECT
LOGIC
H. L. HARTNAGEL* Laboratory, Tanashi, Tokyo, Japan
(Received 11August 1970; in revisedjbrm 26 October 1970) three-level Gunn-diode system is studied, which uses positive and negative pulses for the on and off signals respectively. Regenerators and the basic logic circuits (AND, OR, Inverter) have been developed and experimental results are presented.
Abstract-A
R&me--Un generateurs p&sent&.
circuit g diodes de Gunn est dCcrit qui utilize des signaux positives et ntgatives. RCet les Gments logiques principaux sont dtvelopCs et les rtsultats experimentaux sont
Zusammenfassung-Ein Gunneffekt-Schaltkreis wurde untersucht, der positive und negative Signale benutzt. Reaeneratoren und die wesentlichen loeischen Elemente wurden entwickelt und experimentelle Ergebnisse werden beschrieben. 1. INTRODUCTION
pulse indicating on and the absence of a pulse shows that no information is flowing. Such a system is also of value for applications of fail-safe logic, and has additional advantages such as the fact that a signal pulse does not have to be separated from the bias voltage level, as is commonly the case with two-level Gunn-effect logic. Three-level Gunn-effect pulse devices are similar to Goto pairs of tunnel-diode logic, and represent a further development of the two-diode circuit of White and Adams[2]. A detailed experimental study was performed resulting in design criteria for several new devices.
of the Gunn-effect domain for digital processing has been studied by numerous authors, because it enables one to obtain very high speed of operation. A range of logic gates has already been developed. They are based on a two-level system, where the on-condition is represented by a domain pulse and the off-condition is given by the absence of a pulse. The absence of a pulse does, however, also occur when no signal flow is present, so that a certain ambiguity can exist. This is particularly so in connection with inverter gates. As Gunn-logic uses monostable components, these gates would produce output pulses for both the input cases of an o$ signal and of no information Jaw. An example of an inverter has been reported[l] recently, where a Gunn diode is biased slightly above the threshold T for domain nucleation and an input pulse of opposite polarity brings the field in the diode below T. Output pulses are therefore produced when no input is applied. To distinguish then between an 08 signal and no informationjow, one will have to use changes in bias voltage so that the inverter is only energized when some signal is to be expected. This difficulty can be avoided by employing three-level Gunn logic, which produces, say, a negative pulse representing o$ a positive
THE
USE
2. BASIC ELEMENTS
The basic unit is given by a series combination of two Gunn diodes as shown in Fig. 1. The bias voltages are applied in such a way that the middle point of the chain is at earth when no domain is present. They are just below threshold for domain nucleation so that a small input signal applied to the middle point will nucleate a domain in one of the diodes. If the signal voltage is positive, the diode with the negative bias voltage nucleates a domain and a positive regenerated output pulse is produced. On the other hand, a negative input signal triggers the other diode and a negative output pulse results. For the present study, sandwich-type Gunn diodes were prepared by evaporating Au-Ge-Ni on the two polished and etched large surfaces of a 350~ thick wafer (resistivity 1 Q cm, mobility
*On leave from Dept. Electronics and Electrical Engineering, University of Sheffield, England, now Dept. Electronics and Electrical Engineering, University of Newcastle upon Tyne, England. 439
H. L. HARTNAGEL
440
50 R
+“B
“g
O-1
0 A
input-_)
ii I doutput
Vs
P
Ti --&-output
B
!I! F
-"B
Fig. 1. Basic unit of three-level Gunn-effect
logic.
6000 cm2/V set). After alloying in H, gas at 450°C for 10 set, the wafer was cut by wire saw into diodes of about 300 times 600~ cross-sectional size, so that, for the resistivities employed, the low-field resistance was always around 50 Q. The diodes were inserted in a short laboratory-type strip line with coaxial transitions. They were carefully tested with respect to oscillation threshold voltages V,, peak-to-valley ratios and duration of produced pulses so that suitable diodes could be combined to form pairs. Most investigations were performed by using a short triggering pulse I’, generated by suitably inserting a 20 pF condenser into the delay line of the pulse generator. This pulse was then superimposed on a bias voltage VB which was below I/, so that a single domain was nucleated by P and travelled from cathode to anode because V, was above the domain extinction voltage. The quality of the domain pulse produced can then be used as an indication of resistivity profile, surface damage etc. so that only the best diodes are selected with respect to avalanching phenomena, life time, domain-nucleating centre and other aspects. Suitable pairs were then connected on one strip line unit. For convenience, the bias arrangement employed only a positive supply voltage as shown potential was in Fig. 2 so that the output-terminal raised to positive values. The bias voltage was supplied via a 50 62 coaxial line. The application of a signal voltage was simulated in the following manner: Diode B was chosen such that the threshold current for oscillations was below that of diode A. Then V, was raised to just above threshold, only diode B nucleated domains. Then a
Fig. 2. Experimental set-up of Gunn-diode three-level-logic studies.
pair for
resistance R,, was connected in parallel to B so that A experienced a higher current and below a certain value of R,, only diode A carried domains. The input to the sampling oscilloscope was in fact used as part of R,. It was then found that for a very well-defined value of R, the pair switched over from one mode of operation to the other one. The experimental results of one typical pair is shown in Table 1. The use of some degree of simulation is justified here as this study is aimed at establishing a few of the relevant device parameters which would show whether the proposed three-level logic systems can be usefully employed for binary communication and digital electronics. Figure 3 shows how for this pair a change Al of input-signal current produces switching. It was found that a A/ of only 50mA generated a welldefined switching operation, whereas an intermediate value (Al = 25 mA) produced output signals of reduced amplitude. With these inputsignal currents a voltage gain of more than 20 dB is obtained for the peak-to-valley ratio of about 50 per cent for the diodes employed. This is very similar to the results obtained by White and Adams[2], and could easily be improved by careful voltage stabilisation. Table I
Diode A B
Threshold current (A) 2.2 I.65
Low-field resistance (0) 34 41
THREE-LEVEL
GUNN-EFFECT
441
LOGIC
“0
t domain triggering /. pulse
V
capacitance applied, domain in diode B
Vg below
9
I for
--
1 “SK
The pair has then been operated under singledomain mode (SDM) by employing a trigger pulse. This trigger pulse was first applied to the bias terminal together with V,, which was kept below Vr. Basically similar operation was obtained to that described above, indicating that the operation is not caused by some resonance operation. The effect of a capacitance in parallel to one of the diodes was to short-circuit this diode with respect to the trigger pulse, so that a domain was nucleated in the other diode, and the pulse signal was reversed, as shown by Fig. 4. Subsequently, the trigger signal was applied at the input terminal Ti. Again, a positive pulse nucleated a domain in B. whereas a negative one triggered A. 3. LOGIC GATES
Using the switching properties of the Gunn diode pairs as described above, one can set up now all important logic gates. These are AND, inclusive OR and lnverter. All other gates can be derived from these three. An AND gate can be produced easily by employing two input resistors Ri as follows (see Fig. 5). The signal amplitude V, has to be larger for one polarity (representing the off condition) than for the other one. To give a numerical example, L’,
value
v-domain in diode A when capacitor of 100 pF in parallel to B
domain triggering pll1se
Fig. 3. Output signals of diode pair of Table two different input-current values.
extinction
Fig. 4. Effect of capacitor
time
on switching
T Fig. 5. AND
gate of three-level
behaviour.
-“B2
logic.
has to be either +5 V (for on) or -8 V (for o@‘). can easily be arranged by selecting diode pairs, where one diode with a high low-field resistance together with a parallel resistance is paired with a diode of small low-field resistance. The effective peak-to-valley ratio will then be smaller for the first diode than for the latter one. If the resulting signals are applied to terminals u and b of the AND gate of Fig. 5, the operation of Table 2 can be obtained. The threshold for negative pulses has to be about - 1.0 V and can be as large as about + 4.5 V for positive ones for the numerical example
This
H. L. HARTNAGEL
442
Table 2. Operation of AND gate, sho,r,n by numerical example. Case
I 2 3 4
Signal pulse voltage at W)
Resulting signal at
a
h
Ti (V)
+5 +5 -8 -8
+s -8 +5 -8
+5 - I.5 - 1.5 -8.0
given. It is seen that the circuit acts in fact as an AND gate. This performance was easily verified experimentally with the pair of Table 1 as shown by some representative results of Fig. 6. An input signal current of 15 mA represented case 1 of Table 2, a signal of - 10 mA gave cases 2 and 3, and a signal of - 3.5 mA was given for case 4. The signal regenerator giving different pulse amplitudes for the two signal polarities was set up and resulting wave shapes are given in Fig. 7. If we reverse the binary significance of the signal pulses, we can employ the circuit of Fig. 5 also as an OR gate. We have to reverse the polarity of both the input and output pulses by the circuit of Fig. 8, which acts as an inverter. This inverter circuit is basically a parallel connection of two two-level series regenerators [3]. An input signal of a given polarity triggers a domain only in one of the diodes. The resulting output pulse of opposite polarity is supplied to the output terminal via relatively-high resistances R,.. As an individual diode gives relatively high values of regenerator gain [3], one can make R, quite large and one still obtains sufficiently strong output signals for domain nucleation in subsequent Gunn diodes.
Domain nucleation in diode
B A A A
output pulse polarity
+ -
Fig. 7. Unequal output polarities,
Type of binary signal
on Off Off Off
pulse amplitudes for different as required for three-level AND.
output
input
-vB
Fig. 8. Three-level inverter (d,, dz are Gunn P’,i is a bias voltage).
tmFig. 6. Output
signals
of AND
gate.
diodes,
This inverter was studied theoretically and experimentally. If R, is sufficiently high, the circuit of Fig. 8 can be redrawn to give Fig. 9, where the output is the arithmetic sum of the potentials at a and b. One can see that for very large values of R,, approximately the same current is applied to both resistors R,. A domain pulse in one of the diodes produces therefore pulses at a and b of the same
THREE-LEVEL
CUNN-EFFECT
443
Gunn-effect regenerator operation as reported previously (see Table 3 of reference [l]). The circuit can be further improved by selecting regenerator diodes of high R,, inserted in a correspondingly high impedance line as R, can then be reduced. The inverter was set up in microwave circuitry as illustrated by Fig. 10. The input signal for singledomain mode operation was generated by a 20 pF capacitor in the delay line of the pulse generator. The application of this signal to the input terminal
“6
43 R1
a)
LOGIC
R2
%I
b)
Fig. 9. Redrawn inverter of Fig. 9 (&-low field resistance of Gunn diode, (a) and (b) are terminals giving the output signals). amplitude and of opposite polarity, so that the resulting output signal is zero. This argument suggests that R, must be as small as possible. Assuming a peak-to-valley ratio of 50 per cent for each diode, the resulting signal amplitude is given by the following expression, where V, is the threshold voltage for domain nucleation for each diode, and k is the coeficient indicating the signal reduction due to the resistors R,. 1 RJR,
Fig.
10. Microwave circuit for inverter (R, = 50 R for each diode).
studies
n _
,r’k
1
+ 2R,,lR, + 2 -i
R,IRo-
RJRo I i- 2R,lR, + 2R,lR, 11
The value of V, will be largest for very high resistances RI, as shown previously[3]. For analytical convenience we assume here that R, = R, and find VS/Vt = k/(4+ RJR,), which indicates that in fact very small values of R, give largest VS. Of course, a compromise has to be found because small Rz results in increased power dissipation which is undesirable. If R, is taken to be more than five times larger than R,, and R,, its effect on the operation of the circuit is negligible. Assuming as reasonable values R. = R, = 50 R, R, can then be 300 s2. A subsequent pulse regenerator of the type of Fig. 1 has to be triggered by the signals originating from the R, combination. If the low-field resistance R,, of the regenerator diodes is taken to be 50 Sz, too, a signal amplitude of & Vt results, which is well above the minimum signal value required for successful
\
trigger pulse
TG? Fig. I I. Positive (top) and negative (lower middle) output pulses of inverter, zero level (upper middle) for no input pulse applied and positive trigger pulse (bottom). The diode-interelectrode distance is 380 u.
.H. I:. HAKTNAGEI
444
of Fig. 8 was simulated by inserting a small resistor either at a or at b, as this caused the potential at the input terminal to be slightly increased or decreased. The resulting output is shown by Fig. 11, where the upper trace represents a signal from a negative input and the middle trace is caused by the positive input signal given by the lowest trace. It can be seen that signal inversion is obtained successfully. 4. CONCLUSIONS It is demonstrated that Gunn diodes can be used to form a logic system which employs both positive and negative signals such that any ambiguities possible with the two-level systems[ I] are avoided. All basic logic elements have been set up and studied experimentally. It is shown that the circuits required, although very different from two-
level Gunn reliably.
logic, are easy
to set up and operate
Ackno~ledgemrntsSpecial gratitude is expressed to Dr. S. Kataoka, who kindly made the detailed arrangements which enabled the author to perform the above study at the Electrotechnical Laboratory while on leave of absence from Sheffield University. The author is very grateful to Dr. Kataoka and his colleagues, in particular Mr. M. Kawashima for all the help given to him and for the many discussions. He found also several discussions with Dr. Y. Komamiya very valuable. Finally, he thanks the Science and Technology Agency of Japan for presenting him with an ‘Award for Foreign Specialists’.
REFERENCES I. S. H. Iradpanah
and H.
L. Hartnagel,
J. Br. fr~stn
Radio Engrs, 39,329 (I 970). 2. C;. White and R. F. Adams, Proc,. IEEE, 51, ( I969). 3. H. Hartnagel, Solid-.Sr. Elec~tron. 12. I9 C1969).
16X4
Pergamon Press 1971. Vol. 14, pp. 439-444.
THREE-LEVEL Electrotechnical
Printed in Great Britain
GUNN-EFFECT
LOGIC
H. L. HARTNAGEL* Laboratory, Tanashi, Tokyo, Japan
(Received 11August 1970; in revisedjbrm 26 October 1970) three-level Gunn-diode system is studied, which uses positive and negative pulses for the on and off signals respectively. Regenerators and the basic logic circuits (AND, OR, Inverter) have been developed and experimental results are presented.
Abstract-A
R&me--Un generateurs p&sent&.
circuit g diodes de Gunn est dCcrit qui utilize des signaux positives et ntgatives. RCet les Gments logiques principaux sont dtvelopCs et les rtsultats experimentaux sont
Zusammenfassung-Ein Gunneffekt-Schaltkreis wurde untersucht, der positive und negative Signale benutzt. Reaeneratoren und die wesentlichen loeischen Elemente wurden entwickelt und experimentelle Ergebnisse werden beschrieben. 1. INTRODUCTION
pulse indicating on and the absence of a pulse shows that no information is flowing. Such a system is also of value for applications of fail-safe logic, and has additional advantages such as the fact that a signal pulse does not have to be separated from the bias voltage level, as is commonly the case with two-level Gunn-effect logic. Three-level Gunn-effect pulse devices are similar to Goto pairs of tunnel-diode logic, and represent a further development of the two-diode circuit of White and Adams[2]. A detailed experimental study was performed resulting in design criteria for several new devices.
of the Gunn-effect domain for digital processing has been studied by numerous authors, because it enables one to obtain very high speed of operation. A range of logic gates has already been developed. They are based on a two-level system, where the on-condition is represented by a domain pulse and the off-condition is given by the absence of a pulse. The absence of a pulse does, however, also occur when no signal flow is present, so that a certain ambiguity can exist. This is particularly so in connection with inverter gates. As Gunn-logic uses monostable components, these gates would produce output pulses for both the input cases of an o$ signal and of no information Jaw. An example of an inverter has been reported[l] recently, where a Gunn diode is biased slightly above the threshold T for domain nucleation and an input pulse of opposite polarity brings the field in the diode below T. Output pulses are therefore produced when no input is applied. To distinguish then between an 08 signal and no informationjow, one will have to use changes in bias voltage so that the inverter is only energized when some signal is to be expected. This difficulty can be avoided by employing three-level Gunn logic, which produces, say, a negative pulse representing o$ a positive
THE
USE
2. BASIC ELEMENTS
The basic unit is given by a series combination of two Gunn diodes as shown in Fig. 1. The bias voltages are applied in such a way that the middle point of the chain is at earth when no domain is present. They are just below threshold for domain nucleation so that a small input signal applied to the middle point will nucleate a domain in one of the diodes. If the signal voltage is positive, the diode with the negative bias voltage nucleates a domain and a positive regenerated output pulse is produced. On the other hand, a negative input signal triggers the other diode and a negative output pulse results. For the present study, sandwich-type Gunn diodes were prepared by evaporating Au-Ge-Ni on the two polished and etched large surfaces of a 350~ thick wafer (resistivity 1 Q cm, mobility
*On leave from Dept. Electronics and Electrical Engineering, University of Sheffield, England, now Dept. Electronics and Electrical Engineering, University of Newcastle upon Tyne, England. 439
H. L. HARTNAGEL
440
50 R
+“B
“g
O-1
0 A
input-_)
ii I doutput
Vs
P
Ti --&-output
B
!I! F
-"B
Fig. 1. Basic unit of three-level Gunn-effect
logic.
6000 cm2/V set). After alloying in H, gas at 450°C for 10 set, the wafer was cut by wire saw into diodes of about 300 times 600~ cross-sectional size, so that, for the resistivities employed, the low-field resistance was always around 50 Q. The diodes were inserted in a short laboratory-type strip line with coaxial transitions. They were carefully tested with respect to oscillation threshold voltages V,, peak-to-valley ratios and duration of produced pulses so that suitable diodes could be combined to form pairs. Most investigations were performed by using a short triggering pulse I’, generated by suitably inserting a 20 pF condenser into the delay line of the pulse generator. This pulse was then superimposed on a bias voltage VB which was below I/, so that a single domain was nucleated by P and travelled from cathode to anode because V, was above the domain extinction voltage. The quality of the domain pulse produced can then be used as an indication of resistivity profile, surface damage etc. so that only the best diodes are selected with respect to avalanching phenomena, life time, domain-nucleating centre and other aspects. Suitable pairs were then connected on one strip line unit. For convenience, the bias arrangement employed only a positive supply voltage as shown potential was in Fig. 2 so that the output-terminal raised to positive values. The bias voltage was supplied via a 50 62 coaxial line. The application of a signal voltage was simulated in the following manner: Diode B was chosen such that the threshold current for oscillations was below that of diode A. Then V, was raised to just above threshold, only diode B nucleated domains. Then a
Fig. 2. Experimental set-up of Gunn-diode three-level-logic studies.
pair for
resistance R,, was connected in parallel to B so that A experienced a higher current and below a certain value of R,, only diode A carried domains. The input to the sampling oscilloscope was in fact used as part of R,. It was then found that for a very well-defined value of R, the pair switched over from one mode of operation to the other one. The experimental results of one typical pair is shown in Table 1. The use of some degree of simulation is justified here as this study is aimed at establishing a few of the relevant device parameters which would show whether the proposed three-level logic systems can be usefully employed for binary communication and digital electronics. Figure 3 shows how for this pair a change Al of input-signal current produces switching. It was found that a A/ of only 50mA generated a welldefined switching operation, whereas an intermediate value (Al = 25 mA) produced output signals of reduced amplitude. With these inputsignal currents a voltage gain of more than 20 dB is obtained for the peak-to-valley ratio of about 50 per cent for the diodes employed. This is very similar to the results obtained by White and Adams[2], and could easily be improved by careful voltage stabilisation. Table I
Diode A B
Threshold current (A) 2.2 I.65
Low-field resistance (0) 34 41
THREE-LEVEL
GUNN-EFFECT
441
LOGIC
“0
t domain triggering /. pulse
V
capacitance applied, domain in diode B
Vg below
9
I for
--
1 “SK
The pair has then been operated under singledomain mode (SDM) by employing a trigger pulse. This trigger pulse was first applied to the bias terminal together with V,, which was kept below Vr. Basically similar operation was obtained to that described above, indicating that the operation is not caused by some resonance operation. The effect of a capacitance in parallel to one of the diodes was to short-circuit this diode with respect to the trigger pulse, so that a domain was nucleated in the other diode, and the pulse signal was reversed, as shown by Fig. 4. Subsequently, the trigger signal was applied at the input terminal Ti. Again, a positive pulse nucleated a domain in B. whereas a negative one triggered A. 3. LOGIC GATES
Using the switching properties of the Gunn diode pairs as described above, one can set up now all important logic gates. These are AND, inclusive OR and lnverter. All other gates can be derived from these three. An AND gate can be produced easily by employing two input resistors Ri as follows (see Fig. 5). The signal amplitude V, has to be larger for one polarity (representing the off condition) than for the other one. To give a numerical example, L’,
value
v-domain in diode A when capacitor of 100 pF in parallel to B
domain triggering pll1se
Fig. 3. Output signals of diode pair of Table two different input-current values.
extinction
Fig. 4. Effect of capacitor
time
on switching
T Fig. 5. AND
gate of three-level
behaviour.
-“B2
logic.
has to be either +5 V (for on) or -8 V (for o@‘). can easily be arranged by selecting diode pairs, where one diode with a high low-field resistance together with a parallel resistance is paired with a diode of small low-field resistance. The effective peak-to-valley ratio will then be smaller for the first diode than for the latter one. If the resulting signals are applied to terminals u and b of the AND gate of Fig. 5, the operation of Table 2 can be obtained. The threshold for negative pulses has to be about - 1.0 V and can be as large as about + 4.5 V for positive ones for the numerical example
This
H. L. HARTNAGEL
442
Table 2. Operation of AND gate, sho,r,n by numerical example. Case
I 2 3 4
Signal pulse voltage at W)
Resulting signal at
a
h
Ti (V)
+5 +5 -8 -8
+s -8 +5 -8
+5 - I.5 - 1.5 -8.0
given. It is seen that the circuit acts in fact as an AND gate. This performance was easily verified experimentally with the pair of Table 1 as shown by some representative results of Fig. 6. An input signal current of 15 mA represented case 1 of Table 2, a signal of - 10 mA gave cases 2 and 3, and a signal of - 3.5 mA was given for case 4. The signal regenerator giving different pulse amplitudes for the two signal polarities was set up and resulting wave shapes are given in Fig. 7. If we reverse the binary significance of the signal pulses, we can employ the circuit of Fig. 5 also as an OR gate. We have to reverse the polarity of both the input and output pulses by the circuit of Fig. 8, which acts as an inverter. This inverter circuit is basically a parallel connection of two two-level series regenerators [3]. An input signal of a given polarity triggers a domain only in one of the diodes. The resulting output pulse of opposite polarity is supplied to the output terminal via relatively-high resistances R,.. As an individual diode gives relatively high values of regenerator gain [3], one can make R, quite large and one still obtains sufficiently strong output signals for domain nucleation in subsequent Gunn diodes.
Domain nucleation in diode
B A A A
output pulse polarity
+ -
Fig. 7. Unequal output polarities,
Type of binary signal
on Off Off Off
pulse amplitudes for different as required for three-level AND.
output
input
-vB
Fig. 8. Three-level inverter (d,, dz are Gunn P’,i is a bias voltage).
tmFig. 6. Output
signals
of AND
gate.
diodes,
This inverter was studied theoretically and experimentally. If R, is sufficiently high, the circuit of Fig. 8 can be redrawn to give Fig. 9, where the output is the arithmetic sum of the potentials at a and b. One can see that for very large values of R,, approximately the same current is applied to both resistors R,. A domain pulse in one of the diodes produces therefore pulses at a and b of the same
THREE-LEVEL
CUNN-EFFECT
443
Gunn-effect regenerator operation as reported previously (see Table 3 of reference [l]). The circuit can be further improved by selecting regenerator diodes of high R,, inserted in a correspondingly high impedance line as R, can then be reduced. The inverter was set up in microwave circuitry as illustrated by Fig. 10. The input signal for singledomain mode operation was generated by a 20 pF capacitor in the delay line of the pulse generator. The application of this signal to the input terminal
“6
43 R1
a)
LOGIC
R2
%I
b)
Fig. 9. Redrawn inverter of Fig. 9 (&-low field resistance of Gunn diode, (a) and (b) are terminals giving the output signals). amplitude and of opposite polarity, so that the resulting output signal is zero. This argument suggests that R, must be as small as possible. Assuming a peak-to-valley ratio of 50 per cent for each diode, the resulting signal amplitude is given by the following expression, where V, is the threshold voltage for domain nucleation for each diode, and k is the coeficient indicating the signal reduction due to the resistors R,. 1 RJR,
Fig.
10. Microwave circuit for inverter (R, = 50 R for each diode).
studies
n _
,r’k
1
+ 2R,,lR, + 2 -i
R,IRo-
RJRo I i- 2R,lR, + 2R,lR, 11
The value of V, will be largest for very high resistances RI, as shown previously[3]. For analytical convenience we assume here that R, = R, and find VS/Vt = k/(4+ RJR,), which indicates that in fact very small values of R, give largest VS. Of course, a compromise has to be found because small Rz results in increased power dissipation which is undesirable. If R, is taken to be more than five times larger than R,, and R,, its effect on the operation of the circuit is negligible. Assuming as reasonable values R. = R, = 50 R, R, can then be 300 s2. A subsequent pulse regenerator of the type of Fig. 1 has to be triggered by the signals originating from the R, combination. If the low-field resistance R,, of the regenerator diodes is taken to be 50 Sz, too, a signal amplitude of & Vt results, which is well above the minimum signal value required for successful
\
trigger pulse
TG? Fig. I I. Positive (top) and negative (lower middle) output pulses of inverter, zero level (upper middle) for no input pulse applied and positive trigger pulse (bottom). The diode-interelectrode distance is 380 u.
.H. I:. HAKTNAGEI
444
of Fig. 8 was simulated by inserting a small resistor either at a or at b, as this caused the potential at the input terminal to be slightly increased or decreased. The resulting output is shown by Fig. 11, where the upper trace represents a signal from a negative input and the middle trace is caused by the positive input signal given by the lowest trace. It can be seen that signal inversion is obtained successfully. 4. CONCLUSIONS It is demonstrated that Gunn diodes can be used to form a logic system which employs both positive and negative signals such that any ambiguities possible with the two-level systems[ I] are avoided. All basic logic elements have been set up and studied experimentally. It is shown that the circuits required, although very different from two-
level Gunn reliably.
logic, are easy
to set up and operate
Ackno~ledgemrntsSpecial gratitude is expressed to Dr. S. Kataoka, who kindly made the detailed arrangements which enabled the author to perform the above study at the Electrotechnical Laboratory while on leave of absence from Sheffield University. The author is very grateful to Dr. Kataoka and his colleagues, in particular Mr. M. Kawashima for all the help given to him and for the many discussions. He found also several discussions with Dr. Y. Komamiya very valuable. Finally, he thanks the Science and Technology Agency of Japan for presenting him with an ‘Award for Foreign Specialists’.
REFERENCES I. S. H. Iradpanah
and H.
L. Hartnagel,
J. Br. fr~stn
Radio Engrs, 39,329 (I 970). 2. C;. White and R. F. Adams, Proc,. IEEE, 51, ( I969). 3. H. Hartnagel, Solid-.Sr. Elec~tron. 12. I9 C1969).
16X4