Tuning of Multiloop PID Controllers Based on Gain and Phase Margins Specifications

7a-066

Copyright © 19961FAC 13th Triennial World Congress, San Francisco, USA

TUNING OF MULTILOOP PID CONTROLLERS BASED ON GAIN AND PHASE MARGINS SPECIFICATIONS W.K. Ho

T. H. Lee

O.P. Gan

National University of Singapore 1 0 Kent Ridge Crescent Singapore 0511 Tel: (65}7726286 Fax: (65) 7791103 Internet: eiehowk@nus,sg

Abstract: An analytical method of tuning multiloop PlO controllers based on gain and phase margins specifications is presented in this paper. The proposed design method can tune the multiloop controllers on-line and in real-time to meet specified system robustness and performance. The design method can be easily combined with existing process identification techniques to implement self-tuning multiloop controllers. Key Words: Gain Margins, Multiloop Control, PlO Control, Robust Control, Self-Tuning Control.

1. INTRODUCTION

Most industrial control systems USE' the multiloop diagonal controller structure for multi variable processes (Luyben, 1986). It is the most simple and understandable structure. The performance of this diagonal controller structure is usually quite adequate for process control applications (Luyben, 1990). Some guidelines, based on interaction in thE' multi variable process, on when to use and when not to use the multi loop structurE' are given in Economou and Morari (1986). Gain and phase margins have served as important measures of robustness for the single-input single-output (SISO) system. It is known from classical control that phase margin is related to the damping of the system and therefore can also serve as a performance measure (Franklin et al., 1986). SISO controller designs to satisfy gain and phase margins criteria are not new.

However they are normally solved off-line by numerical methods or trial and error graphically using Bode plots. Such approaches are not suitable for use in selftuning control. Recently, in the gain and phase margins design method of Ho et al. (1995), simple formulas were derived to tune the SISO PlO controllers on-line to meet user-specified gain and phase margins. This paper extends the gain and phase margins design method to multiloop PlO controllers. Using the multiloop gain and phase margins design, the multiloop PID controllers can be designed to meet desired robustness and performance. A simple and practical multiloop design method is the Biggest Log Modulus Tuning (BLT) method (Luyben, 1986). This method is viewed in the same light as the classical SISO Ziegler-Nichols method (Ziegler and Nichols, 1942). It gives rough tuning only and needs

6007

6008

6009

6010

6011

6012