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Turn-off-type field-controlled thyristor
Solid-Slate Ekclronics Vol. 23, pp. IIOI-I 105 Pergamon Press Ltd., 1980. Printed in Great Britain
TURN-OFF-TYPE FIELD-CONTROLLED THYRISTOR CONCEPTS
FOR HIGH POWER OPERATION J. HOMOLA
Semiconductor Division, CKD Praha, Prague, Czechoslovakia
and A.G. MILNESt Carnegie-Mellon University, Pittsburgh, PA 15213,U.S.A. (Received 11 February 1980; in reuisedform 10 May 1980)
Abstract-The blocking state of a field-controlled thyristor (FCT) and the turn-off processes are discussed in relation to the design parameters of the structure. This leads to suggestions for a modified inner structure and a gate structure that should allow improved high power capability. Also considered is the integration of an FCT and a JFET to provide a device that is normally in the OFF state and that can be turned on and off by short low-power gate pulses.
1.
INTRODUCTION
In high-power high-frequency applications there is a need for electronic devices that can switch voltages of the order 1000V and currents of the order 100A while capable of operation at frequencies greater than 15 kHz. At present, devices such as conventional thyristors and transistors do not meet these requirements at all readily. However recently a new semiconductor device termed the Field Controlled Thyristor (FCT) has been described that offers the promise of both the high-power capability of a thyristor and the fast turn-on and turn-off capability of a transistor. The basic structure of an FCT is similar to that of a p+nrz+ rectifier with the addition of a very fine p+ grid near the n+ cathode, which gives an FCT its unique capabilities but also makes its fabrication rather complex. In previous papers two groups of FCT have been described, namely devices with a buried grid structure [l, 2, 9, 10, 121 and devices with a surface grid structure [3-6,8]. In general, the buried-grid structures show a better blocking gain and better utilization of device area for current flow compared to the surface-grid structures but their gate turn-off capability is degraded because of grid debiasing effects[6]. Surface-grid structures, on the other hand, have better turn-off capability but suffer from a low forward blocking gain and poor utilization of device area. An improvement of the blocking gain can be achieved by fabricating a surface-grid structure with vertical wall grid fingers[6] resulting in high channel length to width aspect ratio, but utilization of device arei is still poor for a high-power device. In this paper the performances of an FCT in a blocking state and in an onstate and the turn-off and turn-on processes are discussed in relation to the parameters and tsupport for this investigation was provided by NSF Grant No.
ENG-7684371 SSE Vol. 23. No.
II-A
geometry of the FCT structure from the point of view of achieving a high power capability for a turn-off type FCT. Also considered is the use of JFET structures as auxiliary elements. It is shown that this could result in a different switching performance in which the device is normally in the off-state and can be turned on and off by short low-power pulses applied to the JFET. Integration of the FCT and the JFET appears practical. 2. DISCUSSIONOF ELECTRICALAND DESIGN PARAMETERSOF ANFCT
An ideal device for high-power high-frequency applications should have the following features: a high blocking capability, high current capability, fast turn-on and turn-off performance with low power losses and high dV/dt and dZ/dt capabilities. We will discuss these parameters of an FCT with respect to its structural design. 2.1 Blocking capability In the absence of gate voltage the FCT is normally conducting as a p+nn+ diode with anode to cathode voltage applied. The device grid, p type region, must have a negative voltage applied with respect to the cathode to pinch the diode off and this voltage must be sustained to keep the device in an off condition. The applied grid bias must be large enough to cause the depletion regions at the pn junctions between thegrid fingers and the basic n region to meet between the grids. Then a potential barrier is established that prevents electrons from being injected at the cathode and moved to the anode. Without a source of electrons, holes cannot be injected at the anode and hence the device is maintained in a forward blocking state even if a large voltage is applied to the anode. The maximum “blocking” voltage that can be applied to a device is limited by these effects: (1) an avalanche
1102
>”
J. HOMOLAand A. G. MILNES
60
x >
Fig. 2. Impurity concentration distribution along a symmetry line of a proposed FCT device.
I
0
I
I
20 k-L-4
I
I
40
I
I
I
60 x (pm)
Fig. I. Calculated potential distribution along a symmetry line of an FCT in blocking state. break-down effect caused by a high intensity of electric field on the space charge region (integral of an effective ionization coefficient through the depletion layer equals unity). (2) A punch-through effect caused by injection of holes from the anode pn junction into the depletion layer when the distance between them becomes small enough. (3) Vanishing of the negative potential barrier between the grids when the depletion layer is being “pulled out” from between the grid by a high positive potential at the anode. The first two effects are of the same nature as those for a conventional thyristor. For a high blocking capability a proper concentration and thickness of the n base must be chosen with respect to them. The third effect has a strongly two-dimensional character. Calculated potential distributions along a symmetry line between the grids of an FCT for different anode voltages, shown in Fig. 1, illustrate the effect of establishing a potential barrier and pulling it out by increasing anode voltage. Similar results previously for small JFET were obtained structures [ 13,141. For a given anode voltage a minimum grid voltage VG is necessary to keep the device in a blocking state. This voltage depends on grid spacing and grid thickness (in the cathode-anode direction)[6,7]. It is also possible to decrease this grid voltage by decreasing the concentration of doping impurities in the II base of the device. However, in this case a larger thickness of a base would be necessary to avoid the punch-through effects[ll]. To avoid this problem a new structure of FCT is suggested with an additional layer n- between the grids with decreased impurity concentration as shown in Fig. 2. In this new structure the required gate voltage VGcan be decreased while maintaining the same blocking capability and /or the grid spacing can be increased which would improve the current capability of the device. Table 1
shows the dependence of minimum gate voltageVG, required to keep the device in a blocking state, on grid parameters L and h and impurity concentration in the Nlayer for an anode voltage VA= 12OOV. The results were obtained by two-dimensional analysis of the FCT structure shown in Fig. 2. Concentration of N here was 10’4cm-3. A minimum potential barrier between grids of - 1.0V was taken as a criterion for the calculations. It is seen that the use of an N- region doping of 0.1 N results in a considerable reduction of required gate voltage. 2.2 Current capability The current capability of a device is limited by the condition.that the temperature of the device should not exceed a maximum working temperature due to forwardstate power losses for given thermal resistivity of the device and given cooling conditions. This maximum working temperature will be at least as high for an FCT as for a conventional thyristor, and at this time we will not examine the possibility that it may be even higher. The best way of increasing the current capability of a device is by increasing its active area since its thermal resistivity decreases at the same time. But this step must be considered with respect to behavior of the device under dynamic conditions such as turn-on and turn-off processes which may get worse with an increasing area. For an FCT increasing the device area represents not only increasing the diameter of a device but also leads us to prefer a buried grid type of device to a surface one as the utilization of device area of an FCT with a buried grid is better.
Table 1. Dependence of grid voltage on grid parameters and impurity concentration in n- layer between grids (n = 10’4cm-3, v, = 1200V) L=20pm,n-/n=l
h=20clm,n-/n=l,
L=20pm,h=20fim
Turn-off-typefield-controlledthy&or Another way of increasing the current capability is by decreasing forward power losses per unit area by control of the forward characteristic of the device, i.e. by decreasing its forward voltage drop. The forward voltage drop of an FCT for a given current density depends, similarly to a p+nn+ diode, on the conductivity modulation between p+ and n+ emitters, i.e. on the quality of the emitters, the distance between them and the minority carrier lifetime, 7. The effect of r on the turn-off time of an FCT may be expected to be different (allowing higher 7 and better conductivity modulation) than for a conventional thyristor-but these are matters not yet examined analytically. For the present the most that can be said is that for an optimum design of the thickness of a device a trade-off between required blocking capability and forward voltage drop must be taken into account. The forward voltage drop of an FCT is also affected by the grid even in a buried-grid type of structure. It has been shown by Adler [7] that electrons from the cathode tend to flow around the grid rather than through it, which amounts to an effective reduction of device area. On the other hand, a fraction of holes injected from the p+ anode emitter is relayed through the grid rather than passing through the channels between grids. This results in decreasing the level of conductivity modulation in the channels. Both effects result in increasing the forward voltage drop. The effect increases with decreasing spacing and increasing thickness of a grid and with increasing acceptor concentration in the grid. Thus the effect of a grid on a forward voltage drop in an FCT can be compared to that of shunts in a thyristor. Power gridistors reported by Barandon and Laurenceau[2] had lower voltage drops than thyristors for the same current density. A trade-off between blocking capability and voltage drop must be considered when designing grid parameters L and h. An additional n- layer between grids can improve the trade-off. Also the turn-off process must be considered as will be discussed later. 2.3 Turn-on and turn-ofl performance
and dynamic
1103
an efficient collector of holes. Hole current is diverted to the grids, and the remaining excess carriers in the n channels recombine quickly and the material next to the grids is thus depleted of free carriers. If the applied grid bias is large enough to cause these depletion regions to meet between the grids, a potential barrier is established and the device turns-off to its blocking state. The turn-off performance of an FCT is better than that of an ordinary thyristor and the possibility of gate turnoff represents a substantial advantage. A narrow spacing between the grid fingers improves the turn-off capability of an FCT. The grid structure must be capable of carrying the turn-off current of holes with minimum debiasing effects due to ohmic voltage drop along the length of the grid fingers. This last requirement is well met by a surface-grid type of FCT where a metal contact can be placed directly over the grid. However, for a high power FCT a buried grid structure seems to be more suitable. To avoid the debiasing effects in this case the grid fingers should be made short and with a high impurity concentration. Thus demands on a grid structure for a good turn off capability are opposite to those for a high current capability and a trade-off is necessary. The influence of an n- layer between the grids (Fig. 2) is a matter not yet examined analytically with respect to the turn-off process but it seems that it should be a favorable one as a smaller part of the applied turn-off voltage is consumed by ionized donors than in an n layer. 3.CONCEFTlONOFAHIGH-POWF,RFCTDl?SIGN
Consideration of the constraints on device design discussed above, suggests that a structure such as that of Fig. 3 should give a good trade-off between the parameters required for a turn-off type FCT with both high-power and high frequency capabilities without much additional complexity in the fabrication process.
a)
parameters of an FCT
To turn-on an FCT which is in the blocking state it is sufficient to remove the negative bias from the grid. After this there is no barrier for electrons to move from cathode to anode and thus current flow will start simultaneously in all channels between the grids that have the structure of a p+nn+ diode, i.e. almost the entire area of the device turns on. There are no problems connected with local turn on and a slow velocity of plasma spreading as in a common thy&or. Thus there is no dddt problem in an FCT. So as far as turn-on performance is concerned, the area of a FCT can be designed very large even if a high-frequency capability of the device is required. There is also no dV/dt problem in an FCT. The capacitive current created by a blocking voltage change does not flow across an n* emitter as in an ordinary thyristor and so does not provide action that tends to turn an FCT on. If a negative bias is applied to the grid with respect to the cathode of an FCT in the on state, the grid becomes
r
A
b)
Fig. 3. (a) A part of a grid pattern of a proposed large area high-power FCT. (b) A sectional view of the FCT structure cut along the line A-A’. The n-doping is an optional addition to improve the relationship between blocking characteristics and grid-finger spacing.
1104
Fig. 4. A sectional
J. HOMOLA
view of the proposed
FCT
and A. G. MILNES
in a basic circuit.
The grid of the device consists of long “longitudinal” stripes and comparatively short “transverse” stripes. An example of a part of a grid of this type is shown in Fig. 3(a). The longitudinal parts of the grid are exposed by etching canyon-like grooves into the cathode surface of the device and are connected to a gate contact as can be seen in the sectional view of the device along the AA line in Fig. 3(b). The longitudinal parts of the grid attached to a gate contact allow the flow of a turn-off current in a large area device with minimum debiasing effects. The transverse parts of the grid are buried in the structure and can be designed with good parameters Land h with respect to the blocking capability and turn-off capability of an FCT. This part of the grid allows the spacing between the longitudinal parts to be moderately large and thus permits a good utilization of the device area. The transverse part of the grid can be very fine since in short transverse stripes debiasing effects are not so important. A further option is the provision of an nlayer between the transverse stripes of the grid to provide improvement in the parameter trade-offs. The pattern of the longitudinal stripes may be designed in any way that provides a good use of device area such as an involute pattern. The contact of the gate is on a lower level than the cathode contact and thus a pressure contact to the cathode can be used, resulting in improvement of thermal conductivity. There is also the possibility of double-side cooling of the device and consequently a higher current capability. Let us consider now the operation of an FCT in a high power application. Figure 4 shows a sectional view of an FCT in a circuit with gate voltage source, main voltage source and a load impedance. The FCT is intended primarily for applications involving power control and moderate-to-large gate signals of a length corresponding to a desired duration of blocking period must be provided by the gate source. There are some advantages in having comparatively large gate signals and in the fact that the gating control is not a trigger action. In particular it means that the FCT is relatively insensitive to voltage spikes that might appear on a supply or signal line that might accidently turn on a conventional thyristor. On the other hand, there is some merit in considering whether the gate signal voltage requirements can be
I Fig.
5. A possible circuit arrangement of an FCT control that provides latching action.
with JFET
lowered and made more similar to a conventional thyristor while still retaining the good power handling features of an FCT. The addition of the JFET element to an FCT in the circuit shown in Fig. 5 appears to offer this possibility. The circuit converts the FCT into a device that is in the off state until a small short pulse to the JFET turns it on. The device then keys-on until another short pulse of opposite polarity turns it off, so a latching action not too dissimilar to that of a conventional turnoff thyristor is to be expected. In the circuit of Fig. 5 the FCT is held off in the blocking state by a constant battery voltage V,, applied through the JFET channel which is normally conducting for zero JFET gate voltage in a depletion mode device. Application of a negative pulse V, so that the JFET gate p is driven negative with respect to the source S causes the JFET channel to pinch off and its resistivity R,,, tends to infinity or at least becomes much larger than the leakage resistance of the FCT gate. Therefore the JFET channel absorbs the bias voltage VGBand the FCT negative gate bias decreases substantially and the FCT turns on. The load current I,_ appears and the voltage drop ILR, across R, keeps the JFET gate negative with respect to the source S so that the JFET channel remains in the high resistance condition even after the disappearance of the pulse V,, as long as certain minimum level of load current flows. The FCT will automatically turn-off when the load current and consequently the JFET gate voltage falls to zero. However, it can be also turned off at any instant by a positive pulse applied at the JFET gate that turns the JFET on, so that the battery gate voltage appears on the FCT grid. The operation of the FCT in this circuit is now similar to that of a conventional thyristor with addition of turn-off capability. FCT however retains a capability for high frequency operation, not found to the same extent in an ordinary thyristor. Figure 6 shows a circuit similar to that of Fig. 5 with the JFET device integrated to the FCT chip as shown
1105
Turn-off-typefield-controlledthyristor
‘ET
integration could be considered. The geometry of contacts of a FCT-JFET device might be for example as shown at Fig. 7. The JFET has the form of three concentric rings, DFET,GFETand SFETand SFETaround the FCT gate GFCT in the center of the structure. The cathode fingers CFCT are of involute form to allow the transversal parts of the underlying FCT grid to be of constant length. These FCT cathode fingers are extensions of the JFET source contact. Between them at lower level are contacts to longitudinal fingers of the FCT grid. A pressure contact can be applied to the cathode emittter contacts. All other contacts can be connected through the central window in the cathode electrode. 4. CONCLUSIONS
Fig. 6. Integrated structure of an FCT and a control jFET in a possible circuit arrangement.
schematically at the right side of the sectional view of the structure. The n channel of the JFET is established between two p layers. The lower p layer can be fabricated simultaneously with the p grid of the FCT, only the upper p layer fabrication requires some additional technological operations. One parameter demand on the JFET is that it must have a large resistance in the off state compared to the resistance of the pn junction of the grid in the reverse direction, which could lead to large JFET gate biases required. A lowering of the pn junction resistance of the FCT grid in the FCT design by addition of a moderate shunt resistor might help the problem. Another requirement is that the JFET have a low resistance RFET in the on state, since the lo off current for the FCT must flow through the JFET during the FCT turn-off process. To meet this demand the JFET should be designed with a large width compared to the distance between source and drain and also the total area occupied by the JFET would be significant. However, in a large area high-power FCT with two levels of contacts on the cathode side as described above an FCT-JFET
The design of field controlled thyristors for good power and frequency ratings is considered. A structure is proposed that has a grid of longitudinal stripes exposed to a gate contact and with short fine-dimension transverse stripes buried in the structure to improve the turn-off performance. Also a modified FCT structure is considered with an additional n- layer provided between the grid stripes to improve the trade-off of the parameters. The possible use of integral JFET transistors to provide the large gate device voltage required for an FCT with a low signal voltage, is also considered. A circuit involving a JFET and an FCT is presented that should provide a latch type FCT that can be turned on and off by small signal pulses of appropriate polarities.
Acknowledgements-The authors wish to thank M.S. Adler and T. Moriizumi for helpful advice in the field of computer calculations.
REFERENCES
I. J. Nishizawa and K. Nakamura, Proc. of 8th Inf. Conf. on Solid-% Deu., Tokyo (1975). 2. R. Barandon and P. Laurenceau, Electron. Lett. 12, 48ti87 (1976). 3. D. E. Houston, et al., IEEE Int. Electron. Lko. Meeting, Tech. Digest, pp. 379-382 (1975). 4. D. N. Houston, et al., IEEE Trans. Electron. Dev. ED-23, 905-911(1976). 5. Y. Kajiwara, et al. IEEE Int. Electron. Lku. Meeting, Tech. Digest, p. 38 (1977). 6. B. W. Wessels and B. J. Baliga, IEEE Int. Electron. Deu. Meeting, Tech. Digesf, p. 30 (1977). 7. M. S. Adler, IEEE Trans. Electron. Lku. ED-25, 529-531 (1978).
-GFET
-0 FE1
Fig. 7. A possible pattern of contacts of an involute FCT with integral JFET device.
8. A. P. Ferro, Electric field controlled diode with a current controlling surface grid, US. patent No. 4,037,245(1977). 9. D. E. Houston and S. Krishna, Field controlled thyristor with buried grid, U.S. Patent No. 4060821(1977). 10. J. Nishizawa, et al., Static induction type thyristor, U. S. Patent No. 4,086,611(1978). Il. B. J. Baliga, IEEE Int. Electron. Dev. Meeting, Tech. Digest, p. 76, (1979). 12. Y. Terasawa, et al., IEEE Int. Electron. Deu. Meeting, Tech. Digest, p. .250, (1979). 13. K. Yamaguchi and H. Kodera, IEEE Trans. Electron. Deu. ECX4, 1061-1069(1977). 14. J. L. Morenza and D. Esteve, Solid-St. Electron. 21, 739-746 (1978).
TURN-OFF-TYPE FIELD-CONTROLLED THYRISTOR CONCEPTS
FOR HIGH POWER OPERATION J. HOMOLA
Semiconductor Division, CKD Praha, Prague, Czechoslovakia
and A.G. MILNESt Carnegie-Mellon University, Pittsburgh, PA 15213,U.S.A. (Received 11 February 1980; in reuisedform 10 May 1980)
Abstract-The blocking state of a field-controlled thyristor (FCT) and the turn-off processes are discussed in relation to the design parameters of the structure. This leads to suggestions for a modified inner structure and a gate structure that should allow improved high power capability. Also considered is the integration of an FCT and a JFET to provide a device that is normally in the OFF state and that can be turned on and off by short low-power gate pulses.
1.
INTRODUCTION
In high-power high-frequency applications there is a need for electronic devices that can switch voltages of the order 1000V and currents of the order 100A while capable of operation at frequencies greater than 15 kHz. At present, devices such as conventional thyristors and transistors do not meet these requirements at all readily. However recently a new semiconductor device termed the Field Controlled Thyristor (FCT) has been described that offers the promise of both the high-power capability of a thyristor and the fast turn-on and turn-off capability of a transistor. The basic structure of an FCT is similar to that of a p+nrz+ rectifier with the addition of a very fine p+ grid near the n+ cathode, which gives an FCT its unique capabilities but also makes its fabrication rather complex. In previous papers two groups of FCT have been described, namely devices with a buried grid structure [l, 2, 9, 10, 121 and devices with a surface grid structure [3-6,8]. In general, the buried-grid structures show a better blocking gain and better utilization of device area for current flow compared to the surface-grid structures but their gate turn-off capability is degraded because of grid debiasing effects[6]. Surface-grid structures, on the other hand, have better turn-off capability but suffer from a low forward blocking gain and poor utilization of device area. An improvement of the blocking gain can be achieved by fabricating a surface-grid structure with vertical wall grid fingers[6] resulting in high channel length to width aspect ratio, but utilization of device arei is still poor for a high-power device. In this paper the performances of an FCT in a blocking state and in an onstate and the turn-off and turn-on processes are discussed in relation to the parameters and tsupport for this investigation was provided by NSF Grant No.
ENG-7684371 SSE Vol. 23. No.
II-A
geometry of the FCT structure from the point of view of achieving a high power capability for a turn-off type FCT. Also considered is the use of JFET structures as auxiliary elements. It is shown that this could result in a different switching performance in which the device is normally in the off-state and can be turned on and off by short low-power pulses applied to the JFET. Integration of the FCT and the JFET appears practical. 2. DISCUSSIONOF ELECTRICALAND DESIGN PARAMETERSOF ANFCT
An ideal device for high-power high-frequency applications should have the following features: a high blocking capability, high current capability, fast turn-on and turn-off performance with low power losses and high dV/dt and dZ/dt capabilities. We will discuss these parameters of an FCT with respect to its structural design. 2.1 Blocking capability In the absence of gate voltage the FCT is normally conducting as a p+nn+ diode with anode to cathode voltage applied. The device grid, p type region, must have a negative voltage applied with respect to the cathode to pinch the diode off and this voltage must be sustained to keep the device in an off condition. The applied grid bias must be large enough to cause the depletion regions at the pn junctions between thegrid fingers and the basic n region to meet between the grids. Then a potential barrier is established that prevents electrons from being injected at the cathode and moved to the anode. Without a source of electrons, holes cannot be injected at the anode and hence the device is maintained in a forward blocking state even if a large voltage is applied to the anode. The maximum “blocking” voltage that can be applied to a device is limited by these effects: (1) an avalanche
1102
>”
J. HOMOLAand A. G. MILNES
60
x >
Fig. 2. Impurity concentration distribution along a symmetry line of a proposed FCT device.
I
0
I
I
20 k-L-4
I
I
40
I
I
I
60 x (pm)
Fig. I. Calculated potential distribution along a symmetry line of an FCT in blocking state. break-down effect caused by a high intensity of electric field on the space charge region (integral of an effective ionization coefficient through the depletion layer equals unity). (2) A punch-through effect caused by injection of holes from the anode pn junction into the depletion layer when the distance between them becomes small enough. (3) Vanishing of the negative potential barrier between the grids when the depletion layer is being “pulled out” from between the grid by a high positive potential at the anode. The first two effects are of the same nature as those for a conventional thyristor. For a high blocking capability a proper concentration and thickness of the n base must be chosen with respect to them. The third effect has a strongly two-dimensional character. Calculated potential distributions along a symmetry line between the grids of an FCT for different anode voltages, shown in Fig. 1, illustrate the effect of establishing a potential barrier and pulling it out by increasing anode voltage. Similar results previously for small JFET were obtained structures [ 13,141. For a given anode voltage a minimum grid voltage VG is necessary to keep the device in a blocking state. This voltage depends on grid spacing and grid thickness (in the cathode-anode direction)[6,7]. It is also possible to decrease this grid voltage by decreasing the concentration of doping impurities in the II base of the device. However, in this case a larger thickness of a base would be necessary to avoid the punch-through effects[ll]. To avoid this problem a new structure of FCT is suggested with an additional layer n- between the grids with decreased impurity concentration as shown in Fig. 2. In this new structure the required gate voltage VGcan be decreased while maintaining the same blocking capability and /or the grid spacing can be increased which would improve the current capability of the device. Table 1
shows the dependence of minimum gate voltageVG, required to keep the device in a blocking state, on grid parameters L and h and impurity concentration in the Nlayer for an anode voltage VA= 12OOV. The results were obtained by two-dimensional analysis of the FCT structure shown in Fig. 2. Concentration of N here was 10’4cm-3. A minimum potential barrier between grids of - 1.0V was taken as a criterion for the calculations. It is seen that the use of an N- region doping of 0.1 N results in a considerable reduction of required gate voltage. 2.2 Current capability The current capability of a device is limited by the condition.that the temperature of the device should not exceed a maximum working temperature due to forwardstate power losses for given thermal resistivity of the device and given cooling conditions. This maximum working temperature will be at least as high for an FCT as for a conventional thyristor, and at this time we will not examine the possibility that it may be even higher. The best way of increasing the current capability of a device is by increasing its active area since its thermal resistivity decreases at the same time. But this step must be considered with respect to behavior of the device under dynamic conditions such as turn-on and turn-off processes which may get worse with an increasing area. For an FCT increasing the device area represents not only increasing the diameter of a device but also leads us to prefer a buried grid type of device to a surface one as the utilization of device area of an FCT with a buried grid is better.
Table 1. Dependence of grid voltage on grid parameters and impurity concentration in n- layer between grids (n = 10’4cm-3, v, = 1200V) L=20pm,n-/n=l
h=20clm,n-/n=l,
L=20pm,h=20fim
Turn-off-typefield-controlledthy&or Another way of increasing the current capability is by decreasing forward power losses per unit area by control of the forward characteristic of the device, i.e. by decreasing its forward voltage drop. The forward voltage drop of an FCT for a given current density depends, similarly to a p+nn+ diode, on the conductivity modulation between p+ and n+ emitters, i.e. on the quality of the emitters, the distance between them and the minority carrier lifetime, 7. The effect of r on the turn-off time of an FCT may be expected to be different (allowing higher 7 and better conductivity modulation) than for a conventional thyristor-but these are matters not yet examined analytically. For the present the most that can be said is that for an optimum design of the thickness of a device a trade-off between required blocking capability and forward voltage drop must be taken into account. The forward voltage drop of an FCT is also affected by the grid even in a buried-grid type of structure. It has been shown by Adler [7] that electrons from the cathode tend to flow around the grid rather than through it, which amounts to an effective reduction of device area. On the other hand, a fraction of holes injected from the p+ anode emitter is relayed through the grid rather than passing through the channels between grids. This results in decreasing the level of conductivity modulation in the channels. Both effects result in increasing the forward voltage drop. The effect increases with decreasing spacing and increasing thickness of a grid and with increasing acceptor concentration in the grid. Thus the effect of a grid on a forward voltage drop in an FCT can be compared to that of shunts in a thyristor. Power gridistors reported by Barandon and Laurenceau[2] had lower voltage drops than thyristors for the same current density. A trade-off between blocking capability and voltage drop must be considered when designing grid parameters L and h. An additional n- layer between grids can improve the trade-off. Also the turn-off process must be considered as will be discussed later. 2.3 Turn-on and turn-ofl performance
and dynamic
1103
an efficient collector of holes. Hole current is diverted to the grids, and the remaining excess carriers in the n channels recombine quickly and the material next to the grids is thus depleted of free carriers. If the applied grid bias is large enough to cause these depletion regions to meet between the grids, a potential barrier is established and the device turns-off to its blocking state. The turn-off performance of an FCT is better than that of an ordinary thyristor and the possibility of gate turnoff represents a substantial advantage. A narrow spacing between the grid fingers improves the turn-off capability of an FCT. The grid structure must be capable of carrying the turn-off current of holes with minimum debiasing effects due to ohmic voltage drop along the length of the grid fingers. This last requirement is well met by a surface-grid type of FCT where a metal contact can be placed directly over the grid. However, for a high power FCT a buried grid structure seems to be more suitable. To avoid the debiasing effects in this case the grid fingers should be made short and with a high impurity concentration. Thus demands on a grid structure for a good turn off capability are opposite to those for a high current capability and a trade-off is necessary. The influence of an n- layer between the grids (Fig. 2) is a matter not yet examined analytically with respect to the turn-off process but it seems that it should be a favorable one as a smaller part of the applied turn-off voltage is consumed by ionized donors than in an n layer. 3.CONCEFTlONOFAHIGH-POWF,RFCTDl?SIGN
Consideration of the constraints on device design discussed above, suggests that a structure such as that of Fig. 3 should give a good trade-off between the parameters required for a turn-off type FCT with both high-power and high frequency capabilities without much additional complexity in the fabrication process.
a)
parameters of an FCT
To turn-on an FCT which is in the blocking state it is sufficient to remove the negative bias from the grid. After this there is no barrier for electrons to move from cathode to anode and thus current flow will start simultaneously in all channels between the grids that have the structure of a p+nn+ diode, i.e. almost the entire area of the device turns on. There are no problems connected with local turn on and a slow velocity of plasma spreading as in a common thy&or. Thus there is no dddt problem in an FCT. So as far as turn-on performance is concerned, the area of a FCT can be designed very large even if a high-frequency capability of the device is required. There is also no dV/dt problem in an FCT. The capacitive current created by a blocking voltage change does not flow across an n* emitter as in an ordinary thyristor and so does not provide action that tends to turn an FCT on. If a negative bias is applied to the grid with respect to the cathode of an FCT in the on state, the grid becomes
r
A
b)
Fig. 3. (a) A part of a grid pattern of a proposed large area high-power FCT. (b) A sectional view of the FCT structure cut along the line A-A’. The n-doping is an optional addition to improve the relationship between blocking characteristics and grid-finger spacing.
1104
Fig. 4. A sectional
J. HOMOLA
view of the proposed
FCT
and A. G. MILNES
in a basic circuit.
The grid of the device consists of long “longitudinal” stripes and comparatively short “transverse” stripes. An example of a part of a grid of this type is shown in Fig. 3(a). The longitudinal parts of the grid are exposed by etching canyon-like grooves into the cathode surface of the device and are connected to a gate contact as can be seen in the sectional view of the device along the AA line in Fig. 3(b). The longitudinal parts of the grid attached to a gate contact allow the flow of a turn-off current in a large area device with minimum debiasing effects. The transverse parts of the grid are buried in the structure and can be designed with good parameters Land h with respect to the blocking capability and turn-off capability of an FCT. This part of the grid allows the spacing between the longitudinal parts to be moderately large and thus permits a good utilization of the device area. The transverse part of the grid can be very fine since in short transverse stripes debiasing effects are not so important. A further option is the provision of an nlayer between the transverse stripes of the grid to provide improvement in the parameter trade-offs. The pattern of the longitudinal stripes may be designed in any way that provides a good use of device area such as an involute pattern. The contact of the gate is on a lower level than the cathode contact and thus a pressure contact to the cathode can be used, resulting in improvement of thermal conductivity. There is also the possibility of double-side cooling of the device and consequently a higher current capability. Let us consider now the operation of an FCT in a high power application. Figure 4 shows a sectional view of an FCT in a circuit with gate voltage source, main voltage source and a load impedance. The FCT is intended primarily for applications involving power control and moderate-to-large gate signals of a length corresponding to a desired duration of blocking period must be provided by the gate source. There are some advantages in having comparatively large gate signals and in the fact that the gating control is not a trigger action. In particular it means that the FCT is relatively insensitive to voltage spikes that might appear on a supply or signal line that might accidently turn on a conventional thyristor. On the other hand, there is some merit in considering whether the gate signal voltage requirements can be
I Fig.
5. A possible circuit arrangement of an FCT control that provides latching action.
with JFET
lowered and made more similar to a conventional thyristor while still retaining the good power handling features of an FCT. The addition of the JFET element to an FCT in the circuit shown in Fig. 5 appears to offer this possibility. The circuit converts the FCT into a device that is in the off state until a small short pulse to the JFET turns it on. The device then keys-on until another short pulse of opposite polarity turns it off, so a latching action not too dissimilar to that of a conventional turnoff thyristor is to be expected. In the circuit of Fig. 5 the FCT is held off in the blocking state by a constant battery voltage V,, applied through the JFET channel which is normally conducting for zero JFET gate voltage in a depletion mode device. Application of a negative pulse V, so that the JFET gate p is driven negative with respect to the source S causes the JFET channel to pinch off and its resistivity R,,, tends to infinity or at least becomes much larger than the leakage resistance of the FCT gate. Therefore the JFET channel absorbs the bias voltage VGBand the FCT negative gate bias decreases substantially and the FCT turns on. The load current I,_ appears and the voltage drop ILR, across R, keeps the JFET gate negative with respect to the source S so that the JFET channel remains in the high resistance condition even after the disappearance of the pulse V,, as long as certain minimum level of load current flows. The FCT will automatically turn-off when the load current and consequently the JFET gate voltage falls to zero. However, it can be also turned off at any instant by a positive pulse applied at the JFET gate that turns the JFET on, so that the battery gate voltage appears on the FCT grid. The operation of the FCT in this circuit is now similar to that of a conventional thyristor with addition of turn-off capability. FCT however retains a capability for high frequency operation, not found to the same extent in an ordinary thyristor. Figure 6 shows a circuit similar to that of Fig. 5 with the JFET device integrated to the FCT chip as shown
1105
Turn-off-typefield-controlledthyristor
‘ET
integration could be considered. The geometry of contacts of a FCT-JFET device might be for example as shown at Fig. 7. The JFET has the form of three concentric rings, DFET,GFETand SFETand SFETaround the FCT gate GFCT in the center of the structure. The cathode fingers CFCT are of involute form to allow the transversal parts of the underlying FCT grid to be of constant length. These FCT cathode fingers are extensions of the JFET source contact. Between them at lower level are contacts to longitudinal fingers of the FCT grid. A pressure contact can be applied to the cathode emittter contacts. All other contacts can be connected through the central window in the cathode electrode. 4. CONCLUSIONS
Fig. 6. Integrated structure of an FCT and a control jFET in a possible circuit arrangement.
schematically at the right side of the sectional view of the structure. The n channel of the JFET is established between two p layers. The lower p layer can be fabricated simultaneously with the p grid of the FCT, only the upper p layer fabrication requires some additional technological operations. One parameter demand on the JFET is that it must have a large resistance in the off state compared to the resistance of the pn junction of the grid in the reverse direction, which could lead to large JFET gate biases required. A lowering of the pn junction resistance of the FCT grid in the FCT design by addition of a moderate shunt resistor might help the problem. Another requirement is that the JFET have a low resistance RFET in the on state, since the lo off current for the FCT must flow through the JFET during the FCT turn-off process. To meet this demand the JFET should be designed with a large width compared to the distance between source and drain and also the total area occupied by the JFET would be significant. However, in a large area high-power FCT with two levels of contacts on the cathode side as described above an FCT-JFET
The design of field controlled thyristors for good power and frequency ratings is considered. A structure is proposed that has a grid of longitudinal stripes exposed to a gate contact and with short fine-dimension transverse stripes buried in the structure to improve the turn-off performance. Also a modified FCT structure is considered with an additional n- layer provided between the grid stripes to improve the trade-off of the parameters. The possible use of integral JFET transistors to provide the large gate device voltage required for an FCT with a low signal voltage, is also considered. A circuit involving a JFET and an FCT is presented that should provide a latch type FCT that can be turned on and off by small signal pulses of appropriate polarities.
Acknowledgements-The authors wish to thank M.S. Adler and T. Moriizumi for helpful advice in the field of computer calculations.
REFERENCES
I. J. Nishizawa and K. Nakamura, Proc. of 8th Inf. Conf. on Solid-% Deu., Tokyo (1975). 2. R. Barandon and P. Laurenceau, Electron. Lett. 12, 48ti87 (1976). 3. D. E. Houston, et al., IEEE Int. Electron. Lko. Meeting, Tech. Digest, pp. 379-382 (1975). 4. D. N. Houston, et al., IEEE Trans. Electron. Dev. ED-23, 905-911(1976). 5. Y. Kajiwara, et al. IEEE Int. Electron. Lku. Meeting, Tech. Digest, p. 38 (1977). 6. B. W. Wessels and B. J. Baliga, IEEE Int. Electron. Deu. Meeting, Tech. Digesf, p. 30 (1977). 7. M. S. Adler, IEEE Trans. Electron. Lku. ED-25, 529-531 (1978).
-GFET
-0 FE1
Fig. 7. A possible pattern of contacts of an involute FCT with integral JFET device.
8. A. P. Ferro, Electric field controlled diode with a current controlling surface grid, US. patent No. 4,037,245(1977). 9. D. E. Houston and S. Krishna, Field controlled thyristor with buried grid, U.S. Patent No. 4060821(1977). 10. J. Nishizawa, et al., Static induction type thyristor, U. S. Patent No. 4,086,611(1978). Il. B. J. Baliga, IEEE Int. Electron. Dev. Meeting, Tech. Digest, p. 76, (1979). 12. Y. Terasawa, et al., IEEE Int. Electron. Deu. Meeting, Tech. Digest, p. .250, (1979). 13. K. Yamaguchi and H. Kodera, IEEE Trans. Electron. Deu. ECX4, 1061-1069(1977). 14. J. L. Morenza and D. Esteve, Solid-St. Electron. 21, 739-746 (1978).