Two programmable ICs enhance line-card functionality

Two programmable ICs enhance line-card functionality

1182 World Abstracts on Microelectronics and Reliability Electronics, 159 (7 April 1983). With a bus interface unit and a memory control unit, a dis...

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1182

World Abstracts on Microelectronics and Reliability

Electronics, 159 (7 April 1983). With a bus interface unit and a memory control unit, a distributed-processing system can reconfigure and repair itself.

relation to MIS microelectronic systems but the principles stated here apply also to digital systems implemented by other techniques.

Miniaturisation des amplificateurs monolithiques sur AsGa fi 10 GHz. C. RUMELHARD, PH. DUEME, P. R. JAY and M. LE BRUN. Revue tech. Thomson-CSF 15 (1), 183 (March 1983). (In French.) The object of this article is to describe the first stages of a study aimed at reducing the area occupied by monolithic integrated circuits on GaAs. The article includes: a s u m m a r y of the technology involved; a description of the active element (a field effect transistor) and the modelling of the most difficult passive element: the spiral inductor; a description of a 10 G H z amplifier realized from a "classical" design; details of the design and fabrication of an amplifier operating for 2 10 GHz, with the objective of improving by 10 times the integration density.

E-PROMs graduate to 256-K density with scaled n-channel process. M. VAN BUSKIRK, M. HOLLER. G. KORSH, B. LEI~, S. LE~, D. TANG, G. TING, S. F()t I'S, P. DAN(; and W. I-ISHfiR. Electronics, 89 (24 February 1983). With 32-K bytes per chip, erasable programmable read-only memory can carry application software for business and personal computers.

OYSTER: a study of integrated circuits as three-dimensional structures. GEORGE M. KOPPELMANand MICHAEL A. WESLEY. I B M JI Res. Dev. 27 (2), 149 (1983). This paper presents a design for a software system (OYSTER) for the parametric simulation and analysis of the fabrication steps of very large scale integrated circuit devices. The system is based on a solid geometric modelling approach in which the component parts of an integrated circuit are represented at any step as three-dimensional solid objects in a geometric data base. The simulation of a fabrication step transforms the data base representation of the geometry and the relations among component parts may be analysed automatically to determine geometric, mechanical, thermal, and electrical properties. Statistical effects may be incorporated to allow investigation of alignment tolerance build-up and yield. A prototype study is described in which an existing geometric modelling system is used to transform a set of planar masks for an F E T device through 28 process steps into 3-D models which are used to compute device capacitances. 16-bit bipolar microprocessor marches to standard instruction set. S. MOR, H. HINGARH, M. VORA, U. WILNAI,D. MAXWELL and T. LONGO. Electronics, 134 (7 April 1983). Microcode implements floating-point instructions on chip, while interrupt and fault handling serves real-time uses. Demand-paged memory management boosts 16-bit microsystem throughput. GARY MARTIN. Electronics, 120 (24 February 1983). Associative cache returns most references within lOOns, multiple breakpoint registers tend hardware support to debugging. Dynamic properties of mieroeleetronic digital systems. Dm ZDENEK MACK. Tesla Electron., 2, 42 (1982). In the article, which ties in with the analysis of properties of digital microelectronic systems, see [1], the peculiarities of signal propagation in these systems are investigated with respect to the effects of capacitances occurring there as a result of morphologic structure and affecting signal waveform and thus the speed of electrical p h e n o m e n a as well. Moreover, the possibility is shown of designing a system with the aid of "switching time characteristics" and "delay time characteristics". Finally, the noise properties and the I N P U T O U T P U T voltage characteristics are analysed from the viewpoint of the dynamic state. Properties of digital microelectronie systems from the viewpoint of signal transmission. DR. ZDENEK MACK. Tesla Electron., 1, 16 (1982). The article deals with the properties of a signal propagating through a chain of logic elements, and with the relations a m o n g the characteristics of this signal and those of the elements chain. This serves as the premise for deriving expressions for system design. Attention is paid primarily to the static side of the problem, since its dynamic properties will be treated in a separate article as a follow-up to the present one. The problem is treated in

Circuits integr6s diviseurs de frequenee r6alises sur arseniure de gallium. M. GLOANIiC. Recue tech. Thomson-CSt: 15 fl ), 213 (March 1983). (In French.) The performance expected of frequency dividing integrated circuits produced on gallium arsemde has &ctated the course taken to determine the technological line to adopt. A range of division by 2 and by 4 fixed-rank dividers has been operating beyond 3,5GHz, and the author describes the main experimental results obtained with them. He describes the approach adopted I\~r defining the architecture of variable-rank frequency di'~iders of the solid-state type. For instance, a 5/6 GaAs prcscaler has been developed. Consuming 200roW, it operates up to 4GHz. Certain technological improvements deduced from a systematic study of the dependency of performance on technical parameters will make it possible to extend the range of operating frequencies of this logic fanfily to the 5 8 G H z band. Two programmable ICs enhance line-card functionality. FRN~ H. CHERRICK and BHUPENDRA K. AttUJA. Electronics, 116 (2 March 1983). Besides handling subscriber-line interface tasks, this chip pair takes over such responsibilities as time-slot assignment. D M A controller adds muscle to offload microprocessor. DAVID MACMILLAN. Electronics, 147 (10 February 1983). Chip's special flyby operation and chaining capabilities allow direct memory access with no processor im ol\ement.

Specifying multilayer circuit boards to meet the demands of VLSI. NEAL HALES. Electronics, 157 (10 February t983). By understanding the impact of increased chip densities and speeds on muhilayer designs, engineers can produce costeffective boards, Telecommunications IC integrates still more line-card tasks. STEVE BOOTMAN. Electronics, 115 (24 February 1983). In performing supervision and hybrid balancing, chip pulls in flmctions left out of codec-filters. Managing VLSI complexity: an outlook. CARL() H. SEQUIN. Proc. IEEE 71 (1), 149 (1983). The nature of complexity m the context of VLSI circuits is examined, and similarities with the complexity problem in large software systems are discussed. Lessons learned in software engineering are reviewed, and the applicability to VLSI systems design is investigated. Additional difficulties arising in integrated circuits such as those resulting from their two-dimensionality and from the required interconnections are discussed. The positive aspects of VLSI complexity as a way to increase performance and reduce chip size are reviewed. With this discussion as a basis, the evolution of VLSI system design environments is outlined for the near-term, medium-term, and long-term future. The changing role of the designer is discussed. Recommendations are made for enhancements to our engineering curriculums which would provide the next generation of designers with skills relevant to managing VLS1 complexity. Advances in customization free VLSI system designers. RODERIC BERI!SFORI). Electronic.~. 134 (10 February 1983). Structured design, cell libraries, and gate arrays are proving strong competition for standard chips.