Using the metal-oxide-polysilicon-silicon (MOPS) structure to determine LPCVD polysilicon quality

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Applied Surface Science 63 (1993) 281-284 North-Holland

applied surface science

Using the metal-oxide-polysilicon-silicon (MOPS) structure to determine LPCVD polysilicon quality J u l i a n C. C a r t e r a, A l a n G . R . E v a n s

a

and Kraisorn Throngnumchai h

Department of Electronics and Computer Science, The Unicersity of Southampton, Southampton S09 5NH, UK b Electronics Research Laboratories, Central Engineering Laboratories, Nissan Motor Co. Ltd., 1 Natsushirna-cho, Yokosuka, Japan Received 2 June 1992; accepted for publication l l September 1992

The determination of trap state density is demonstrated using high frequency capacitance m e a s u r e m e n t s on metal oxide-polysilicon-silicon structures. An exact transmission line model is used to model equilibrium capacitance-voltage curves. Values of trap state density are compared with those obtained using more complicated structures.

1. I n t r o d u c t i o n

Increasingly CVD polysilicon is being used as a material for active devices such as thin film transistors for large area flat panel displays and three-dimensional integration [1]. However, polysilicon is not an ideal electronic material since grain boundary traps lead to barriers for majority carriers and act as efficient g e n e r a t i o n / recombination sites. Improvements in the electrical properties by hydrogen passivation, for example, can be made - a convenient method of assessing the usefulness of such procedures is described here. The technique is based on the analysis of the small signal impedance of the m e t a l - o x i d e - p o l y silicon-silicon (MOPS) structure. Because the polysilicon must form a good contact with the silicon, an interface treatment that removes the native oxide must be carried out immediately prior to polysilicon deposition. Also the oxide used is deposited at 400oC to restrict any epitaxial regrowth and dopant diffusion from the substrate, the poor quality of deposited oxides is not usually important because of the high number of defects in the polysilicon.

2. C - V

analysis

The structure has been used previously to determine a trap state density using low frequency conductance by Hirose [2] and Werner [3]. The use of a high frequency capacitance method described here relies on the fact that the reciprocal dielectric relaxation time 1

ntxq -

Td

- -

(1)

Es

is of the order of a few hundred kHz for reasonable mobilities even with an intrinsic carrier concentration. Hence, the polysilicon cannot be assumed an insulator and changes in surface potential will be reflected in the measured 1 MHz capacitance. A C - V curve is shown in fig. 1. It is clear that changes in the potential at the oxidepoly interface are manifest in the measured high frequency capacitance. We have developed a model for the system based on the exact transmission line method of Sah [4]. A representation of the structure, band structure and equivalent circuit is shown in fig. 2. The circuit is composed of eight different circuit elements: C k being the specific capacitance of sili-

0169-4332/93/$06.00 © 1993 - Elsevier Science Publishers B.V. All rights reserved

J. (". ("arIer el al. / Using MOI'S ;o determine I.P("1~7) polysilicon quality

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con, G, and G v the conduction and valence band conductances. C,, and ('p theG,.electrOnGptand holetrap charge storage capacitances, and the capture conductance for electrons and holes, and ('t the trap capacitance. These take on values which depend only on the steady state concentranamelyti°ns of electrons, holes and trap occupation level.

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27".

q/x. N

(;,,

- -

(31

Ax

:7

q# p P

Gp

kx

-

(4)

q eN Ax C, -

kT

(5)

Fig. 2. Structure, band diagram and cquivalcnl circuil of the MOPS struclurc.

q3p A x Cp

kT

-

(6)

q 2ci, NPT k x kT '

C'"1

(7)

q2Cpl°NT Ax

(7~

(8)

kT

GPt

qZNrP, r A x

(9)

k TN]q

1

I

0.095

i

0.09

0.985

~

0.98

0.975

(I.97 -15

~ ~ . -10

.

.

.

. ~

I _ _ 0

_ i . . . . 5

i _ • l0

15

g a t e bias ( V )

Fig. 1. Capacitance-voltage curve for MOPS structure showing bias dependent capacitance.

whcre k x is the width of semiconductor clement. #,, and #p are electron and hole mobilities, N and P arc thc steady state electron and hole concentrations, N 3 and t' r the occupation of the trap by electrons and holes respectively, N r r the trap density and c,, and % the capture coefficients for electrons and holes. For simplicity the polysilicon layer is modelled as silicon with an equal number of donor and acceptor traps at midgap distributed evenly throughout the layer. The circuit element values are determined by assuming a trap density, energy and capture cross section and then solving Poisson's equation numerically to determine carrier concentrations and trap occupation levels. To solve for impedancc a transmission matrix method is used [5], the transmission matrix for the whole structure being the product of individual transmission matrices for each element k x starting from the back contact - the last matrix being that for the oxide capacitance. Trial simulations are shown in fig. 3 showing the effect of varying trap density. At low mobilities the polysilicon can bc treated as an insulator, however, as the mobility is increased, a depletion edge due to the traps at the oxide-poly interface is observed as "stretchout". The higher the density of traps the more the stretchout. The mea-

J.C. Carter et al. / Using MOPS to determine LPCVD polysilicon quality

cremental conductance on TFT MOSFETs, using the technique of Fortunato [6]. The extracted trap density is shown in fig. 4. The midgap value for the continuous trap state density is ~ 10 is

230

N = 1.1017cm -3 220

tt

210

~

283

cm -3 eg

N = 5 1017cm -3 200

~.

tt

~ 190

3. Conclusions

e 18o From high frequency capacitance transient measurements on MOPS structures it is possible to extract a generation lifetime and from capacitance-voltage curves an estimate can be made of a trap density. Values obtained using capacitance methods have been compared to other techniques and found in good agreement. The capacitance method has the advantage that devices are simple to fabricate.

170 160 It

150'

2

6

4

8

Gate

Fig.

3.

Simulations

of

C-V

varying

10

12

14

(V)

bias

curves

a MOPS s t r u c t u r e

for

trap density.

sured curve in fig. 1 can be matched to a particular mobility and trap density combination. A good fit for this sample is obtained for a trap density of ~ 1.510 ~8 cm 3. This has been compared to a trap density obtained from measurements of in-

Acknowledgement We would like to thank John Altrip for his help in preparing this work.

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J. ('. Uarter et aL / Using MOPS to determine LP('FT) polvsificon quafitv

References [IJ T. Kamins, Polycrystallinc Silicon lk~r Integrated ('ircuit Applications (Kluwer, Dordrecht, 1988) oh. b. [2] S. llirae, M. Hirosc and Y. Osaka, J. Appl. Phys. 51 (1980) 1025.

[3] ,1. Werner and M. Peisl, Phy~,. Rev, B 31 (1985) ~ 1 . [4] ('.T. Sah, IEEE Proc. 55 (1~67) (~54. [5] F. l l e l m i g and ('.T. Sah, Solid State Electron. 1¢~(1t;73) 1(181. J(iJ (L [:ortunato and P. Miglioralo, App]. (198(~) 1025.

Phys. [,cir. 4 t)