Wafer-level hermetic packaged microaccelerometer with fully differential BiCMOS interface circuit

Sensors and Actuators A 137 (2007) 25–33

Wafer-level hermetic packaged microaccelerometer with fully differential BiCMOS interface circuit Hyoungho Ko a , Sangjun Park a,1 , Byoungdoo Choi a , Ahra Lee b , Dong-il “Dan” Cho a,b,∗ a

School of Electrical Engineering and Computer Science, Seoul National University, San 56-1, Shinlim-dong, Kwanak-gu, Seoul 151-742, Republic of Korea b SML Electronics, Inc., Republic of Korea

Received 20 July 2006; received in revised form 7 January 2007; accepted 14 February 2007 Available online 20 February 2007

Abstract This paper presents a microaccelerometer with wafer-level packaged MEMS sensing element with fully differential, continuous-time BiCMOS interface circuit. The MEMS sensing element is fabricated on a (1 1 1)-oriented SOI wafer by using the sacrificial bulk micromachining (SBM) process. To protect the silicon structure of the sensing element and to enhance the reliability, a wafer level hermetic packaging process is achieved, using silicon–glass anodic bonding. The fabricated sensing element gives the improved noise performance and low bias instability by the inherent high-aspect-ratio, large sacrificial gap and footing-free advantages of the SBM process. The interface circuit is fabricated using a 0.8 ␮m Polarfab BiCMOS process. The continuous-time, fully-differential transconductance input amplifier and the chopper-stabilization architecture is adopted to reduce low-frequency noise. The fabricated microaccelerometer has a total noise equivalent acceleration of 0.23 ␮g/(Hz)1/2 , bias instability of 490 ␮g, input range of ±10 g, and output non-linearity of ±0.5% FSO. © 2007 Elsevier B.V. All rights reserved. Keywords: Microaccelerometer; SBM process; Wafer level hermetic packaging; Bias instability

1. Introduction The MEMS accelerometers with high sensitivity, high resolution and low bias instability are required in wide area applications including tactical and inertial navigation applications. The high aspect ratio structure (HARS) bulkmicromachined accelerometer has the advantage of increased mass compared to the surface micromachined accelerometer, which results in a larger capacitance change. The most widely used process with the HARS accelerometer is deep silicon reactive ion etching (RIE) on a silicon on insulator (SOI) wafer [1–3]. However, the deep silicon RIE process on the SOI wafer leads to a severe footing phenomenon, which degrades the yield and the performances substantially [4,5]. To fabricate the HARS accelerometers, etching the backside silicon of a SOI wafer [6], or etching through the full wafer ∗

Corresponding author at: #402, Blgd. 312, Seoul National University, San 56-1, Shinlim-dong, Kwanak-gu 151-744, Seoul 151-742, Republic of Korea. Tel.: +1 82 2 880 8371; fax: +1 805 980 4308. E-mail address: [email protected] (D.-i. “Dan” Cho). 1 Currently with University of Washington, Seattle, USA. 0924-4247/$ – see front matter © 2007 Elsevier B.V. All rights reserved. doi:10.1016/j.sna.2007.02.014

[7] were also reported. However, they require the complicated double-side wafer bonding processes to achieve the wafer level hermetic packaging (WLHP) process for protecting their released structures. The capacitive interface circuit is also an important factor that determines the performance of the accelerometer. Many architectures of the capacitive interface circuits including switched-capacitor charge integration [8–11] and continuoustime charge to voltage conversion [12] have been reported. Generally, the noise level of switched-capacitor circuit is higher than continuous-time circuit due to the switching noise and the noise folding of switched-capacitor operation [13]. This paper presents a microaccelerometer with a WLHP MEMS sensing element fabricated by the SBM process [14–17] and a fully-differential continuous-time BiCMOS interface circuit. The fabricated sensing element gives the improved noise performance and low bias instability by the inherent high-aspectratio, large sacrificial gap and footing-free advantages of the SBM process. The notchless flat bottom surface fabricated by the SBM process gives near perfect device symmetry, and thus the off-axis error is minimized, hence, gives extremely low bias stability levels. The large sacrificial gap of the SBM-fabricated

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sensing element results the reduced noise level. Also, the large sacrificial gap prevents the stiction problem between the moving structure and the substrate layer. To protect the silicon structure of the sensing element from environmental changes, the WLHP process is performed using a glass–silicon anodic bonding [18]. The interface circuit is fabricated using 0.8 ␮m Polarfab BiCMOS process. Continuous-time, fully-differential transconductance amplifier is used in the interface circuit to obtain lownoise, and chopper-stabilization with high chopping frequency is applied to reduce low-frequency thermal and flicker noise. 2. Mems sensing element design The schematic diagram of the sensing element is shown in Fig. 1(a and b). The inertial force exerted by applied acceleration compels the proof mass to move, and this motion produces the capacitive change between movable electrodes and fixed electrodes. The sensing element is modeled to the second-order transfer function, which can be expressed as ω02 X(s) 1 = = A(s) ms2 + bs + k s2 + (ω0 /Q)s + ω02

(2.1)

where X(s), A(s), ω0 , k, m and Q are displacement, input acceleration, natural frequency, stiffness, proof mass and quality factor, respectively. Fig. 1(c) shows the schematic of the folded spring design. The on-axis stiffness, kon-axis , and the off-axis stiffness, koff-axis are expressed as kon-axis =

koff-axis =

Ehw3L = 1.024 N/m L3

(2.2)

Ehw3D = 403.96 N/m D3 ((7/2) + (3(L/D))(wD /wL )3 ) (2.3)

where E, h, wL , L, wD and D are Young’s modulus, device thickness, width of spring, width of bent, and length of bent, respectively. The off-axis stiffness is 393.83 times as large as the input-axis stiffness, and thus the cross-axis sensitivity is about 0.25%. An ANSYS® modal analysis is performed to verify the mechanical behavior of the sensing element, as shown in Fig. 2. The first mode of an in-plane motion has the resonant frequency of 424 Hz. For the analysis of the quality factor, the Stokes’ flow damping and the squeeze film damping models are used [19,20]. The sensing element is designed to be operated in an atmospheric pressure to avoid a resonance and unstable transient response. Fig. 3(a and b) show the cross-sectional diagram of WLHP sensing element and the magnified view of sensing comb electrodes, respectively. The quality factor induced by Stokes’ flow damping between the moving structure and the substrate (Q1 ), between the moving structure and the upper glass cap (Q2 ), between the moving and stationary comb electrodes (Q3 ) are expressed as   √ 1 cosh 2βgs − cos 2βgs Q1 = = 6.47 × 102 mk μeff Aeff β sinh 2βgs + sin 2βgs (2.4)

Fig. 1. Schematic diagram of WLHP sensing element: (a) schematic diagram of silicon structure; (b) conceptual view of WLHP sensing element; (c) folded spring design.

Q2 =

√ 1 mk μeff Aeff β



cosh 2βgc − cos 2βgc sinh 2βgc + sin 2βgc

 = 1.58 × 103 (2.5)

Q3 =

√ 1 mk μeff Aeff β



cosh 2βg0 − cos 2βg0 sinh 2βg0 + sin 2βg0

 = 2.65 × 105 (2.6)

 β=

ω0 v

(2.7)

where v is the kinetic viscosity, μeff the effective coefficient of air viscosity, Aeff the effective area of proof mass, gs the sacrificial gap, gc the gap between the moving structure and the

H. Ko et al. / Sensors and Actuators A 137 (2007) 25–33

Fig. 4. BNEA vs. sacrificial gap.

Fig. 2. Modal analysis results of sensing element.

glass cap, and g0 is the gap between the moving and stationary comb electrodes, respectively. The quality factor induced by the squeeze film damping between the moving and stationary comb electrodes (Q4 ) is expressed as de3

√

mk Q4 = = 29.09 ne μeff we h3

27

(2.8)

Fig. 3. Dissipative process in WLHP sensing element: (a) cross-sectional diagram of WLHP sensing element; (b) magnified view of sensing comb electrodes.

where ne , de and we are the number of the comb electrodes, the distance between the moving and stationary comb electrodes, and the width of the comb electrodes. The total quality factor, Qtotal , is calculated to be 27.35, given by 1 Qtotal

=

1 1 1 1 + + + Q1 Q2 Q3 Q4

(2.9)

According to the Eq. (2.9), the squeeze film damping between the sensing comb electrodes, which has the minimum quality factor of the previously stated damping models, becomes the dominant damping factor, thus the total quality factor (Qtotal ) can be approximated to Q4 . Therefore, the BNEA (Brownian noise equivalent acceleration) of the sensing element [21,22] is expressed as    4kB Tω0 4kB Tω0 4kB Tne μeff we h  = BNEA = 2 A2 mQtotal mQ4 de3 ρSi eff  we h ∝ (2.10) de3 where kb , T and ρSi are the Boltzmann constant, the absolute temperature, and the density of a silicon. To reduce the BNEA, the width of the sensing comb electrodes (we ) are narrowed to 3 ␮m, and the distance between the moving and stationary comb electrodes (de ) are widened to 10 ␮m. Due to the large sacrificial gap of 20 ␮m, the SBM-fabricated sensing element has the reduced BNEA level, compared to the conventional SOI-fabricated sensing element. In the SOI process, the small sacrificial gap, which is similar to the thickness of the buried oxide, results the large Stokes’ flow damping (Q1 ) between the moving structure and the handle layer of SOI wafer. Q1 in the SOI process with 2 ␮m buried oxide and Q1 in the SBM process with 20 ␮m sacrificial layer are calculated to be 64.9 and 647.9 with the same planar dimensions, respectively. Thus, the small Q1 in the SOI process reduces Qtotal , and it results the increased BNEA level. The sensing element fabricated by the SBM process has the 15–25% reduced BNEA level, compared to the SOI-fabricated device, as shown in Fig. 4.

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The circuit noise equivalent acceleration (CNEA) of the capacitive interface circuit is expressed as  w 3 Cmin Eg0 g0 L CNEA = = Cmin ∝ S εne ρSi Aeff h L h (2.11)

Fig. 5. TNEA vs. device thickness.

where Cmin is the simulated minimum detectable capacitance of the interface circuit, S the mechanical sensitivity of the sensing element, and g0 and the sensing gap between the moving and sensing electrodes. To increase the mechanical sensitivity and to obtain the minimum CNEA, the gap between the moving and stationary comb electrodes is minimized to 1.5 ␮m. The total noise equivalent acceleration (TNEA) can be calculated as follows [23]:  TNEA = BNEA2 + CNEA2 (2.11) According to the Eqs. (2.10) and (2.11), as the device thickness (h) is higher, the BNEA is increased, but the CNEA is decreased. Because the TNEA is the geometric mean of the

Fig. 6. Schematic of capacitive interface circuit: (a) top level schematic of interface circuit; (b) schematic of input transconductance amplifier; (c) schematic of relaxation oscillator.

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Fig. 6. (Continued).

BNEA and the CNEA, the TNEA can be minimized at the optimal device thickness. Fig. 5 shows the relationship between the device thickness and the TNEA. When the device thickness, h, is larger than 40 ␮m, the TNEA is almost minimized, and has the minimum value at the 60 ␮m. In this process, due to the aspect ratio limitation of deep silicon reactive ion etching (RIE), h is determined to be 40 ␮m. When the device thickness is 40 ␮m, the BNEA is 0.13 ␮g/(Hz)1/2 , the CNEA for Cmin = 0.2 aF/(Hz)1/2 is 0.18 ␮g/(Hz)1/2 , and the TNEA is 0.23 ␮g/(Hz)1/2 . 3. Capacitive interface circuit design Fig. 6(a) shows the top level schematic of the capacitive interface circuit. The interface circuit is fabricated using 0.8 ␮m Polarfab BiCMOS process. Fully-differential architecture is adopted to reject the common mode noise, and to obtain a improved bias stability level. For the input buffer, the continuous-time, fully-differential transconductance amplifier is used to obtain the low-noise characteristic. Also chopperstabilization with the high chopping frequency of 1 MHz is applied to reduce the low-frequency noise including 1/f noise. The minimum detectable capacitance change of the interface circuit, Cmin , is simulated to be 0.2 aF/(Hz)1/2 . The 1 MHz relaxation oscillator modulates the capacitance change from the MEMS sensing element, and the modulated capacitance change is converted to the voltage signal by the input transconductance amplifier. Then, the output signal is multiplied with the 1 MHz square wave carrier from the oscillator. After the multiplication, the high frequency components of the multiplied signal are removed using the 4th order Butterworth low pass filter, and then the desired acceleration signal is obtained. Fig. 6(b) shows the simplified schematic of the input transconductance amplifier. When the capacitance of the MEMS

sensing element is changed, the amplifier converts the capacitance change to output current. MN1 and MN2 are NMOS source-followers to provide a buffered output of the input-signal. The large drain-source currents of 0.8 mA and the large size (W/L = 120 ␮m/0.8 ␮m) are adopted to MN1 and MN2 for higher gm , reduced input referred noise, and improved CMRR. R3 , R4 , R5 and R6 are large resistors that make the DC path for the capacitive input nodes, in order to maintain the DC bias point of the input capacitive signal. R14 is inserted to linearize the BJT differential pair, Q3 and Q4 . To improve the frequency response and reduce the ripple of the output signal, C1 and C2 are added. C1 and C2 are carefully sized because large-sized C1 and C2 can result the limited bandwidth and the reduced CMRR. The −3 dB bandwidth of the amplifier and the CMRR are designed to be higher than 10 MHz and 85 dB, respectively. The differential output current due to the input capacitance change can be approximated as I = ±

VOSC C VOSC C ± 2(R14 + re ) Cnominal 2R14 Cnominal

(3.1)

where Vosc , re , C and Cnominal are the output voltage of the oscillator, emitter resistance of Q3 and Q4 , input capacitance change and nominal capacitance of the sensing element, respectively. To implement the chopper-stabilization architecture and to modulate the input capacitance change, a relaxation oscillator with 1 MHz square wave output is designed. Fig. 6(c) shows the schematic of the oscillator. R1 , R2 and C1 determine the oscillation frequency. The approximated period of the square wave output is expressed as follows: TOSC = 4 (R1 + R2 ) C1 = 1.006 ␮s

(3.2)

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4. Fabrication process The fabrication process flow of the WLHP sensing element is shown in Fig. 7. The fabrication process starts on a (1 1 1)oriented SOI wafer. At first, as shown in Fig. 7(a), the silicon sensing structure is defined and passivated by using deep silicon RIE and oxide–nitride composite layer, respectively. Then, the second deep silicon RIE and alkaline lateral wet etch release

the structure with the large sacrificial gap (Fig. 7(b)). This step gives lower BNEA and highly improves the process yield by solving the many chronic problem of the typical SOI process such as the stiction between the structure and the substrate, the structural damage due to the footing induced notching. Next, the passivation layer and the opened buried oxide layer are removed (Fig. 7(c)). Then, the glass–silicon anodic bonding is performed to achieving the WLHP (Fig. 7(d)). The glass “cap” wafer is

Fig. 7. Fabrication process flow: (a) first deep silicon RIE and passivation; (b) second deep silicon RIE and lateral wet etch; (c) removal of passivation and opened buried oxide; (d) glass–silicon anodic bonding; (e) metal layer deposition and patterning.

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Fig. 8. Fabrication results of WLHP sensing element: (a) fabricated silicon structure of sensing element; (b) cross-sectional view of WLHP sensing element; (c) fabricated WLHP sensing element.

fabricated on a Pyrex #7740 of 350 ␮m thickness. The protection cavity and the via-hole of the glass “cap” wafer are fabricated by HF wet-etching and sand-blasting, respectively. Finally, the metal layer of 5 ␮m thickness is deposited and interconnection lines are patterned (Fig. 7(e)). The gross leak test is performed to verify the hermeticity of the capped sensing element by dipping the bonded wafer in isopropyl alcohol (IPA) at room temperature for 2 weeks [24]. The fabrication results of the WLHP sensing element are given in Fig. 8. 5. Performance evaluations Figs. 9 and 10 shows the photographs of the fabricated interface circuit and the PCB implementation of the microaccelerometer, respectively. The BiCMOS capacitive interface circuit and the MEMS WLHP sensing element are mounted and wire bonded to substrate PCB. To evaluate the fabricated microaccelerometer, B&K 4808 vibration exciter and B&K 8305 reference accelerometer are used. Fig. 11(a) shows the output of the 1 MHz oscillator. The measured period of 1.066 ␮s is almost identical to the designed period of 1.006 ␮s. To evaluate the bias instability, the root-Allan variance method is used [25]. Fig. 12(b) shows the root-Allan variance plot, and the bias instability is measured to be 490 ␮g at the asymptote. Fig. 11(b) shows the input–output characteristic at 40 Hz input acceleration. The input range is measured to be higher than ±10 g, and the output non-linearity is measured to be ±0.5% FSO. The

Fig. 9. Fabricated capacitive interface circuit.

Fig. 10. PCB implementation of microaccelerometer.

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Fig. 11. Performance evaluations: (a) output of 1 MHz square wave oscillator; (b) root-Allan variance plot; (c) input–output characteristic at 40 Hz input acceleration; (d) time domain output at 40 Hz, 1 g input acceleration. Table 1 Design specifications

Fig. 12. Comparison of this work and previous works.

MEMS sensing element Proof mass Spring stiffness Q Sensing gap Device thickness Sacrificial gap Mechanical sensitivity BNEA Die size

122 ␮g 1.024 N/m 27.35 1.5 ␮m 40 ␮m 20 ␮m 0.54 pF/g 0.13 ␮g/(Hz)1/2 3.4 mm× 3.4 mm

Interface circuit Chopping frequency 3 dB bandwidth of front-end amplifier CMRR of front-end amplifier Electrical sensitivity Supply voltage CNEA for Cmin = 0.2 aF/(Hz)1/2 Die size

1 MHz Higher than 10 MHz Higher than 85 dB 0.15 V/pF ±5 V 0.18 ␮g/(Hz)1/2 1.7 mm × 2.3 mm

MEMS + IC hybrid system Bias instability Input range Output non-linearity

490 ␮g Higher than ±5 V ±0.5% FSO

H. Ko et al. / Sensors and Actuators A 137 (2007) 25–33

time domain output at 40 Hz, 1 g input acceleration is shown in Fig. 11(c). The design specifications are summarized in Table 1. 6. Conclusion A WLHP, fully-differential microaccelerometer with 490 ␮g bias instability is presented. The silicon structure of the sensing element is fabricated using the SBM process, which has the inherent advantage of the high-aspect-ratio, footing-free, reduced mechanical noise, and improved process yield. To protect the silicon structure of the sensing element and to enhance the reliability, a wafer level hermetic packaging process is performed by using a silicon–glass anodic bonding process. The capacitive interface circuit is fabricated using Polarfab BiCMOS 0.8 ␮m process. The continuous-time, fully-differential transconductance input amplifier and the chopper-stabilization architecture is adopted to reduce low-frequency noise. The comparison of this work and the previous works [26–28] is shown in Fig. 12. Except the IMU module and the quartz micromachined accelerometers, the fabricated microaccelerometer shows extremely low bias instability level, compared to the previous works of bulk-micromachined, surface-micromachined or nickel-plated microaccelerometer. This result can be used for the high-end applications including defense and aeronautics area [29]. The fabricated microaccelerometer has the TNEA of 0.23 ␮g/(Hz)1/2 , the bias instability of 490 ␮g, the input range of ±10 g, and the output non-linearity of ±0.5% FSO. Acknowledgements This research was supported by the MIC&IITA through IT Leading R&D Support Project under the contract project code A1100-0400-0058. Authors thank to Seung-jun Paik, Ph.D. of Seoul National University, who helps the MEMS fabrication process, and also thank to John Leighton of Analog Action, Inc., who helps the analog circuit design. References [1] T.D. Chen, T.W. Kelly, D. Collins, B. Berthold, T.J. Brosnihan, T. Denison, J. Kuang, M. O’Kane, J.W. Weigold, D. Bain, The next generation integrated MEMS and CMOS process on SOI wafers for overdamped accelerometers, in: The 13th International Conference on Solid-State Sensors, Actuators and Microsystems, vol. 2, Seoul, Korea, June 2005, pp. 1122–1125. [2] S.X.P. Su, H.S. Yang, A.M. Agogino, A resonant accelerometer with twostage microleverage mechanisms fabricated by SOI-MEMS technology, Sens. J. IEEE 5 (December (6)) (2005) 1214–1223. [3] B.V. Amini, R. Abdolvand, F. Ayazi, Sub-micro-gravity capacitive SOI microaccelerometers, in: The 13th International Conference on Solid-State Sensors, Actuators and Microsystems, vol. 1, Seoul, Korea, June 2005, pp. 515–518. [4] M. Lee, S. Kang, K. Jung, S. Choa, Y. Cho, A high yield rate MEMS gyroscope with a packaged SiOG process, J. Mircomech. Microeng. 15 (September) (2005) 2003–2010. [5] J. Kim, S. Park, D. Kwak, H. Ko, W. Carr, J. Buss, D. Cho, Robust SOI process without footing and its application to ultra high-performance microgyroscopes, Sens. Actuators A 114 (September) (2004) 236–243. [6] B.V. Amini, F. Ayazi, A 2.5-V 14-bit sigma delta CMOS SOI capacitive accelerometer, IEEE J. Solid-State Circuit 39 (December) (2004) 2467–2476.

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