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X-ray lithography with negative resists
790
World Abstracts on Microelectronics and Reliability
characterized when the time for such a reassignment is allowed to be an exponential r.v. FTANS--a computer program for probabilistic analysis of non-coherent structures. A. BOJADJIEV. IEEE Trans. Reliab. R-33 (5) 397 (1984). A code for probabilistic analysis of noncoherent structures is described. An input to the program is a
dual fault tree description and probabilities of primary events, an output of the code is a complete nonredundant set of prime implicant sets and probability of the top event. The main features of the code are simple use, good speed, and low computer memory requirements based on the use of environmental assembler routines and on the description of the events by one byte words.
4. M I C R O E L E C T R O N I C S - - G E N E R A L Cosmic ray effects in microelectronics. L. ADAMS. Microelectron. J. 16 (2) 17 (1985). Cosmic ray effects in microelectronics are presently of major concern in satellite technology, beginning to present problems in digital avionics, particularly high flying aircraft. The cosmic ray effect, often referred to as a 'single event upset' (SEU) is the result of passage of a naturally occurring, energetic, heavy ion through a sensitive region of a microcircuit. The dense, localised ionisation along the track of the ion can result in the generation of sufl]cient charge to change the state of an internal node resulting in a false logic transition. A more serious cosmic ray effect is 'latch-up' which is the result of an
SCR action in certain microcircuit technologies, is permanent in nature and potentially destructive. This paper describes the phenomenon of single event upset resulting from cosmic ray effects, discusses its impact in terms of microcircuit technology and describes the current status and future trends in ground testing techniques.
Exotic materials for integrated circuits. RON ISCOFF. Semiconductor Int. 70 (July 1985). While gallium arsenide is the most popular alternative to silicon, research promises other compounds suitable for ICs and optoelectronic devices.
5. M I C R O E L E C T R O N I C S - - D E S I G N AND C O N S T R U C T I O N CVD tungsten and tungsten silicide for VLSI applications. SURESH SACHDEVand ROBERT CASTELLANO.Semiconductor Int. 306 (May 1985). New thin film materials offer superior properties for very large scale integration ICs. Positive resist development model for linewidth control. M. P. C. WATTS. Semiconductor Int. 124 (1985). This analytical model of positive resist development enables a quantitative interrelationship of process specifications. The DIP may take its final bows. REED BOWLBY. IEEE Spectrum 37 (June 1985). The dual-in-line package, the reigning IC package for several generations, is losing position to newcomers for packaging advanced chips. XPS analysis of GaAs-surface quality affecting interelectrode material migration. K. H. KRETSCHMERand H. L. HARTNAGEL. 23 a. Proc. Reliab. Phys. Symp. 45 (1985). XPSstudies of differently treated (100)-GaAs-surfaces were undertaken and correlated with the threshold for material migration across the GaAs-surface between neighbouring Al-electrodes. 5 surface conditions based on various etching and cleaning processes as commonly employed for the manufacture of GaAs devices have been investigated. The XPS-spectra show that high threshold values can be obtained by treatments resulting in a strongly reduced surface oxygen content.
X-ray lithography with negative resists. YOSHIK1 SUZUKI, NOBUYUKI YOSHIOKA and TERUHIKO YAMAZAKI.Solid St. Technol. 197 (May 1985). Processing characteristics of x-ray negative resists in the fabrication of fine patterns are studied. It was found that the normalized resist thickness obtained from sensitivity curves corresponds to the volume shrinkage ratio for the fine patterns. The result was applied to simulation programs to estimate both developed resist profiles and pattern widths in negative resists exposed by practical x-ray exposure systems. Results calculated by the simulation programs agreed well with experimental results. The programs should be useful for determining exposure parameters in production x-ray lithography. Polycide etching for VLSI applications. R. T. BENNETTand T. P. CHOW. Solid St. Technol. 193 (April 1985). The requirement for a low resistivity gate material is one of the limiting
factors in circuit performance for VLSI. Metal silicides or potycides have been used in MOSFET technology as an alternative to doped polysilicon for gate material. The use of polycide as a gate material places additional requirements on the etching process with respect to etch profile and selectivity. Polycides formed with refractory metals have been plasma etched in both fluorinated and chlorinated plasmas. Directional and selective etching of polycides using a Flexible Diode reactor are discussed. The etching requirements of refractory metal polycides are reviewed along with process concerns that have been observed.
Resist modeling and profile simulation. A. R. NEUREUTHER and W. G. OLDHAM.Solid St. Technol. 139 (May 1985). Resist characterization and profile simulation are having an important impact on lithography, especially where materials issues are concerned. Examples are presented both to overview the status of modeling and simulation, and to illustrate physical mechanisms and key parameters associated with new lithographic approaches. Surface-rate retardation effects in positive photoresist, contrast enhancement layers, and inorganic resists are emphasized. Tighter VLSI geometries create problems with hot carriers, CHARLES L. COm~N. Electronics 36 (July 1985). As fine-line lithography advances, Japanese modify lightly doped drains to stretch chip life. Applications of plasma enhanced chemical vapor deposition in VLSI. B. GOROWITZ,T. B. GORCZYCAand R. J. SA1A.Solid St. Technol. 197 (June 1985). Applications of plasma enhanced chemical vapor deposition in rnicroelectronics fabrication are discussed. Some of these applications are for the deposition of materials which have properties as good as or better than those of films deposited at higher temperatures by strictly thermal processes. Other applications described are those which serve as aids to lithography, etching, and other unit steps where films remaining on the processed wafers are removed. Relatively recent PECVD processes for the formation of new films with interesting potential applications are also reviewed. Robot transfer system for wafer processing. LOREN E. SHAUM. Solid St. Technol. t55 (November 1984). The utilization of
World Abstracts on Microelectronics and Reliability
characterized when the time for such a reassignment is allowed to be an exponential r.v. FTANS--a computer program for probabilistic analysis of non-coherent structures. A. BOJADJIEV. IEEE Trans. Reliab. R-33 (5) 397 (1984). A code for probabilistic analysis of noncoherent structures is described. An input to the program is a
dual fault tree description and probabilities of primary events, an output of the code is a complete nonredundant set of prime implicant sets and probability of the top event. The main features of the code are simple use, good speed, and low computer memory requirements based on the use of environmental assembler routines and on the description of the events by one byte words.
4. M I C R O E L E C T R O N I C S - - G E N E R A L Cosmic ray effects in microelectronics. L. ADAMS. Microelectron. J. 16 (2) 17 (1985). Cosmic ray effects in microelectronics are presently of major concern in satellite technology, beginning to present problems in digital avionics, particularly high flying aircraft. The cosmic ray effect, often referred to as a 'single event upset' (SEU) is the result of passage of a naturally occurring, energetic, heavy ion through a sensitive region of a microcircuit. The dense, localised ionisation along the track of the ion can result in the generation of sufl]cient charge to change the state of an internal node resulting in a false logic transition. A more serious cosmic ray effect is 'latch-up' which is the result of an
SCR action in certain microcircuit technologies, is permanent in nature and potentially destructive. This paper describes the phenomenon of single event upset resulting from cosmic ray effects, discusses its impact in terms of microcircuit technology and describes the current status and future trends in ground testing techniques.
Exotic materials for integrated circuits. RON ISCOFF. Semiconductor Int. 70 (July 1985). While gallium arsenide is the most popular alternative to silicon, research promises other compounds suitable for ICs and optoelectronic devices.
5. M I C R O E L E C T R O N I C S - - D E S I G N AND C O N S T R U C T I O N CVD tungsten and tungsten silicide for VLSI applications. SURESH SACHDEVand ROBERT CASTELLANO.Semiconductor Int. 306 (May 1985). New thin film materials offer superior properties for very large scale integration ICs. Positive resist development model for linewidth control. M. P. C. WATTS. Semiconductor Int. 124 (1985). This analytical model of positive resist development enables a quantitative interrelationship of process specifications. The DIP may take its final bows. REED BOWLBY. IEEE Spectrum 37 (June 1985). The dual-in-line package, the reigning IC package for several generations, is losing position to newcomers for packaging advanced chips. XPS analysis of GaAs-surface quality affecting interelectrode material migration. K. H. KRETSCHMERand H. L. HARTNAGEL. 23 a. Proc. Reliab. Phys. Symp. 45 (1985). XPSstudies of differently treated (100)-GaAs-surfaces were undertaken and correlated with the threshold for material migration across the GaAs-surface between neighbouring Al-electrodes. 5 surface conditions based on various etching and cleaning processes as commonly employed for the manufacture of GaAs devices have been investigated. The XPS-spectra show that high threshold values can be obtained by treatments resulting in a strongly reduced surface oxygen content.
X-ray lithography with negative resists. YOSHIK1 SUZUKI, NOBUYUKI YOSHIOKA and TERUHIKO YAMAZAKI.Solid St. Technol. 197 (May 1985). Processing characteristics of x-ray negative resists in the fabrication of fine patterns are studied. It was found that the normalized resist thickness obtained from sensitivity curves corresponds to the volume shrinkage ratio for the fine patterns. The result was applied to simulation programs to estimate both developed resist profiles and pattern widths in negative resists exposed by practical x-ray exposure systems. Results calculated by the simulation programs agreed well with experimental results. The programs should be useful for determining exposure parameters in production x-ray lithography. Polycide etching for VLSI applications. R. T. BENNETTand T. P. CHOW. Solid St. Technol. 193 (April 1985). The requirement for a low resistivity gate material is one of the limiting
factors in circuit performance for VLSI. Metal silicides or potycides have been used in MOSFET technology as an alternative to doped polysilicon for gate material. The use of polycide as a gate material places additional requirements on the etching process with respect to etch profile and selectivity. Polycides formed with refractory metals have been plasma etched in both fluorinated and chlorinated plasmas. Directional and selective etching of polycides using a Flexible Diode reactor are discussed. The etching requirements of refractory metal polycides are reviewed along with process concerns that have been observed.
Resist modeling and profile simulation. A. R. NEUREUTHER and W. G. OLDHAM.Solid St. Technol. 139 (May 1985). Resist characterization and profile simulation are having an important impact on lithography, especially where materials issues are concerned. Examples are presented both to overview the status of modeling and simulation, and to illustrate physical mechanisms and key parameters associated with new lithographic approaches. Surface-rate retardation effects in positive photoresist, contrast enhancement layers, and inorganic resists are emphasized. Tighter VLSI geometries create problems with hot carriers, CHARLES L. COm~N. Electronics 36 (July 1985). As fine-line lithography advances, Japanese modify lightly doped drains to stretch chip life. Applications of plasma enhanced chemical vapor deposition in VLSI. B. GOROWITZ,T. B. GORCZYCAand R. J. SA1A.Solid St. Technol. 197 (June 1985). Applications of plasma enhanced chemical vapor deposition in rnicroelectronics fabrication are discussed. Some of these applications are for the deposition of materials which have properties as good as or better than those of films deposited at higher temperatures by strictly thermal processes. Other applications described are those which serve as aids to lithography, etching, and other unit steps where films remaining on the processed wafers are removed. Relatively recent PECVD processes for the formation of new films with interesting potential applications are also reviewed. Robot transfer system for wafer processing. LOREN E. SHAUM. Solid St. Technol. t55 (November 1984). The utilization of