- Email: [email protected]
Current conduction mechanism in TiO2 gate dielectrics
Microelectronic Engineering 81 (2005) 188–193 www.elsevier.com/locate/mee
Current conduction mechanism in TiO2 gate dielectrics S. Chakraborty b
a,*
, M.K. Bera a, S. Bhattacharya b, C.K. Maiti
a
a Department of Electronics and ECE, Indian Institute of Technology, Kharagpur 721302, India School of Electrical and Electronic Engineering, The QueenÕs University of Belfast, Belfast BT7 1NN, Nothern Ireland, United Kingdom
Available online 7 April 2005
Abstract Electrical properties of titanium oxide (TiO2) deposited on strained-Si heterolayers by plasma enhanced chemical vapor deposition (PECVD) from an organo-metallic precursor titanium isopropoxide (TTIP), have been investigated in Al/TiO2/strained-Si structures by capacitance–voltage (C–V) and current–voltage (I–V) measurements. For as-deposited layers, which exhibit high level of interface states and leakage current, both Poole–Frenkel (PF) and Schottky emission (SE) effects govern the conduction mechanism. After post deposition annealing in pure nitrogen ambient at 400 C, the conduction mechanism changes and the interface state density reduces by an order of magnitude. It is found that after annealing, only Schottky emission dominates the conduction mechanism at a low electric field. 2005 Elsevier B.V. All rights reserved. Keywords: Strained-Si; High-k; TiO2; Schottky emission; Poole–Frenkel effect
1. Introduction Strained-Si grown pseudomorphically on relaxed SiGe heterostructures is one of the promising candidates for expanding the Si complementary metal-oxide–semiconductor (CMOS) performance due to mobility enhancements in both electrons and holes [1,2]. Biaxial tensile strain in Si splits the sixfold degeneracy in the conduction band into a lower energy double degenerate valley and a higher energy fourfold degenerate valley. The *
Corresponding author. Fax: +91 3222 255303. E-mail address: [email protected] (S. Chakraborty).
resulting increased in-plane electron mobility, due to a decrease in the average effective electron mass and inter-valley carrier scattering, has been reported in literature [3–7]. Tensile strain in Si is also known to improve the in-plane hole mobility by splitting the degeneracy between the light and heavy holes [8–10]. These effects have been employed successfully to fabricate enhanced mobility metal-oxide–semiconductor field effect transistor (MOSFETs) [11,12] and modulation doped field effect transistors (MODFETs) [13,14] with strained-Si layers grown on relaxed SiGe layers. However, there are several material and process related issues to be understood and integration
0167-9317/$ - see front matter 2005 Elsevier B.V. All rights reserved. doi:10.1016/j.mee.2005.03.005
S. Chakraborty et al. / Microelectronic Engineering 81 (2005) 188–193
hurdles to be overcome to realize the benefits of strained Si CMOS technology. For instance, diffusion of Ge atoms from the SiGe buffer into the strained Si layer can occur when the heterostructure are subjected to high temperature thermal processing [15,16]. The presence of Ge in the strained Si channel region can degrade electrical performance of the device. The aggressive downscaling of MOS devices has also caused high field induced device degradation phenomena such as velocity saturation effect. A more reliable dielectric than conventional thermally grown Si dioxides is needed and is now a major concern for the ultralarge scale integration (ULSI) such as dynamic random access memories (DRAMs) and electrically erasable and programmable read-only memories (EEPROMs). Recently titanium oxide films are being studied intensively as one of the promising storage dielectrics for high-density DRAM applications due to its high permittivity and excellent step coverage [17,18]. In this work, we focus on the effects of the post deposition annealing of MOS capacitors in N2 ambient on the electrical properties of titanium oxide (TiO2) films deposited on strained-Si heterolayers and the current conduction mechanism in these structures. The improvement of the interface properties after annealing was verified by the observed reduction of the interface states at midgap. It is found that trap assisted Poole–Frenkel conduction mechanism disappears after annealing.
2. Experimental Strained-Si layers on relaxed SiGe grown using ultra-high-vacuum (UHV) compatible low pressure chemical vapor deposition (LPCVD) system, chemically etched in H2O2:H2SO4 solution, followed by a dip in 1% HF solution to remove the native oxide layer, were used as the substrates. The metal organic compounds have been widely used as source materials for the deposition of metal oxides on semiconducting substrates due to their good stability and compatibility with semiconductor processing technology. Titanium isopropoxide (TTIP) [Ti(OC3H7)4] was used as source material for deposition of TiO2 films. TTIP
189
was vaporized from a bubbler kept at 45 C and was carried to the quartz process/deposition chamber of the microwave (700 W, 2.45 GHz) cavity discharge system through a gas line. The process chamber was maintained at a pressure of 500 mTorr. The temperature in the chamber was 150 C during deposition. The film thickness was ˚) measured using a single wavelength (6328 A ellipsometer (model: Gaertner L-117). The thick˚ ness of the TiO2 film was found to be 110 A ˚ ). (EOT 22.7 A X-ray photoelectron spectroscopy (XPS) was used to analyze the composition and chemical states in TiO2 film and its interface with strainedSi. XPS study was carried out using model ESCALAB MKII (VG Microtech). For the electrical measurements, MOS capacitors were fabricated on TiO2 films by evaporating circular A1 dots (with an area of 1.96 · 103 cm2) through a shadow mask. Post deposition annealing was performed in N2 (99.999%) ambient at 400 C for 20 min. The capacitance–voltage (C–V) and current–voltage (I–V) characteristics were measured using HP-4061A semiconductor component test system.
3. Results and discussion Fig. 1 shows the schematic cross-section of the MOS capacitor test structure and the associated band diagram of the heterostructure without any bias. The chemical bonding configuration of the TiO2 films on strained-Si films were analyzed by XPS studies using a non-monochromatized MgKa (hm = 1253.6 eV) radiation at an angle 30 between the analyzer axis and the sample normal and the corresponding analyzer energy was 50 eV. The base pressure of the analysis chamber was kept at 2 · 1010 Torr. All the binding energies were corrected for sample charging effect with reference to the C 1s line around at 285.0 eV. Fig. 2 shows the Ti 2p XPS spectrum of the as deposited TiO2 films. The Ti 2p signal is associated with two peaks located at 458.1 eV and 463.7 eV (energy separation of 5.6 eV) which are representative for Ti 2p3/2 to Ti 2p1/2 spin orbital splitting. This is a typical characteristic of binding energy of Ti in stoichiometric TiO2 [19].
190
S. Chakraborty et al. / Microelectronic Engineering 81 (2005) 188–193
Fig. 1. Schematic cross section of the MOS structure on strained-Si/SiGe and associated energy band diagram.
Fig. 2. XPS spectra of as-deposited TiO2 films on strained-Si. XPS was performed at an angle 30 between the analyzer axis and the sample normal.
Fig. 3 shows frequency dispersion in C–V characteristics of MOS test structure before post deposition annealing. Dispersion is observed at the depletion and the accumulation region, although such effects are negligible at inversion region. This type of C–V characteristic is typical of MOS systems having oxide charges at the interface and in the insulator. The C–V characteristics were found to be stretched along the voltage axis. The stretchout produces a nonparallel shift of the C–V curve. This is due to the presence of both donor and
Fig. 3. Frequency dispersion in C–V characteristics of MOS capacitor before annealing.
acceptor like interface traps occupying a portion of the semiconductor bandgap [20]. At the interface, slower states are able to respond only at lower frequencies. At higher frequencies these slow states cannot respond to the applied ac signal and they remain charged and thus more positive (for n-type) voltages are required in order to achieve accumulation [21]. As the frequency increases, the stretch-out effect increases accordingly, and at the highest frequency (1 MHz) the high density of interface states delays the MOS structure to reach accumulation. The C–V characteristics after post deposition annealing are shown in Fig. 4. It is seen that the frequency dispersion at the depletion region is reduced to some extent and also the voltage stretch-out effect. This indicates that the number of traps at the interface decrease after post deposition annealing. Fixed oxide charge is a property of the dielectric material and does not contribute to charge interaction between the dielectric and substrate whereas interface traps are considered to be in rapid electrical communication with the underlying substrate. The interface trap density (Dit) is determined from the combination of a single frequency capacitance–voltage (C–V) and conductance–voltage (G–V) characteristics using HillÕs method [22]. The expressions for the interface trap density and fixed oxide charge density (Qf/q) are given by
S. Chakraborty et al. / Microelectronic Engineering 81 (2005) 188–193
Fig. 4. Frequency dispersion in C–V characteristics of MOS capacitor after post deposition annealing.
ð2=qAÞðGmax =xÞ i Dit ¼ h ðGmax =xC ox Þ2 þ ð1 C m =C ox Þ2
ð1Þ
and Qf C ox ¼ ðUms UF V FB Þ q Aq
ð2Þ
where, Ums is the metal–semiconductor work function, UF is the Fermi potential and Gmax is the maximum conductance in G–V characteristics with its corresponding capacitance Cm, Cox is the oxide capacitance, x is the angular frequency and A is the area of the capacitor. The extracted values of Dit are 1.19 · 1012 eV1 cm2 and 3.36 · 1011 eV1 cm2 for as-deposited and annealed samples, and the fixed oxide charge densities are 5.07 · 1012 cm2 and 4.01 · 1012 cm2, respectively. The higher interface state density for the as-deposited TiO2 sample is due to the out-diffusion of Ge from the buffer layer. Fig. 5 shows the I–V characteristics of a MOS capacitor biased in accumulation before and after post deposition annealing. It is seen that the leakage current reduces by an order of magnitude after annealing in N2 ambient. The physical origin of this leakage current reduction in N2 ambient is due to the incorporation of the N2 in the TiO2 film, which also help to densify the film and reduce the bulk and interface defect densities [23]. Two main conduction mechanisms were invoked to explain the current transport in TiO2 thin films, i.e., Scho-
191
Fig. 5. Current–voltage characteristics of MOS capacitors with TiO2 films on strained-Si layer before and after post deposition annealing.
ttky emission (SE) and Poole–Frenkel (PF) effects. The SE is a process occurring across the interface between a semiconductor (or metal) and an insulating film as a result of barrier lowering due to the applied field and the image force. The PF is associated with the field enhanced thermal excitation of charge carriers from traps. Generally, the SE conduction process is an electrode-limited conductivity that depends strongly on the barrier between the metal and insulator and has the inclination to occur for insulators with fewer defects. The current governed by the SE mechanism is expressed as pffiffiffiffi 1 qU bSE E ; I SE ¼ AT 2 exp ð3Þ kT where A is a constant, U is the Schottky barrier height, q is the electronic charge, k is the BoltzmannÕs constant and E is the electric field. The constant bSE is given by sffiffiffiffiffiffiffiffiffiffiffiffi q3 ð4Þ bSE ¼ 4pe0 er where er is the dielectric constant of the insulator, e0 is the permittivity of the free space. Schottky-emission for both as-deposited and annealed samples have been illustrated in terms of ln(I) vs. E1/2 plot from the experimental I–V data and are shown in Figs. 6 and 7, respectively. The straight-line characteristics at relatively low electric field (<1 MV/cm)
192
S. Chakraborty et al. / Microelectronic Engineering 81 (2005) 188–193
tric field. Electron emission is primarily controlled by the electric field, which effectively reduces the barrier height on one side of the trap, thus increasing the probability of the electron escaping from the trap. Therefore, the PF effect is a bulk-limited conduction process that relies critically upon the contribution of a considerable amount of traps existing in the bulk of the insulator. The expression for the PF current density is given by pffiffiffiffi 1 qU bPF E ; ð5Þ J ¼ CE exp nkT
Fig. 6. The ln(I) vs. E1/2 plot (Schottky emission) for a MOS capacitor with as-deposited TiO2 films.
where qU is the ionization potential in eV, which is the amount of energy required for the trapped electron to overcome the influence of the pffiffiffitrapping ffi centre when no field is applied, bPF E is the amount by which trap barrier height is reduced by the applied electric field E, C is the proportionality constant and k is the Boltzmann constant. The coefficient n is introduced in order to consider the influence of the trapping or acceptor centers (1 < n < 2) [24]. The PF constant, bPF, is given by sffiffiffiffiffiffiffiffiffiffi q3 ; ð6Þ bPF ¼ pe0 er where e0 is the permittivity of the free space and er is the dynamic dielectric constant of the insulator film. To determine the PF mechanism in the MOS capacitors the experimental I–V data have also been presented in terms of ln(J/E) vs. E1/2 plot
Fig. 7. The ln(I) vs. E1/2 plot (Schottky emission) for a MOS capacitor with annealed TiO2 films.
confirm Schottky emission. The value of the slope is found to be 3.91 · 103 for the as-deposited samples and for annealed samples the slope is found to be 3.51 · 103. The dynamic permittivities of the TiO2 films, calculated from the slope of the SE plot, are 17.45 and 15.05 for the as deposited and annealed samples, respectively. The extracted Schottky barrier heights are 0.83 eV and 0.86 eV for the as-deposited and annealed samples respectively. Physically, the Poole–Frenkel effect is the thermal emission of charge carriers from Coulombic (i.e. charged) centers in the bulk of a dielectric or semiconductor, enhanced by the application of an elec-
Fig. 8. The ln(J/E) vs. E1/2 plot (Poole–Frenkel effect) for a MOS capacitor with as-deposited TiO2 films.
S. Chakraborty et al. / Microelectronic Engineering 81 (2005) 188–193
as shown in Fig. 8. The experimental data fit very well with the PF mechanism with the small trap barrier height of about 0.22 eV at moderate electric field (>1 MV/cm) only for the as-deposited samples. The annealed samples do not exhibit the PF effect.
4. Conclusions In conclusion, ultra-thin TiO2 films have been deposited at 150 C on strained-Si heterolayers by microwave PECVD using TTIP. Post deposition annealing was performed in N2 (99.999%) ambient at 400 C for 20 min. As-deposited films have been analyzed by XPS for chemical composition. Interfacial and electrical properties of the deposited films were characterized using capacitance–voltage and conductance–voltage techniques. The C–V characteristics exhibit the frequency dependence due to presence of interface traps. The leakage current is found to be dominated by the Schottky emission at a low electric field (<1 MV/cm) for both as-deposited and annealed samples, whereas Poole–Frenkel effect appears only for the as-deposited samples at moderate electric field (>1 MV/cm).
References [1] S. Takagi, J.L. Hoyt, J. Welser, J.F. Gibbons, J. Appl. Phys. 80 (1996) 1567–1577. [2] C.K. Maiti, N.B. Chakrabarti, S.K. Ray, Strained Silicon Heterostructures: Materials and Devices, IEE, UK, 2001. [3] Y.J. Mii, Y.H. Xie, E.A. Fitzgerald, D. Monroe, F.A. Thiel, B.E. Weir, L.C. Feldman, Appl. Phys. Lett. 59 (1991) 1611–1613.
193
[4] K. Ismail, M. Arafa, K.L. Saenger, J.O. Chu, B.S. Meyerson, Appl. Phys. Lett. 66 (1995) 1077–1079. [5] D.J. Paul, A. Ahmed, N. Griffin, M. Pepper, A.C. Churchill, D.J. Robbins, D.J. Wallis, Thin Solid Films 321 (1998) 181–185. [6] T. Vogelsang, K.R. Hofmann, Appl. Phys. Lett. 63 (1993) 186–188. [7] G. Abstreiter, H. Brugger, T. Wolf, Phys. Rev. Lett. 54 (1985) 2441–2444. [8] D.K. Nayak, S.K. Chun, Appl. Phys. Lett. 64 (1994) 2514– 2516. [9] C.K. Maiti, L.K. Bera, S. Chattopadhyay, Semicond. Sci. Technol. 13 (1998) 1225–1246. [10] K. Rim, S. Koester, M. Hargrove, J. Chu, P.M. Mooney, J. Ott, T. Kanarsky, P. Ronsheim, M. Ieong, A. Grill, H.S.P. Wong, IEEE VLSI Tech. Dig. (2001) 59–60. [11] D.K. Nayak, K. Goto, A. Yutani, J. Murota, Y. Shiraki, IEEE Trans. Electron Dev. 43 (1996) 1709–1716. [12] J. Wesler, J.L. Hoyt, J.F. Gibbons, IEEE Electron Dev. Lett. 15 (1994) 100–102. [13] K. Ismail, IEEE IEDM Tech. Dig. (1995) 509–512. [14] M. Gluck, T. Hackbarth, U. Konig, A. Haas, G. Hock, E. Kohn, Electron. Lett. 33 (1997) 335–337. [15] F.K. LeGoues, R. Rosenberg, T. Nguyen, F. Himpsel, B.S. Meyerson, J. Appl. Phys. 65 (1989) 1724–1728. [16] P.E. Hellberg, S.L. Zhang, F.M. DÕHeurle, C.S. Petersson, J. Appl. Phys. 82 (1997) 5773–5778. [17] S.A. Campbell, D.C. Gilmer, X.C. Wang, M.T. Hsieh, H.S. Kim, W.L. Gladfelter, J. Yan, IEEE Trans. Electron Dev. 44 (1997) 104–109. [18] H.S. Kim, D.C. Gilmer, S.A. Campbell, D.L. Polla, Appl. Phys. Lett. 69 (1996) 3860–3862. [19] C.D. Wagner, W.M. Riggs, L.E. Davis, J.F. Moulder, G.E. Muilenberg, Hand Book of X-ray Photoelectron Spectroscopy, Perkin-Elmer Corp, Minnesota, 1978. [20] R. Razouk, B. Deal, J. Electrochem. Soc. 126 (1979) 1573– 1581. [21] S.M. Sze, Physics of Semiconductor Devices, second ed., Wiley, New York, 1981. [22] W.A. Hill, C.C. Coleman, Solid-State Electron. 23 (1980) 987–993. [23] S.C. Sun, T.F. Chen, IEEE IEDM Tech. Dig. (1994) 333– 336. [24] J.G. Simmons, Phys. Rev. 155 (1967) 657–660.
Current conduction mechanism in TiO2 gate dielectrics S. Chakraborty b
a,*
, M.K. Bera a, S. Bhattacharya b, C.K. Maiti
a
a Department of Electronics and ECE, Indian Institute of Technology, Kharagpur 721302, India School of Electrical and Electronic Engineering, The QueenÕs University of Belfast, Belfast BT7 1NN, Nothern Ireland, United Kingdom
Available online 7 April 2005
Abstract Electrical properties of titanium oxide (TiO2) deposited on strained-Si heterolayers by plasma enhanced chemical vapor deposition (PECVD) from an organo-metallic precursor titanium isopropoxide (TTIP), have been investigated in Al/TiO2/strained-Si structures by capacitance–voltage (C–V) and current–voltage (I–V) measurements. For as-deposited layers, which exhibit high level of interface states and leakage current, both Poole–Frenkel (PF) and Schottky emission (SE) effects govern the conduction mechanism. After post deposition annealing in pure nitrogen ambient at 400 C, the conduction mechanism changes and the interface state density reduces by an order of magnitude. It is found that after annealing, only Schottky emission dominates the conduction mechanism at a low electric field. 2005 Elsevier B.V. All rights reserved. Keywords: Strained-Si; High-k; TiO2; Schottky emission; Poole–Frenkel effect
1. Introduction Strained-Si grown pseudomorphically on relaxed SiGe heterostructures is one of the promising candidates for expanding the Si complementary metal-oxide–semiconductor (CMOS) performance due to mobility enhancements in both electrons and holes [1,2]. Biaxial tensile strain in Si splits the sixfold degeneracy in the conduction band into a lower energy double degenerate valley and a higher energy fourfold degenerate valley. The *
Corresponding author. Fax: +91 3222 255303. E-mail address: [email protected] (S. Chakraborty).
resulting increased in-plane electron mobility, due to a decrease in the average effective electron mass and inter-valley carrier scattering, has been reported in literature [3–7]. Tensile strain in Si is also known to improve the in-plane hole mobility by splitting the degeneracy between the light and heavy holes [8–10]. These effects have been employed successfully to fabricate enhanced mobility metal-oxide–semiconductor field effect transistor (MOSFETs) [11,12] and modulation doped field effect transistors (MODFETs) [13,14] with strained-Si layers grown on relaxed SiGe layers. However, there are several material and process related issues to be understood and integration
0167-9317/$ - see front matter 2005 Elsevier B.V. All rights reserved. doi:10.1016/j.mee.2005.03.005
S. Chakraborty et al. / Microelectronic Engineering 81 (2005) 188–193
hurdles to be overcome to realize the benefits of strained Si CMOS technology. For instance, diffusion of Ge atoms from the SiGe buffer into the strained Si layer can occur when the heterostructure are subjected to high temperature thermal processing [15,16]. The presence of Ge in the strained Si channel region can degrade electrical performance of the device. The aggressive downscaling of MOS devices has also caused high field induced device degradation phenomena such as velocity saturation effect. A more reliable dielectric than conventional thermally grown Si dioxides is needed and is now a major concern for the ultralarge scale integration (ULSI) such as dynamic random access memories (DRAMs) and electrically erasable and programmable read-only memories (EEPROMs). Recently titanium oxide films are being studied intensively as one of the promising storage dielectrics for high-density DRAM applications due to its high permittivity and excellent step coverage [17,18]. In this work, we focus on the effects of the post deposition annealing of MOS capacitors in N2 ambient on the electrical properties of titanium oxide (TiO2) films deposited on strained-Si heterolayers and the current conduction mechanism in these structures. The improvement of the interface properties after annealing was verified by the observed reduction of the interface states at midgap. It is found that trap assisted Poole–Frenkel conduction mechanism disappears after annealing.
2. Experimental Strained-Si layers on relaxed SiGe grown using ultra-high-vacuum (UHV) compatible low pressure chemical vapor deposition (LPCVD) system, chemically etched in H2O2:H2SO4 solution, followed by a dip in 1% HF solution to remove the native oxide layer, were used as the substrates. The metal organic compounds have been widely used as source materials for the deposition of metal oxides on semiconducting substrates due to their good stability and compatibility with semiconductor processing technology. Titanium isopropoxide (TTIP) [Ti(OC3H7)4] was used as source material for deposition of TiO2 films. TTIP
189
was vaporized from a bubbler kept at 45 C and was carried to the quartz process/deposition chamber of the microwave (700 W, 2.45 GHz) cavity discharge system through a gas line. The process chamber was maintained at a pressure of 500 mTorr. The temperature in the chamber was 150 C during deposition. The film thickness was ˚) measured using a single wavelength (6328 A ellipsometer (model: Gaertner L-117). The thick˚ ness of the TiO2 film was found to be 110 A ˚ ). (EOT 22.7 A X-ray photoelectron spectroscopy (XPS) was used to analyze the composition and chemical states in TiO2 film and its interface with strainedSi. XPS study was carried out using model ESCALAB MKII (VG Microtech). For the electrical measurements, MOS capacitors were fabricated on TiO2 films by evaporating circular A1 dots (with an area of 1.96 · 103 cm2) through a shadow mask. Post deposition annealing was performed in N2 (99.999%) ambient at 400 C for 20 min. The capacitance–voltage (C–V) and current–voltage (I–V) characteristics were measured using HP-4061A semiconductor component test system.
3. Results and discussion Fig. 1 shows the schematic cross-section of the MOS capacitor test structure and the associated band diagram of the heterostructure without any bias. The chemical bonding configuration of the TiO2 films on strained-Si films were analyzed by XPS studies using a non-monochromatized MgKa (hm = 1253.6 eV) radiation at an angle 30 between the analyzer axis and the sample normal and the corresponding analyzer energy was 50 eV. The base pressure of the analysis chamber was kept at 2 · 1010 Torr. All the binding energies were corrected for sample charging effect with reference to the C 1s line around at 285.0 eV. Fig. 2 shows the Ti 2p XPS spectrum of the as deposited TiO2 films. The Ti 2p signal is associated with two peaks located at 458.1 eV and 463.7 eV (energy separation of 5.6 eV) which are representative for Ti 2p3/2 to Ti 2p1/2 spin orbital splitting. This is a typical characteristic of binding energy of Ti in stoichiometric TiO2 [19].
190
S. Chakraborty et al. / Microelectronic Engineering 81 (2005) 188–193
Fig. 1. Schematic cross section of the MOS structure on strained-Si/SiGe and associated energy band diagram.
Fig. 2. XPS spectra of as-deposited TiO2 films on strained-Si. XPS was performed at an angle 30 between the analyzer axis and the sample normal.
Fig. 3 shows frequency dispersion in C–V characteristics of MOS test structure before post deposition annealing. Dispersion is observed at the depletion and the accumulation region, although such effects are negligible at inversion region. This type of C–V characteristic is typical of MOS systems having oxide charges at the interface and in the insulator. The C–V characteristics were found to be stretched along the voltage axis. The stretchout produces a nonparallel shift of the C–V curve. This is due to the presence of both donor and
Fig. 3. Frequency dispersion in C–V characteristics of MOS capacitor before annealing.
acceptor like interface traps occupying a portion of the semiconductor bandgap [20]. At the interface, slower states are able to respond only at lower frequencies. At higher frequencies these slow states cannot respond to the applied ac signal and they remain charged and thus more positive (for n-type) voltages are required in order to achieve accumulation [21]. As the frequency increases, the stretch-out effect increases accordingly, and at the highest frequency (1 MHz) the high density of interface states delays the MOS structure to reach accumulation. The C–V characteristics after post deposition annealing are shown in Fig. 4. It is seen that the frequency dispersion at the depletion region is reduced to some extent and also the voltage stretch-out effect. This indicates that the number of traps at the interface decrease after post deposition annealing. Fixed oxide charge is a property of the dielectric material and does not contribute to charge interaction between the dielectric and substrate whereas interface traps are considered to be in rapid electrical communication with the underlying substrate. The interface trap density (Dit) is determined from the combination of a single frequency capacitance–voltage (C–V) and conductance–voltage (G–V) characteristics using HillÕs method [22]. The expressions for the interface trap density and fixed oxide charge density (Qf/q) are given by
S. Chakraborty et al. / Microelectronic Engineering 81 (2005) 188–193
Fig. 4. Frequency dispersion in C–V characteristics of MOS capacitor after post deposition annealing.
ð2=qAÞðGmax =xÞ i Dit ¼ h ðGmax =xC ox Þ2 þ ð1 C m =C ox Þ2
ð1Þ
and Qf C ox ¼ ðUms UF V FB Þ q Aq
ð2Þ
where, Ums is the metal–semiconductor work function, UF is the Fermi potential and Gmax is the maximum conductance in G–V characteristics with its corresponding capacitance Cm, Cox is the oxide capacitance, x is the angular frequency and A is the area of the capacitor. The extracted values of Dit are 1.19 · 1012 eV1 cm2 and 3.36 · 1011 eV1 cm2 for as-deposited and annealed samples, and the fixed oxide charge densities are 5.07 · 1012 cm2 and 4.01 · 1012 cm2, respectively. The higher interface state density for the as-deposited TiO2 sample is due to the out-diffusion of Ge from the buffer layer. Fig. 5 shows the I–V characteristics of a MOS capacitor biased in accumulation before and after post deposition annealing. It is seen that the leakage current reduces by an order of magnitude after annealing in N2 ambient. The physical origin of this leakage current reduction in N2 ambient is due to the incorporation of the N2 in the TiO2 film, which also help to densify the film and reduce the bulk and interface defect densities [23]. Two main conduction mechanisms were invoked to explain the current transport in TiO2 thin films, i.e., Scho-
191
Fig. 5. Current–voltage characteristics of MOS capacitors with TiO2 films on strained-Si layer before and after post deposition annealing.
ttky emission (SE) and Poole–Frenkel (PF) effects. The SE is a process occurring across the interface between a semiconductor (or metal) and an insulating film as a result of barrier lowering due to the applied field and the image force. The PF is associated with the field enhanced thermal excitation of charge carriers from traps. Generally, the SE conduction process is an electrode-limited conductivity that depends strongly on the barrier between the metal and insulator and has the inclination to occur for insulators with fewer defects. The current governed by the SE mechanism is expressed as pffiffiffiffi 1 qU bSE E ; I SE ¼ AT 2 exp ð3Þ kT where A is a constant, U is the Schottky barrier height, q is the electronic charge, k is the BoltzmannÕs constant and E is the electric field. The constant bSE is given by sffiffiffiffiffiffiffiffiffiffiffiffi q3 ð4Þ bSE ¼ 4pe0 er where er is the dielectric constant of the insulator, e0 is the permittivity of the free space. Schottky-emission for both as-deposited and annealed samples have been illustrated in terms of ln(I) vs. E1/2 plot from the experimental I–V data and are shown in Figs. 6 and 7, respectively. The straight-line characteristics at relatively low electric field (<1 MV/cm)
192
S. Chakraborty et al. / Microelectronic Engineering 81 (2005) 188–193
tric field. Electron emission is primarily controlled by the electric field, which effectively reduces the barrier height on one side of the trap, thus increasing the probability of the electron escaping from the trap. Therefore, the PF effect is a bulk-limited conduction process that relies critically upon the contribution of a considerable amount of traps existing in the bulk of the insulator. The expression for the PF current density is given by pffiffiffiffi 1 qU bPF E ; ð5Þ J ¼ CE exp nkT
Fig. 6. The ln(I) vs. E1/2 plot (Schottky emission) for a MOS capacitor with as-deposited TiO2 films.
where qU is the ionization potential in eV, which is the amount of energy required for the trapped electron to overcome the influence of the pffiffiffitrapping ffi centre when no field is applied, bPF E is the amount by which trap barrier height is reduced by the applied electric field E, C is the proportionality constant and k is the Boltzmann constant. The coefficient n is introduced in order to consider the influence of the trapping or acceptor centers (1 < n < 2) [24]. The PF constant, bPF, is given by sffiffiffiffiffiffiffiffiffiffi q3 ; ð6Þ bPF ¼ pe0 er where e0 is the permittivity of the free space and er is the dynamic dielectric constant of the insulator film. To determine the PF mechanism in the MOS capacitors the experimental I–V data have also been presented in terms of ln(J/E) vs. E1/2 plot
Fig. 7. The ln(I) vs. E1/2 plot (Schottky emission) for a MOS capacitor with annealed TiO2 films.
confirm Schottky emission. The value of the slope is found to be 3.91 · 103 for the as-deposited samples and for annealed samples the slope is found to be 3.51 · 103. The dynamic permittivities of the TiO2 films, calculated from the slope of the SE plot, are 17.45 and 15.05 for the as deposited and annealed samples, respectively. The extracted Schottky barrier heights are 0.83 eV and 0.86 eV for the as-deposited and annealed samples respectively. Physically, the Poole–Frenkel effect is the thermal emission of charge carriers from Coulombic (i.e. charged) centers in the bulk of a dielectric or semiconductor, enhanced by the application of an elec-
Fig. 8. The ln(J/E) vs. E1/2 plot (Poole–Frenkel effect) for a MOS capacitor with as-deposited TiO2 films.
S. Chakraborty et al. / Microelectronic Engineering 81 (2005) 188–193
as shown in Fig. 8. The experimental data fit very well with the PF mechanism with the small trap barrier height of about 0.22 eV at moderate electric field (>1 MV/cm) only for the as-deposited samples. The annealed samples do not exhibit the PF effect.
4. Conclusions In conclusion, ultra-thin TiO2 films have been deposited at 150 C on strained-Si heterolayers by microwave PECVD using TTIP. Post deposition annealing was performed in N2 (99.999%) ambient at 400 C for 20 min. As-deposited films have been analyzed by XPS for chemical composition. Interfacial and electrical properties of the deposited films were characterized using capacitance–voltage and conductance–voltage techniques. The C–V characteristics exhibit the frequency dependence due to presence of interface traps. The leakage current is found to be dominated by the Schottky emission at a low electric field (<1 MV/cm) for both as-deposited and annealed samples, whereas Poole–Frenkel effect appears only for the as-deposited samples at moderate electric field (>1 MV/cm).
References [1] S. Takagi, J.L. Hoyt, J. Welser, J.F. Gibbons, J. Appl. Phys. 80 (1996) 1567–1577. [2] C.K. Maiti, N.B. Chakrabarti, S.K. Ray, Strained Silicon Heterostructures: Materials and Devices, IEE, UK, 2001. [3] Y.J. Mii, Y.H. Xie, E.A. Fitzgerald, D. Monroe, F.A. Thiel, B.E. Weir, L.C. Feldman, Appl. Phys. Lett. 59 (1991) 1611–1613.
193
[4] K. Ismail, M. Arafa, K.L. Saenger, J.O. Chu, B.S. Meyerson, Appl. Phys. Lett. 66 (1995) 1077–1079. [5] D.J. Paul, A. Ahmed, N. Griffin, M. Pepper, A.C. Churchill, D.J. Robbins, D.J. Wallis, Thin Solid Films 321 (1998) 181–185. [6] T. Vogelsang, K.R. Hofmann, Appl. Phys. Lett. 63 (1993) 186–188. [7] G. Abstreiter, H. Brugger, T. Wolf, Phys. Rev. Lett. 54 (1985) 2441–2444. [8] D.K. Nayak, S.K. Chun, Appl. Phys. Lett. 64 (1994) 2514– 2516. [9] C.K. Maiti, L.K. Bera, S. Chattopadhyay, Semicond. Sci. Technol. 13 (1998) 1225–1246. [10] K. Rim, S. Koester, M. Hargrove, J. Chu, P.M. Mooney, J. Ott, T. Kanarsky, P. Ronsheim, M. Ieong, A. Grill, H.S.P. Wong, IEEE VLSI Tech. Dig. (2001) 59–60. [11] D.K. Nayak, K. Goto, A. Yutani, J. Murota, Y. Shiraki, IEEE Trans. Electron Dev. 43 (1996) 1709–1716. [12] J. Wesler, J.L. Hoyt, J.F. Gibbons, IEEE Electron Dev. Lett. 15 (1994) 100–102. [13] K. Ismail, IEEE IEDM Tech. Dig. (1995) 509–512. [14] M. Gluck, T. Hackbarth, U. Konig, A. Haas, G. Hock, E. Kohn, Electron. Lett. 33 (1997) 335–337. [15] F.K. LeGoues, R. Rosenberg, T. Nguyen, F. Himpsel, B.S. Meyerson, J. Appl. Phys. 65 (1989) 1724–1728. [16] P.E. Hellberg, S.L. Zhang, F.M. DÕHeurle, C.S. Petersson, J. Appl. Phys. 82 (1997) 5773–5778. [17] S.A. Campbell, D.C. Gilmer, X.C. Wang, M.T. Hsieh, H.S. Kim, W.L. Gladfelter, J. Yan, IEEE Trans. Electron Dev. 44 (1997) 104–109. [18] H.S. Kim, D.C. Gilmer, S.A. Campbell, D.L. Polla, Appl. Phys. Lett. 69 (1996) 3860–3862. [19] C.D. Wagner, W.M. Riggs, L.E. Davis, J.F. Moulder, G.E. Muilenberg, Hand Book of X-ray Photoelectron Spectroscopy, Perkin-Elmer Corp, Minnesota, 1978. [20] R. Razouk, B. Deal, J. Electrochem. Soc. 126 (1979) 1573– 1581. [21] S.M. Sze, Physics of Semiconductor Devices, second ed., Wiley, New York, 1981. [22] W.A. Hill, C.C. Coleman, Solid-State Electron. 23 (1980) 987–993. [23] S.C. Sun, T.F. Chen, IEEE IEDM Tech. Dig. (1994) 333– 336. [24] J.G. Simmons, Phys. Rev. 155 (1967) 657–660.