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Electronics for single photon avalanche diode arrays
Sensors and Actuators A 140 (2007) 113–122
Electronics for single photon avalanche diode arrays S. Tisa ∗ , F. Zappa, A. Tosi, S. Cova Politecnico di Milano, Dip. Elettronica e Informazione, p. Leonardo da Vinci 32, 20133 Milano, Italy Received 4 August 2006; received in revised form 20 June 2007; accepted 20 June 2007 Available online 26 June 2007
Abstract This is the second of two serial papers dealing with single photon avalanche diode (SPAD) topics. Aim of the series is to discuss in depth the features and device structures of the array chip we developed (in the first paper) and the required fast electronics and the overall performance reached in passive, active, and gated regime (in this second paper). Main motif of the two papers is to present a compact system for 2D counting and time-tagging of single photons, based on a monolithic array sensor of 60 pixels, the single photon avalanche diode array (SPADA). In this second paper we review the electronics needed to actively quench and actively reset each pixel after avalanche ignition, namely the active-quenching circuit (AQC), since the features of such quenching electronics dramatically affect the operating conditions of the array detector and its actual performance. Design criteria, performances and technological process for manufacturing integrated AQCs will be thoroughly discussed. © 2007 Elsevier B.V. All rights reserved. Keywords: Single photon avalanche diode (SPAD); Active-quenching circuit (AQC)
1. Principles and problems In Ref. [1], we showed that once a single photon avalanche diode (SPAD) is biased above breakdown, VB , and gets triggered, current keeps flowing until the avalanche process is quenched by lowering the bias voltage down to VB or below. After a dead-time, the operative voltage must be restored in order to make the SPAD able to detect another photon. This operation requires a suitable electronics with the following tasks: (i) it senses the leading edge of the avalanche current; (ii) it generates a standard output pulse, synchronous with the current onset; (iii) it quenches the avalanche by lowering the bias below the breakdown voltage; (iv) it restores the photodiode voltage to the operating level. This circuit is usually referred to as quenching circuit. The most commonly used circuit in the first studies on Geiger-mode avalanche photodiodes is the passive-quenching circuit (Fig. 1, left): the avalanche current self-quenches simply by developing a voltage drop on a high-value impedance load (RL > 100 k). Such circuit is very simple and can be easily employed, but sets severe limitations to the maximum admissible photon counting rate and to the detector performance in general [2]. In fact, it was the introduction of the active-quenching ∗
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circuit (AQC) concept by Cova [3–5] that opened the way to practical application of SPADs. Many AQC types have then been reported, with circuit structure and mounting that evolved from standard NIM cards [4,6] to small SMT boards suitable for compact detection modules [7,8]. In recent years, work towards monolithic integration of AQCs was started in our laboratory. First, the core structure of the AQC was integrated [9], then we designed, fabricated, and tested the first fully integrated iAQC [10], under US and European patent [11]. 1.1. Passive-quenching circuits The passive-quenching circuit (PQC) is shown in Fig. 1 together with its equivalent circuit: the SPAD is reverse biased through a high-value ballast resistor RL of 100 k or more. RS is a small sensing resistor, typically 50 , which converts the fast current signal into a voltage signal that drives the comparator applied at node 2. CD is the junction capacitance (typically ∼1 pF) and CP is the stray capacitance to ground (typically few picofarads). The role of the stray capacitance from anode to ground is negligible, due to the low-impedance RS connection. The diode resistance RD is given by the sum of the space-charge resistance and the ohmic resistance of neutral regions crossed by the avalanche current. It depends on the device structure and can be around 400 for thick SPADs with wide area (200 mdiameter or more), or from few hundreds ohms up to some k for
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Fig. 1. Passive-quenching circuit (left side) and equivalent circuit (right side). The diode equivalent circuit is depicted inside the dotted square.
thin SPADs with relatively small active area (from 10 to 50 m diameter). VB is the breakdown voltage and VA the bias voltage. When no current is flowing, the diode current ID is zero and the diode bias voltage VD is equal to VA (reverse bias), as shown in Fig. 2. Avalanche triggering (fired by a photon absorption or by a thermal generation) corresponds to closing the switch of the diode equivalent circuit in Fig. 1. In few picoseconds, the current reaches the peak value, before the diode voltage has changed: the bias point moves from VA to the m point in Fig. 2 almost along a straight line, due to the CD capacitance. Then, the high current flowing through the diode discharges the capacitors and ID and VD decrease exponentially to the steady-state condition (n point). After triggering, the current flowing in the photodiode as a function of time is given by ID (t) =
VD (t) − VB VEX (t) = RD RD
(1)
where VEX (t) is the excess bias above breakdown at which the SPAD is biased. Fig. 3 shows typical ID and VD waveforms. The asymptotic steady-state values of SPAD current, If , and voltage, Vf , and the peak value of the avalanche current ID (0+) can be easily calculated by solving the equivalent circuit in Fig. 2, with the boundary conditions that at t = 0 capacitor CD is charged to
Fig. 3. Waveforms of the diode voltage VD (top) and current ID (bottom) after the triggering of an avalanche.
VA and at t = ∞ both capacitors are open circuits [2]: ID (0+ ) =
VA − VB , RD
VA − V B VEX ≈ , RD + R L RL
Vf = VB + RD If
(2)
The approximation is justified since usually RL RD . The quenching time constant τ q is set by the total capacitance CD + CP and by the parallel of RD and RL (practically limited by RD ) τq = (CD + CP )RL RD ≈ (CD + CP )RD
(3)
At low If , Vf is very near to VB (see Fig. 3). When the decaying voltage VD (t) approaches VB , the intensity of ID (t) becomes low and the number of carriers that cross the avalanche region is consequently small. Since the avalanche process is statistical, it can happen that none of the carriers crossing the high field region impact ionize. The probability of zero-multiplied carriers becomes significant when the diode current ID falls below about 100 A, and rapidly increases as ID further decreases [12]. Therefore we can say that avalanche process is self-sustaining if the current level is above a threshold value Iq ∼ 100 A, otherwise the process self-quenches. The Iq value is not sharply defined, hence the quenching time shows a remarkable jitter with respect to the avalanche onset. When the diode self-quenches, the switch in Fig. 1 opens and the two capacitors slowly recharge to VA , with an exponential recovery transition with time constant τr ≈ (CD + CP )RL
Fig. 2. SPAD I–V characteristic with the load curve of a passive-quenching circuit.
If =
(4)
Now, the transition is slow because the time constant is dominated by RL , which is very high; with RD = 1 k, RL = 100 k, CP = 1 pF and CD = 9 pF we obtain τ q = 10 ns while τ r = 1 s. The step-like voltage signal at the sense resistor is a scaled replica of the current through the SPAD, because during the fast transient the capacitor CP behaves as a short-circuit and current
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Fig. 4. Left side: diode current (a) and voltage (b) waveforms of a SPAD biased with a PQC; observe the retriggering of the SPAD during the recovery transition and the correlated avalanche current pulses. Right side: comparison of diode current pulses occurred during the recovery transition and corresponding time-jitter in evaluating the photon-detection time.
flows through RS . The peak value is Vpeak =
CP VEX RS RD CP + C D
(5)
In order to have a significant voltage pulse on RS , the stray capacitance CP must be comparable to or greater than the diode capacitance CD . Otherwise only a small fraction of avalanche current would flow through RS (the one discharging CP ), whereas the current discharging CD flows through the internal loop within the SPAD (see Fig. 1). With RS = 50 the voltage signal ranges from tens to hundreds of millivolts. Finally, an important parameter is the total charge Qpc in the avalanche pulse, related to asymptotic current If and recovery time constant τ r as Qpc = (VA − Vf )(CD + CP ) ≈ VEX (CD + CP ) ≈ If τr
(6)
This charge must be minimized, in order to reduce charge trapping and the related afterpulsing discussed in Ref. [1]. 1.2. Recovery transition in passive-quenching Once the avalanche current is quenched, the diode slowly recovers toward the quiescence bias voltage with a time constant τ r , so that it takes ∼5τ r to recover to the correct excess bias within 1%. Given the typical values of the load resistor and the capacitances, τ r is in the microsecond range (5 s with the values given before). During recovery, the diode voltage VD (t) rises above VB . A photon that arrives during the very first part of recovery is almost certainly lost, since the avalanche triggering probability is almost negligible. Instead, subsequent photons have a progressively higher probability to trigger the SPAD. Unfortunately, SPAD triggering during recovery transition has mainly two deleterious effects due to the time-varying excess bias that rules voltage and current peaks (see Eqs. (2) and (5)). 1. Pulses having an amplitude lower than the threshold of the comparator are not sensed (see Fig. 4, left). Significant count losses are expected at higher counting rates. As a matter of fact, after each ignition, the detector has a dead-time which is not well-defined, because, when the avalanche is fired during the recovery transition its duration depends on the
triggering conditions. As a consequence, in order to have an accuracy better that 1% in photon counting measurements, the total counting rate must not exceed few tens of kcounts/s [2]. 2. Time resolution is severely degraded for two reasons. First of all, the intrinsic time resolution of the SPAD is impaired when excess bias is reduced [2]. Second, additional jitter is introduced because pulses with different amplitudes cross the comparator threshold at different times, as depicted on the right side of Fig. 4. With a pulse rise-time of about 1 ns, a 10% fluctuation in excess bias causes a jitter of about 100 ps in threshold crossing. Constant-fraction trigger circuits could be employed, but would be only partially effective since the shape of the output current pulse varies in amplitude and also in shape: the current rise-time becomes progressively faster as the excess bias progressively increases toward the quiescence value VEX = VA − VB . As can be experimentally verified [2], such effect gets worst at high counting rates. Setting a limit of 5% to the probability that a photon arrives during the recovery time, typical values of the maximum exploitable counting rate are about few kcounts/s, as can be calculated, e.g. in Ref. [2]. Of course by increasing the speed of the recovery time, SPAD performances in PQC improve. This can be obtained by minimizing the values of ballast resistor RL and stray capacitance CS . However RL cannot be strongly reduced because If must remain lower enough than the latching current Iq . Anyway it can be calculated that even in the most favorable cases (CS and CD < 1 pF and RL = 50–100 k), accurate photon timing and counting cannot be achieved in passive-quenching if ntot is higher than 50/200 kcounts/s, respectively [2]. 2. Active-quenching circuits In order to avoid the highlighted drawbacks of PQC and fully exploit the intrinsic performance of SPADs, a new approach was devised by Cova [3–5]. The basic idea was to sense the rise of the avalanche pulse and react back on the SPAD, by forcing the quenching and reset transitions in short (few nanoseconds) times, with a controlled bias-voltage source. This approach
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Fig. 5. Block diagram of the active-quenching circuit developed in Ref. [3].
was called active-quenching circuit (AQC) and soon became a widespread standard in scientific literature. A schematic diagram of an AQC is shown in Fig. 5 [3]. When the SPAD is quiescent and no current is flowing, its cathode is biased by the AQC to ground, by means of the low-impedance driver. The fast onset of the avalanche current is sensed by a fast comparator, which triggers the monostable and drives the output stage. The comparator triggers also a driving stage that applies a quenching pulse of V, synchronous with the avalanche triggering and with very low jitter. In order to quench the avalanche, V must be high enough to reduce the diode voltage below VB . The detector is then kept off for a well-controlled hold-off time (THO ), at the end of which the driver swiftly restores the SPAD bias voltage to the operating level in order to be ready to detect another photon. During the reset transition, since spurious couplings and reflections could retrigger the comparator, it can be latched off by the monostable for the whole reset duration. The advantages of active-quenching are the following. 1. The avalanche current intensity is kept constant due to the low-impedance of the driver biasing the detector. 2. The duration of the avalanche current pulse is constant and depends on the time taken by the avalanche signal to travel from the SPAD to the AQC, forth and back, and on the slope of the driver quenching pulse. By reducing this loop time, power dissipation (sensitive for thick SPADs) is limited, hence the breakdown voltage shift, and also afterpulsing, since the number of trapped carriers is linearly proportional to the avalanche pulse duration. 3. The hold-off time is easily adjustable by means of the monostable. 4. Both quenching and reset transitions are fast (tens of nanoseconds), thus minimizing the probability of non-standard avalanche triggering during the recovery transition. 5. Thanks to the low input impedance, all SPAD ignitions are sensed by the fast comparator, with no count-loss. Despite this simple working principle, design of such AQC is not an easy task: many problems are encountered and strict requirements must be set for fully exploiting SPAD performances [2]. A major problem is the high difference between
the avalanche pulse sensed by the comparator (usually lower than 1 mA, i.e. lower than 50 mV on a 50 resistance) and the quenching pulse, that can be as high as 20 V (i.e. 400 times stronger). In those conditions the comparator could be retriggered by reflections of the quenching pulse and the AQC would start oscillating (as if an avalanche was detected at the end of every reset transition). Moreover, in order to reduce power dissipation and afterpulsing, quenching time duration must be minimized. Problems arise when the SPAD must be remotely driven and the detector is far from the AQC, for instance when the SPAD is inside a cryostat or a microscope. As in PQCs, even AQCs are characterized by a dead-time after each triggering event, during which subsequent incoming photons cannot be detected. Nevertheless AQC’s dead-time is well-defined and constant, since it is the sum of the avalanche pulse duration, the hold-off time, and (usually negligible) quenching and reset transitions: it is now possible to use the well-known correction methods developed for counting pulses from nuclear radiation detectors [2]. Moreover, since the holdoff time is adjustable, a suitable length can be selected according to application requirements. Setting the dead-time to the minimum value of few tens of nanoseconds (with almost negligible hold-off duration), it is possible to reach photon-counting rates up to tens of Mcounts/s. Instead, if afterpulsing effects must be reduced, the hold-off time can be increased to the extent necessary for the majority of trapped carriers be released during hold-off. Usually 400 ns are quite enough for silicon detectors, even if at low temperatures longer dead-times are needed, since trapped carriers are released with longer delays [13]. 2.1. Mixed passive–active-quenching circuit Another AQC approach was studied in our labs, namely a mixed passive–active-quenching [7,9]. This approach is particularly useful for minimizing the charge in the avalanche pulse, particularly for SPADs having small stray capacitance and small series resistance. A passive load RL provides a prompt passive quasi-quenching of the avalanche current. Then an active loop completes the task by forcing the SPAD voltage well below the nominal VB . After a controlled hold-off time, the active loop applies a fast reset transition. By minimizing the pulse charge, trapping and power dissipation are reduced. Also optical crosstalk [1] is limited since a shorter avalanche current duration shrink hot-carrier photo-emission probability. Furthermore, this mixed approach gives flexibility in the choice of the passive load, since passive quasi-quenching action is anyhow confirmed by an active intervention. Therefore RL can be chosen smaller than the minimum required for complete passive-quenching, thus increasing the speed of the circuit in detecting SPAD ignitions. Fig. 6 shows the block diagram of the first mixed passive–active-quenching [7]. During quiescence, no current flows through the resistors, the comparator input node (IN) is at ground, the reset and quenching switches are open and SPAD is reverse biased at Vpol . As soon as an avalanche is fired, the current flows through the resistors and the voltage drop across the sense resistor RS triggers the comparator. The load resistor RL for the quasi-quenching is in the range of some tens of k.
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well-controlled length of time and then the active reset quickly restores the potential to the ground level. In applications where photons of interest occur only at short and well-defined time intervals, such as laser ranging of satellites or laser-induced fluorescence, gated-detector operation can be provided. When the Gate enable is on, the SPAD operates in free-running as described above; when the Gate enable is off, the quenching switch is kept closed, the SPAD is held off and no photon can be detected. 3. Fully integrated iAQC Fig. 6. Block diagram of the mixed passive–active-quenching approach.
The signal at the comparator input is a smaller replica of the avalanche voltage signal shown in Fig. 3 instead of the fast current pulse, because the sense resistor is not at the ground lead of the photo-detector [2]. The reduction factor is given by the partition RS /RL . Since the minimum achievable comparator threshold is about 15 mV, RS cannot be too low: assuming RL = 200 k and a 2 V-excess bias, RS must be at least 2 k. The output of the comparator is sent to the control logic which generates an output TTL pulse synchronous to the triggering and closes the quenching switch, thus lowering the cathode potential to −Vquench (active-quenching confirmation). The SPAD bias voltage is now |Vpol − Vquench | and it must be lower than VB , in order to definitely quench the avalanche. In other words, since the quenching pulse is equal to Vquench , the maximum excess bias applicable to the SPAD is Vquench . After a well-defined hold-off time the quenching switch is opened and the reset switch is closed. The SPAD cathode voltage is hence restored to ground in few nanoseconds. The reset switch is subsequently opened and the SPAD is ready to detect another photon. Fig. 7 shows the typical cathode waveform: during quiescence the cathode potential is at ground level; the photon absorption triggers the avalanche and the cathode experience the passive-quenching exponential decrease, which is swiftly confirmed by the fast (nanoseconds) active-quenching, lowering the cathode potential to −Vquench . The diode is then held-off for a
Fig. 7. Typical cathode waveform in a mixed passive active-quenching circuit.
In order to reduce stray capacitances, thus improving timing performances, and strongly reducing SPAD power dissipation, we designed and fabricated the first fully integrated activequenching circuit (iAQC) [10]. The circuit was the first ever reported in literature and is under European and US patent [11]. Then we further enhanced the chip, through a more flexible highvoltage CMOS technology and a redesign of key portions of the circuits. Our main goal was to minimize the duration of the avalanche current through the SPAD, because of the three well-know detrimental effects that increase proportionally to the total charge in the avalanche current pulse: afterpulsing, energy dissipation, emissions of secondary photons by hotcarriers. Moreover we wanted to shorten the reset transition for reducing the chance of having ignitions whilst the SPAD is in non-standard conditions, for improving timing and detection efficiency uniformities even at high counting rates. Chip dimensions of 1 mm × 1 mm enable the integration of more iAQCs into monolithic multi pixel arrays. The iAQC operates with excess bias up to 25 V and with a dead time as short as 30 ns, leading to a saturated counting rate of 33 Mcounts/s. Both free-running and gated (as short as few tens of nanoseconds) operation are possible, and power dissipation is below 70 mW, even at the highest counting rates. 3.1. Working principle The circuit was designed to operate with any SPAD, both thin and thick ones, with high breakdown voltage (exceeding 400 V) and large avalanche currents (exceeding 30 mA). The high-voltage 0.8 m CMOS technology has two metal layers and one high resistive poly. As shown in Fig. 8, a high-value
Fig. 8. Block diagram of the integrated active-quenching circuit (iAQC).
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ballast resistor RB (75 k) is included in the SPAD bias network for providing a prompt passive-quenching action, to be quickly followed and confirmed by the active-quenching. The SPAD is biased between a positive Vhigh and a negative Vlow . For proper operation, |Vlow | is slightly smaller than VB , typically |Vlow | ≈ VB –1 V and |Vhigh − Vlow | is greater than VB by the amount of the required excess bias above breakdown. In such conditions, the iAQC can quench the avalanche just by pulling the IN node down to ground. When the avalanche current is triggered, it develops a voltage drop across RB and the passive-quenching promptly starts. A fast sensing stage, whose sensitivity can be adjusted via the threshold pin, detects the current onset and confirms the SPAD quenching by lowering the IN potential down to ground by means of the switch Squench . The sensing stage triggering propagates through the delay block, which is responsible for the hold-off time duration, externally adjustable via the width control pin. It is also connected to the output stage, that generates a standard TTL output, synchronous with the beginning of the active-quenching, that can be used either for counting the event (photon-counting), or for measuring the photon arrival time with low time jitter (photon-timing). When hold-off expires, the delayed pulse reaches the reset control stage: Sfeedback and Squench switches are then turned off while Sreset is turned on. The IN node rises towards Vhigh and Sreset is maintained on by the reset control network until VIN almost reaches Vhigh . The reset duration is thus automatically adjusted in order to accomplish a full reset with any SPAD and in every working conditions, with no need of any external adjustment. Then Sreset is turned off and Sfeedback on, thus enabling the chip for the detection of the next SPAD ignition.
Fig. 9. Network implementing the Gate function with no undesired output pulse.
a threshold value, usually in the range of some tens of A, at which the avalanche stops. If otherwise, the cathode voltage does not drop below this threshold, the avalanche process is not interrupted, and the SPAD is not able to detect subsequent photons. The failing of the iAQC to quench the diode is a clear circuit fault, that can lead also to the damaging of the detector, especially if it has a breakdown voltage of some hundreds of volts, as in the case of thick SPADs, since power dissipation can become a serious problem [1]. For this reason, a new SPAD model, that could help in detecting this faulty behavior during the early design and simulation of the iAQC, was devised. The model used for the design of previous iAQC, reported in Fig. 10, is not able to detect a quenching failure, since the interruption of the avalanche current is synchronous with the falling edge of the signal photon applied to the MOSFET, which represents the detection of a photon and the avalanche ignition. This implies that the quenching of the detector is not a consequence of the iAQC behavior, but it is caused exclusively by the simulation stimulus photon. Furthermore, this model brings some other complications during the simulation phase. Let us explain it with a numerical example. Suppose to power the iAQC
3.2. Gate function Many applications require that the single photon detector is operated in the so called gated-mode, where the detector is active only during an externally defined time-slot. In gated mode operation, photon detection is inhibited when the external signal Gate is off, and permitted elsewhere. This task could be accomplished by simply masking the output of the iAQC via the Gate signal. However for several reasons a better solution is to keep the SPAD below breakdown voltage when gated-off, and at the desired excess bias when gated-on. This avoids the occurring of avalanches during the non-observation window, thus reducing power dissipation and ensuring that the detector will be ready for the arrival of a photon as soon as Gate is enabled. A suitable implementation requires that the Gate signal first triggers a forced quenching of the SPAD, by way of a small NMOS transistor, that inhibits the propagation of the Sense signal to the reset stage, as shown in Fig. 9. The output monostable delays the Sense signal, in order not to have an Out pulse at every gate-off transition. 3.3. SPAD model for iAQC simulations As explained in Ref.[1], the diode quenching occurs when the cathode voltage is so low that the SPAD current drops below
Fig. 10. SPAD model used for the simulation of previous iAQC circuits.
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Fig. 11. New SPAD model used for the iAQC simulation.
with Vhigh = 15 V and to use a SPAD with a breakdown voltage Vb = 30 V. Then choose Vlow = −20 V, in order to have an excess voltage VEX = + 15 V–(−20 V)–30 V = 5 V. During quenching, the cathode voltage moves from Vhigh = 15 V toward ground, and when the cathode reaches 10 V the SPAD goes off. If we have chosen a different excess voltage, for instance 10 V, the cathode voltage would have to reach 5 V to quench the diode, and this would require a longer time. Hence, for different excess voltages, an accurate simulation should account for the different quenching time, which means that the duration of the signal “photon” has to be manually trimmed, depending on the biasing conditions and diode parasites. All these issues are resolved with the new model reported in Fig. 11. The three voltage controlled switches (S1 , S2 , S3 ) together with C1 , V1 and Rth build the network for the automatic detector quenching. Switches S1 and S3 close when the voltage applied to their input is higher than 100 mV, whereas S2 is normally open, and closes only when the voltage at its input is around a threshold Sth,2 . Let us consider the SPAD off, and suppose to apply a short pulse (few nanoseconds) with amplitude of 500 mV to the “photon” input. Its rising edge closes S1 and then S3 , since S2 is open with no voltage applied to its input. The capacitor C1 is instantaneously charged to the voltage imposed by V1 , and from now on S3 will remain closed even after removing the photon signal. The closing of S3 represents the ignition of the avalanche, thus a large current starts flowing in Rth . If a quenching circuit is present, the cathode voltage will start to decline and so the current in Rth . As soon as the voltage drop on Rth gets lower than the threshold Sth,2 , S2 will turn on for a short time, sufficient to discharge C1 and to turn S3 off: the avalanche has been quenched, without any correlation with the falling edge of the signal photon. The value of Rth and the threshold of S2 have to be chosen according to the desired avalanche current limit. For instance, with Rth = 500 and Sth,2 = 50 mV, the current quenching will occur at 50 mV/500 = 100 A.
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Fig. 12. Microphotographs of the developed iAQC (left) and of the five-channels chip (right).
Fig. 13. Small “stamp”-like PCB containing 5 iAQCs.
3.4. Detection board Fig. 12 left shows a microphotograph of the iAQC. The overall dimensions are about 1 mm × 1 mm. In order to enable the integration of multi-pixel apparata, five iAQC were monolitically built into a single chip (Fig. 12, right). Even if they share the same silicon substrate, no electrical crosstalk was observed between channels, thanks to ground-connected guard-bars that were inserted among the iAQC and that collect any potentially armful substrate current. Then, for an easier replacement in case
Fig. 14. Complete detection electronics assembled with the SPADA detector.
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Fig. 15. Cathode’s waveform and output pulse with the minimum hold-off time (left): the overall dead-time is of only 30 ns. Same waveforms with a 200 ns hold-off time (right).
of faulty iAQC, each chip is assembled in the printed circuit board shown in Fig. 13, with dimensions of 1.5 cm × 2.5 cm. The female connector is mated to that of the SPADA holder, thus resulting in the shortest possible path between SPADs and iAQCs, whereas the male one with the connector on the Detection board, providing power supplies and signals from and to the iAQCs. A total of 12 such modules are needed to drive the 60 pixels of the SPADA, and they are arranged along a square, three for each side of the SPADA holder, as shown in Fig. 14. In order to provide access for the cold finger, the Detection board has a 4 cm × 4 cm hole in the centre. The 60 TTL outputs from the iAQCs are fed to a set of quad-differential RS-485 buffers, mounted in close proximity to the iAQC connector, thus improving noise immunity of signals. The 120 lines are then connected to two high-density HD68 SCSI connectors. The board includes a temperature controller, that drives the Peltier cooler based on the reading of the SPADA integrated thermoresistor. The temperature of both sides of the Peltier stage are also monitored for diagnostics and to prevent hazard conditions. An 8-bit microcontroller manages all settings, diagnostics, and communication
from the detection electronics to either the data-Processing Electronic board or the remote computer. Commands and readings (temperature, excess bias, hold-off duration) is transferred via RS-232 or USB interfaces. 4. Testing and characterization In the following we report the tests made on the iAQC driving thin SPADs with breakdown voltages ranging from 17 to 35 V. The applied excess bias was in the range from 5 to 10 V. Fig. 15 left shows the voltage waveform measured at the cathode, working with a thin SPAD at the shortest available hold-off time. As soon as an avalanche is triggered (at about t = −20 ns on the relative time-scale of the scope), the cathode potential drops due to the ballast resistor, then (at about t = −10 ns) the iAQC actively forces the quenching of the detector, bringing the cathode down to ground. After a negligible delay, the IN potential is restored up to Vhigh by means of the fast reset transition, forced by the iAQC (from about t = −8 ns until t = 0 ns). The quenching pulse is exactly Vhigh = 10 V. Note that when the hold-off
Fig. 16. Example of free running operation (left) and gated-mode operation (right) of the iAQC. The detector is held off when the Gate signal is low.
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cross-talk among channels, has also been fabricated, and it has been employed in the 60-pixels parallel-readout array system. References
Fig. 17. Best timing resolution obtainable with the developed iAQC and a thin SPAD with the smallest active-area (8 m diameter).
is very short (below about 50 ns), the output pulse duration is automatically reduced, in order to not superimpose pulses from subsequent avalanches. This results in a very short dead-time of only 30 ns, thus leading to a maximum saturated counting rate of 30 Mcounts/s. Fig. 16, left, shows the cathode waveforms and the corresponding output pulses obtained by illuminating the detector with a steady weak light: the detector is triggered by subsequent single photons with a 200 ns-dead-time. Fig. 16, right, shows the gated-mode operation. When the Gate level is high, the detector is free to operate and the circuit output delivers a standard TTL pulse. When the Gate is low, the SPAD is kept quenched and no avalanche can be triggered. Note that no spurious Output is provided neither on the rising nor on the falling edge of the Gate signal. The timing performance of the iAQC was measured in a time-correlated photon counting (TCPC) apparatus [14]. The remarkable value of just 27 ps-time resolution shown in Fig. 17 is easily obtained with small-area thin SPADs [1]. The iAQC was tested also with the PerkinElmer SLIKTM SPAD without encountering any problem. In order to fully exploit the intrinsic characteristics of that SPAD, whose breakdown is higher than 350 V, excess biases up to 20–30 V must be used, enabled by the new iAQC, thanks to its high-voltage design. 5. Conclusions We have discussed the role of the electronics on the performance of single photon avalanche diodes. We detailed the design and the fabrication of a new integrated active-quenching circuit, with dimensions of 1 mm × 1 mm and very low power dissipation. It enables the development of compact systems based on arrays of SPADs that are the topics of this series of two papers. The designed iAQC is able to operate both thin and thick SPADs at excess biases up to 30 V and with photon fluxes up to 30 Mcount/s. It provides standard TTL output and gatedmode operation. A monolithic five-pixel chip, with no electrical
[1] First paper of this series. [2] S. Cova, M. Ghioni, A. Lacaita, C. Samori, F. Zappa, Avalanche photodiodes and quenching circuits for single-photon detection, Appl. Opt. 35 (1996) 1956–1963. [3] P. Antognetti, S. Cova, A. Longoni, A study of the operation and performances of an avalanche diode as a single photon detector. Euratom Publication EUR 537e (1975), in: Proceedings of the Second Ispra Nuclear Electronics Symposium, Stresa, May 20–23, 1975, pp. 453–456. [4] S. Cova, A. Longoni, A. Andreoni, Towards picosecond resolution with single-photon avalanche diodes, Rev. Sci. Instrum. 52 (1981) 408–412. [5] S. Cova, US Patent #4,963,727, Italian Patent 22367A/88, Industrial Licence to SILENA S.p.A., Milano, Italy. [6] R.G. Brown, R. Jones, J.G. Rarity, K.D. Ridley, Characterization of silicon avalanche photodiodes for photon correlation measurements. 2. Active quenching, Appl. Opt. 26 (1987) 2383–2389. [7] M. Ghioni, S. Cova, F. Zappa, C. Samori, Compact active-quenching circuit for fast photon counting with avalanche photodiodes, Rev. Sci. Instrum. 67 (1996) 3440–3448. [8] H. Dautet, P. Deschampes, B. Dion, A.D. MacGregor, D. MacSween, R.J. McIntyre, C. Trottier, P. Webb, Photon counting techniques with silicon avalanche photodiodes, Appl. Opt. 32 (1993) 3894–3900. [9] F. Zappa, M. Ghioni, S. Cova, C. Samori, A.C. Giudice, An integrated active-quenching circuit for single-photon avalanche diodes, IEEE Trans. Instrum. Measur. 496 (2000) 1167–1175. [10] F. Zappa, A. Giudice, M. Ghioni, S. Cova, Fully integrated activequenching circuit for single-photon detection, in: Solid-State Circuits Conference, Proceedings of the 28th European, vols. 355–358, 2002, pp. 24–26. [11] F. Zappa, S. Cova, M. Ghioni, “Monolithic circuit of active-quenching and active reset for avalanche photodiodes”, US Patent appl. n. 09/797,974, filed March 5, 2001; European patent appl. n. 01200852.2-2217, filed March 6, 2001. [12] R.H. Haitz, Model for the electrical behaviour of a microplasma, J. Appl. Phys. 35 (1964) 1370–1376. [13] A. Lacaita, P.A. Francese, F. Zappa, S. Cova, Single photon detection beyond 1 micron: performance of commercially available germanium photodiodes, Appl. Opt. 33 (1994) 6902–6918. [14] V. O’Connor, D. Phillips, Time-correlated Single Photon Counting, Academic Press, London, 1984.
Biographies Simone TISA was born in Milano, Italy, in 1977. He received his M.Sc. degree (summa cum laude) in Electronics Engineering from Politecnico di Milano in 2001, and his Ph.D. in Electronics in 2006 from the same university. His research interests are connected with the use of single photon detectors and active-quenching circuits for ultrafast imaging applications in astrophysics, and with the design of bidimensional arrays of single photon avalanche diodes with integrated electronics for the acquisition of time resolved images at single photon level. Franco ZAPPA was born in Milano, Italy, in 1965. Since 1998 he is Associate Professor of Electronics at Politecnico di Milano. In 1989 he graduated in Electronics Engineering and in 1993 he received the Ph.D. degree in Electronics at Politecnico di Milano. His research interests are the design and applications of single photon avalanche diodes in the visible and near-infrared wavelength ranges, and the design of photodetector arrays for fast imaging and the related electronics. He is actually working on the testing of VLSI chips by means of the time-resolved measurement of hot-carrier luminescence emission and on the CAD modeling of such luminescence into MOSFETs. He was awarded by three international Patents about integrated electronics and devices for single photon detection. He coauthored about 80 technical papers.
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Alberto TOSI was born in 1975 in Borgomanero (Italy). He graduated summa cum laude in Electronics Engineering in 2001 and he received his Ph.D. degree in Information Technology Engineering in 2005 at Politecnico di Milano (Italy). Since 2006 he is an Assistant Professor at Politecnico di Milano, Italy. In 2004 he was a summer student at IBM T.J. Watson Research Center, Yorktown Heights, NY, working on the experimental investigation and testing of VLSI CMOS circuits by means of single photon detectors and imaging arrays. He currently investigates on visible and near-infrared single photon detectors (Silicon, Germanium and InGaAs detectors) and the related electronics for high-resolution timing acquisitions. Sergio COVA was born in 1938 Roma, Italy. He received his doctor degree in Nuclear Engineering in 1962 from Politecnico di Milano, Italy, where he
is Full professor of Electronics since 1976. Fellow of the IEEE, he is author of over a 140 papers in international refereed journals and conferences and of five international patents (USA and Europe). He has given innovative contributions in the research and development of detectors for optical and ionizing radiations and associated electronics, of microelectronic devices and circuits, of electronic and optoelectronic measurement instrumentation and systems. He pioneered the development of single photon avalanche diodes SPADs, inventing the active-quenching circuit AQC, which opened the way to their application, and devising new SPAD device structures. He collaborated to interdisciplinary research in physics, quantum cryptography, astronomy, cytology and molecular biology, developing dedicated electronic and optoelectronic devices and instrumentation.
Electronics for single photon avalanche diode arrays S. Tisa ∗ , F. Zappa, A. Tosi, S. Cova Politecnico di Milano, Dip. Elettronica e Informazione, p. Leonardo da Vinci 32, 20133 Milano, Italy Received 4 August 2006; received in revised form 20 June 2007; accepted 20 June 2007 Available online 26 June 2007
Abstract This is the second of two serial papers dealing with single photon avalanche diode (SPAD) topics. Aim of the series is to discuss in depth the features and device structures of the array chip we developed (in the first paper) and the required fast electronics and the overall performance reached in passive, active, and gated regime (in this second paper). Main motif of the two papers is to present a compact system for 2D counting and time-tagging of single photons, based on a monolithic array sensor of 60 pixels, the single photon avalanche diode array (SPADA). In this second paper we review the electronics needed to actively quench and actively reset each pixel after avalanche ignition, namely the active-quenching circuit (AQC), since the features of such quenching electronics dramatically affect the operating conditions of the array detector and its actual performance. Design criteria, performances and technological process for manufacturing integrated AQCs will be thoroughly discussed. © 2007 Elsevier B.V. All rights reserved. Keywords: Single photon avalanche diode (SPAD); Active-quenching circuit (AQC)
1. Principles and problems In Ref. [1], we showed that once a single photon avalanche diode (SPAD) is biased above breakdown, VB , and gets triggered, current keeps flowing until the avalanche process is quenched by lowering the bias voltage down to VB or below. After a dead-time, the operative voltage must be restored in order to make the SPAD able to detect another photon. This operation requires a suitable electronics with the following tasks: (i) it senses the leading edge of the avalanche current; (ii) it generates a standard output pulse, synchronous with the current onset; (iii) it quenches the avalanche by lowering the bias below the breakdown voltage; (iv) it restores the photodiode voltage to the operating level. This circuit is usually referred to as quenching circuit. The most commonly used circuit in the first studies on Geiger-mode avalanche photodiodes is the passive-quenching circuit (Fig. 1, left): the avalanche current self-quenches simply by developing a voltage drop on a high-value impedance load (RL > 100 k). Such circuit is very simple and can be easily employed, but sets severe limitations to the maximum admissible photon counting rate and to the detector performance in general [2]. In fact, it was the introduction of the active-quenching ∗
Corresponding author. Tel.: +39 02 2399 6149; fax: +39 02 2399 3699. E-mail address: [email protected] (S. Tisa).
0924-4247/$ – see front matter © 2007 Elsevier B.V. All rights reserved. doi:10.1016/j.sna.2007.06.022
circuit (AQC) concept by Cova [3–5] that opened the way to practical application of SPADs. Many AQC types have then been reported, with circuit structure and mounting that evolved from standard NIM cards [4,6] to small SMT boards suitable for compact detection modules [7,8]. In recent years, work towards monolithic integration of AQCs was started in our laboratory. First, the core structure of the AQC was integrated [9], then we designed, fabricated, and tested the first fully integrated iAQC [10], under US and European patent [11]. 1.1. Passive-quenching circuits The passive-quenching circuit (PQC) is shown in Fig. 1 together with its equivalent circuit: the SPAD is reverse biased through a high-value ballast resistor RL of 100 k or more. RS is a small sensing resistor, typically 50 , which converts the fast current signal into a voltage signal that drives the comparator applied at node 2. CD is the junction capacitance (typically ∼1 pF) and CP is the stray capacitance to ground (typically few picofarads). The role of the stray capacitance from anode to ground is negligible, due to the low-impedance RS connection. The diode resistance RD is given by the sum of the space-charge resistance and the ohmic resistance of neutral regions crossed by the avalanche current. It depends on the device structure and can be around 400 for thick SPADs with wide area (200 mdiameter or more), or from few hundreds ohms up to some k for
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Fig. 1. Passive-quenching circuit (left side) and equivalent circuit (right side). The diode equivalent circuit is depicted inside the dotted square.
thin SPADs with relatively small active area (from 10 to 50 m diameter). VB is the breakdown voltage and VA the bias voltage. When no current is flowing, the diode current ID is zero and the diode bias voltage VD is equal to VA (reverse bias), as shown in Fig. 2. Avalanche triggering (fired by a photon absorption or by a thermal generation) corresponds to closing the switch of the diode equivalent circuit in Fig. 1. In few picoseconds, the current reaches the peak value, before the diode voltage has changed: the bias point moves from VA to the m point in Fig. 2 almost along a straight line, due to the CD capacitance. Then, the high current flowing through the diode discharges the capacitors and ID and VD decrease exponentially to the steady-state condition (n point). After triggering, the current flowing in the photodiode as a function of time is given by ID (t) =
VD (t) − VB VEX (t) = RD RD
(1)
where VEX (t) is the excess bias above breakdown at which the SPAD is biased. Fig. 3 shows typical ID and VD waveforms. The asymptotic steady-state values of SPAD current, If , and voltage, Vf , and the peak value of the avalanche current ID (0+) can be easily calculated by solving the equivalent circuit in Fig. 2, with the boundary conditions that at t = 0 capacitor CD is charged to
Fig. 3. Waveforms of the diode voltage VD (top) and current ID (bottom) after the triggering of an avalanche.
VA and at t = ∞ both capacitors are open circuits [2]: ID (0+ ) =
VA − VB , RD
VA − V B VEX ≈ , RD + R L RL
Vf = VB + RD If
(2)
The approximation is justified since usually RL RD . The quenching time constant τ q is set by the total capacitance CD + CP and by the parallel of RD and RL (practically limited by RD ) τq = (CD + CP )RL RD ≈ (CD + CP )RD
(3)
At low If , Vf is very near to VB (see Fig. 3). When the decaying voltage VD (t) approaches VB , the intensity of ID (t) becomes low and the number of carriers that cross the avalanche region is consequently small. Since the avalanche process is statistical, it can happen that none of the carriers crossing the high field region impact ionize. The probability of zero-multiplied carriers becomes significant when the diode current ID falls below about 100 A, and rapidly increases as ID further decreases [12]. Therefore we can say that avalanche process is self-sustaining if the current level is above a threshold value Iq ∼ 100 A, otherwise the process self-quenches. The Iq value is not sharply defined, hence the quenching time shows a remarkable jitter with respect to the avalanche onset. When the diode self-quenches, the switch in Fig. 1 opens and the two capacitors slowly recharge to VA , with an exponential recovery transition with time constant τr ≈ (CD + CP )RL
Fig. 2. SPAD I–V characteristic with the load curve of a passive-quenching circuit.
If =
(4)
Now, the transition is slow because the time constant is dominated by RL , which is very high; with RD = 1 k, RL = 100 k, CP = 1 pF and CD = 9 pF we obtain τ q = 10 ns while τ r = 1 s. The step-like voltage signal at the sense resistor is a scaled replica of the current through the SPAD, because during the fast transient the capacitor CP behaves as a short-circuit and current
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Fig. 4. Left side: diode current (a) and voltage (b) waveforms of a SPAD biased with a PQC; observe the retriggering of the SPAD during the recovery transition and the correlated avalanche current pulses. Right side: comparison of diode current pulses occurred during the recovery transition and corresponding time-jitter in evaluating the photon-detection time.
flows through RS . The peak value is Vpeak =
CP VEX RS RD CP + C D
(5)
In order to have a significant voltage pulse on RS , the stray capacitance CP must be comparable to or greater than the diode capacitance CD . Otherwise only a small fraction of avalanche current would flow through RS (the one discharging CP ), whereas the current discharging CD flows through the internal loop within the SPAD (see Fig. 1). With RS = 50 the voltage signal ranges from tens to hundreds of millivolts. Finally, an important parameter is the total charge Qpc in the avalanche pulse, related to asymptotic current If and recovery time constant τ r as Qpc = (VA − Vf )(CD + CP ) ≈ VEX (CD + CP ) ≈ If τr
(6)
This charge must be minimized, in order to reduce charge trapping and the related afterpulsing discussed in Ref. [1]. 1.2. Recovery transition in passive-quenching Once the avalanche current is quenched, the diode slowly recovers toward the quiescence bias voltage with a time constant τ r , so that it takes ∼5τ r to recover to the correct excess bias within 1%. Given the typical values of the load resistor and the capacitances, τ r is in the microsecond range (5 s with the values given before). During recovery, the diode voltage VD (t) rises above VB . A photon that arrives during the very first part of recovery is almost certainly lost, since the avalanche triggering probability is almost negligible. Instead, subsequent photons have a progressively higher probability to trigger the SPAD. Unfortunately, SPAD triggering during recovery transition has mainly two deleterious effects due to the time-varying excess bias that rules voltage and current peaks (see Eqs. (2) and (5)). 1. Pulses having an amplitude lower than the threshold of the comparator are not sensed (see Fig. 4, left). Significant count losses are expected at higher counting rates. As a matter of fact, after each ignition, the detector has a dead-time which is not well-defined, because, when the avalanche is fired during the recovery transition its duration depends on the
triggering conditions. As a consequence, in order to have an accuracy better that 1% in photon counting measurements, the total counting rate must not exceed few tens of kcounts/s [2]. 2. Time resolution is severely degraded for two reasons. First of all, the intrinsic time resolution of the SPAD is impaired when excess bias is reduced [2]. Second, additional jitter is introduced because pulses with different amplitudes cross the comparator threshold at different times, as depicted on the right side of Fig. 4. With a pulse rise-time of about 1 ns, a 10% fluctuation in excess bias causes a jitter of about 100 ps in threshold crossing. Constant-fraction trigger circuits could be employed, but would be only partially effective since the shape of the output current pulse varies in amplitude and also in shape: the current rise-time becomes progressively faster as the excess bias progressively increases toward the quiescence value VEX = VA − VB . As can be experimentally verified [2], such effect gets worst at high counting rates. Setting a limit of 5% to the probability that a photon arrives during the recovery time, typical values of the maximum exploitable counting rate are about few kcounts/s, as can be calculated, e.g. in Ref. [2]. Of course by increasing the speed of the recovery time, SPAD performances in PQC improve. This can be obtained by minimizing the values of ballast resistor RL and stray capacitance CS . However RL cannot be strongly reduced because If must remain lower enough than the latching current Iq . Anyway it can be calculated that even in the most favorable cases (CS and CD < 1 pF and RL = 50–100 k), accurate photon timing and counting cannot be achieved in passive-quenching if ntot is higher than 50/200 kcounts/s, respectively [2]. 2. Active-quenching circuits In order to avoid the highlighted drawbacks of PQC and fully exploit the intrinsic performance of SPADs, a new approach was devised by Cova [3–5]. The basic idea was to sense the rise of the avalanche pulse and react back on the SPAD, by forcing the quenching and reset transitions in short (few nanoseconds) times, with a controlled bias-voltage source. This approach
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Fig. 5. Block diagram of the active-quenching circuit developed in Ref. [3].
was called active-quenching circuit (AQC) and soon became a widespread standard in scientific literature. A schematic diagram of an AQC is shown in Fig. 5 [3]. When the SPAD is quiescent and no current is flowing, its cathode is biased by the AQC to ground, by means of the low-impedance driver. The fast onset of the avalanche current is sensed by a fast comparator, which triggers the monostable and drives the output stage. The comparator triggers also a driving stage that applies a quenching pulse of V, synchronous with the avalanche triggering and with very low jitter. In order to quench the avalanche, V must be high enough to reduce the diode voltage below VB . The detector is then kept off for a well-controlled hold-off time (THO ), at the end of which the driver swiftly restores the SPAD bias voltage to the operating level in order to be ready to detect another photon. During the reset transition, since spurious couplings and reflections could retrigger the comparator, it can be latched off by the monostable for the whole reset duration. The advantages of active-quenching are the following. 1. The avalanche current intensity is kept constant due to the low-impedance of the driver biasing the detector. 2. The duration of the avalanche current pulse is constant and depends on the time taken by the avalanche signal to travel from the SPAD to the AQC, forth and back, and on the slope of the driver quenching pulse. By reducing this loop time, power dissipation (sensitive for thick SPADs) is limited, hence the breakdown voltage shift, and also afterpulsing, since the number of trapped carriers is linearly proportional to the avalanche pulse duration. 3. The hold-off time is easily adjustable by means of the monostable. 4. Both quenching and reset transitions are fast (tens of nanoseconds), thus minimizing the probability of non-standard avalanche triggering during the recovery transition. 5. Thanks to the low input impedance, all SPAD ignitions are sensed by the fast comparator, with no count-loss. Despite this simple working principle, design of such AQC is not an easy task: many problems are encountered and strict requirements must be set for fully exploiting SPAD performances [2]. A major problem is the high difference between
the avalanche pulse sensed by the comparator (usually lower than 1 mA, i.e. lower than 50 mV on a 50 resistance) and the quenching pulse, that can be as high as 20 V (i.e. 400 times stronger). In those conditions the comparator could be retriggered by reflections of the quenching pulse and the AQC would start oscillating (as if an avalanche was detected at the end of every reset transition). Moreover, in order to reduce power dissipation and afterpulsing, quenching time duration must be minimized. Problems arise when the SPAD must be remotely driven and the detector is far from the AQC, for instance when the SPAD is inside a cryostat or a microscope. As in PQCs, even AQCs are characterized by a dead-time after each triggering event, during which subsequent incoming photons cannot be detected. Nevertheless AQC’s dead-time is well-defined and constant, since it is the sum of the avalanche pulse duration, the hold-off time, and (usually negligible) quenching and reset transitions: it is now possible to use the well-known correction methods developed for counting pulses from nuclear radiation detectors [2]. Moreover, since the holdoff time is adjustable, a suitable length can be selected according to application requirements. Setting the dead-time to the minimum value of few tens of nanoseconds (with almost negligible hold-off duration), it is possible to reach photon-counting rates up to tens of Mcounts/s. Instead, if afterpulsing effects must be reduced, the hold-off time can be increased to the extent necessary for the majority of trapped carriers be released during hold-off. Usually 400 ns are quite enough for silicon detectors, even if at low temperatures longer dead-times are needed, since trapped carriers are released with longer delays [13]. 2.1. Mixed passive–active-quenching circuit Another AQC approach was studied in our labs, namely a mixed passive–active-quenching [7,9]. This approach is particularly useful for minimizing the charge in the avalanche pulse, particularly for SPADs having small stray capacitance and small series resistance. A passive load RL provides a prompt passive quasi-quenching of the avalanche current. Then an active loop completes the task by forcing the SPAD voltage well below the nominal VB . After a controlled hold-off time, the active loop applies a fast reset transition. By minimizing the pulse charge, trapping and power dissipation are reduced. Also optical crosstalk [1] is limited since a shorter avalanche current duration shrink hot-carrier photo-emission probability. Furthermore, this mixed approach gives flexibility in the choice of the passive load, since passive quasi-quenching action is anyhow confirmed by an active intervention. Therefore RL can be chosen smaller than the minimum required for complete passive-quenching, thus increasing the speed of the circuit in detecting SPAD ignitions. Fig. 6 shows the block diagram of the first mixed passive–active-quenching [7]. During quiescence, no current flows through the resistors, the comparator input node (IN) is at ground, the reset and quenching switches are open and SPAD is reverse biased at Vpol . As soon as an avalanche is fired, the current flows through the resistors and the voltage drop across the sense resistor RS triggers the comparator. The load resistor RL for the quasi-quenching is in the range of some tens of k.
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well-controlled length of time and then the active reset quickly restores the potential to the ground level. In applications where photons of interest occur only at short and well-defined time intervals, such as laser ranging of satellites or laser-induced fluorescence, gated-detector operation can be provided. When the Gate enable is on, the SPAD operates in free-running as described above; when the Gate enable is off, the quenching switch is kept closed, the SPAD is held off and no photon can be detected. 3. Fully integrated iAQC Fig. 6. Block diagram of the mixed passive–active-quenching approach.
The signal at the comparator input is a smaller replica of the avalanche voltage signal shown in Fig. 3 instead of the fast current pulse, because the sense resistor is not at the ground lead of the photo-detector [2]. The reduction factor is given by the partition RS /RL . Since the minimum achievable comparator threshold is about 15 mV, RS cannot be too low: assuming RL = 200 k and a 2 V-excess bias, RS must be at least 2 k. The output of the comparator is sent to the control logic which generates an output TTL pulse synchronous to the triggering and closes the quenching switch, thus lowering the cathode potential to −Vquench (active-quenching confirmation). The SPAD bias voltage is now |Vpol − Vquench | and it must be lower than VB , in order to definitely quench the avalanche. In other words, since the quenching pulse is equal to Vquench , the maximum excess bias applicable to the SPAD is Vquench . After a well-defined hold-off time the quenching switch is opened and the reset switch is closed. The SPAD cathode voltage is hence restored to ground in few nanoseconds. The reset switch is subsequently opened and the SPAD is ready to detect another photon. Fig. 7 shows the typical cathode waveform: during quiescence the cathode potential is at ground level; the photon absorption triggers the avalanche and the cathode experience the passive-quenching exponential decrease, which is swiftly confirmed by the fast (nanoseconds) active-quenching, lowering the cathode potential to −Vquench . The diode is then held-off for a
Fig. 7. Typical cathode waveform in a mixed passive active-quenching circuit.
In order to reduce stray capacitances, thus improving timing performances, and strongly reducing SPAD power dissipation, we designed and fabricated the first fully integrated activequenching circuit (iAQC) [10]. The circuit was the first ever reported in literature and is under European and US patent [11]. Then we further enhanced the chip, through a more flexible highvoltage CMOS technology and a redesign of key portions of the circuits. Our main goal was to minimize the duration of the avalanche current through the SPAD, because of the three well-know detrimental effects that increase proportionally to the total charge in the avalanche current pulse: afterpulsing, energy dissipation, emissions of secondary photons by hotcarriers. Moreover we wanted to shorten the reset transition for reducing the chance of having ignitions whilst the SPAD is in non-standard conditions, for improving timing and detection efficiency uniformities even at high counting rates. Chip dimensions of 1 mm × 1 mm enable the integration of more iAQCs into monolithic multi pixel arrays. The iAQC operates with excess bias up to 25 V and with a dead time as short as 30 ns, leading to a saturated counting rate of 33 Mcounts/s. Both free-running and gated (as short as few tens of nanoseconds) operation are possible, and power dissipation is below 70 mW, even at the highest counting rates. 3.1. Working principle The circuit was designed to operate with any SPAD, both thin and thick ones, with high breakdown voltage (exceeding 400 V) and large avalanche currents (exceeding 30 mA). The high-voltage 0.8 m CMOS technology has two metal layers and one high resistive poly. As shown in Fig. 8, a high-value
Fig. 8. Block diagram of the integrated active-quenching circuit (iAQC).
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ballast resistor RB (75 k) is included in the SPAD bias network for providing a prompt passive-quenching action, to be quickly followed and confirmed by the active-quenching. The SPAD is biased between a positive Vhigh and a negative Vlow . For proper operation, |Vlow | is slightly smaller than VB , typically |Vlow | ≈ VB –1 V and |Vhigh − Vlow | is greater than VB by the amount of the required excess bias above breakdown. In such conditions, the iAQC can quench the avalanche just by pulling the IN node down to ground. When the avalanche current is triggered, it develops a voltage drop across RB and the passive-quenching promptly starts. A fast sensing stage, whose sensitivity can be adjusted via the threshold pin, detects the current onset and confirms the SPAD quenching by lowering the IN potential down to ground by means of the switch Squench . The sensing stage triggering propagates through the delay block, which is responsible for the hold-off time duration, externally adjustable via the width control pin. It is also connected to the output stage, that generates a standard TTL output, synchronous with the beginning of the active-quenching, that can be used either for counting the event (photon-counting), or for measuring the photon arrival time with low time jitter (photon-timing). When hold-off expires, the delayed pulse reaches the reset control stage: Sfeedback and Squench switches are then turned off while Sreset is turned on. The IN node rises towards Vhigh and Sreset is maintained on by the reset control network until VIN almost reaches Vhigh . The reset duration is thus automatically adjusted in order to accomplish a full reset with any SPAD and in every working conditions, with no need of any external adjustment. Then Sreset is turned off and Sfeedback on, thus enabling the chip for the detection of the next SPAD ignition.
Fig. 9. Network implementing the Gate function with no undesired output pulse.
a threshold value, usually in the range of some tens of A, at which the avalanche stops. If otherwise, the cathode voltage does not drop below this threshold, the avalanche process is not interrupted, and the SPAD is not able to detect subsequent photons. The failing of the iAQC to quench the diode is a clear circuit fault, that can lead also to the damaging of the detector, especially if it has a breakdown voltage of some hundreds of volts, as in the case of thick SPADs, since power dissipation can become a serious problem [1]. For this reason, a new SPAD model, that could help in detecting this faulty behavior during the early design and simulation of the iAQC, was devised. The model used for the design of previous iAQC, reported in Fig. 10, is not able to detect a quenching failure, since the interruption of the avalanche current is synchronous with the falling edge of the signal photon applied to the MOSFET, which represents the detection of a photon and the avalanche ignition. This implies that the quenching of the detector is not a consequence of the iAQC behavior, but it is caused exclusively by the simulation stimulus photon. Furthermore, this model brings some other complications during the simulation phase. Let us explain it with a numerical example. Suppose to power the iAQC
3.2. Gate function Many applications require that the single photon detector is operated in the so called gated-mode, where the detector is active only during an externally defined time-slot. In gated mode operation, photon detection is inhibited when the external signal Gate is off, and permitted elsewhere. This task could be accomplished by simply masking the output of the iAQC via the Gate signal. However for several reasons a better solution is to keep the SPAD below breakdown voltage when gated-off, and at the desired excess bias when gated-on. This avoids the occurring of avalanches during the non-observation window, thus reducing power dissipation and ensuring that the detector will be ready for the arrival of a photon as soon as Gate is enabled. A suitable implementation requires that the Gate signal first triggers a forced quenching of the SPAD, by way of a small NMOS transistor, that inhibits the propagation of the Sense signal to the reset stage, as shown in Fig. 9. The output monostable delays the Sense signal, in order not to have an Out pulse at every gate-off transition. 3.3. SPAD model for iAQC simulations As explained in Ref.[1], the diode quenching occurs when the cathode voltage is so low that the SPAD current drops below
Fig. 10. SPAD model used for the simulation of previous iAQC circuits.
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Fig. 11. New SPAD model used for the iAQC simulation.
with Vhigh = 15 V and to use a SPAD with a breakdown voltage Vb = 30 V. Then choose Vlow = −20 V, in order to have an excess voltage VEX = + 15 V–(−20 V)–30 V = 5 V. During quenching, the cathode voltage moves from Vhigh = 15 V toward ground, and when the cathode reaches 10 V the SPAD goes off. If we have chosen a different excess voltage, for instance 10 V, the cathode voltage would have to reach 5 V to quench the diode, and this would require a longer time. Hence, for different excess voltages, an accurate simulation should account for the different quenching time, which means that the duration of the signal “photon” has to be manually trimmed, depending on the biasing conditions and diode parasites. All these issues are resolved with the new model reported in Fig. 11. The three voltage controlled switches (S1 , S2 , S3 ) together with C1 , V1 and Rth build the network for the automatic detector quenching. Switches S1 and S3 close when the voltage applied to their input is higher than 100 mV, whereas S2 is normally open, and closes only when the voltage at its input is around a threshold Sth,2 . Let us consider the SPAD off, and suppose to apply a short pulse (few nanoseconds) with amplitude of 500 mV to the “photon” input. Its rising edge closes S1 and then S3 , since S2 is open with no voltage applied to its input. The capacitor C1 is instantaneously charged to the voltage imposed by V1 , and from now on S3 will remain closed even after removing the photon signal. The closing of S3 represents the ignition of the avalanche, thus a large current starts flowing in Rth . If a quenching circuit is present, the cathode voltage will start to decline and so the current in Rth . As soon as the voltage drop on Rth gets lower than the threshold Sth,2 , S2 will turn on for a short time, sufficient to discharge C1 and to turn S3 off: the avalanche has been quenched, without any correlation with the falling edge of the signal photon. The value of Rth and the threshold of S2 have to be chosen according to the desired avalanche current limit. For instance, with Rth = 500 and Sth,2 = 50 mV, the current quenching will occur at 50 mV/500 = 100 A.
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Fig. 12. Microphotographs of the developed iAQC (left) and of the five-channels chip (right).
Fig. 13. Small “stamp”-like PCB containing 5 iAQCs.
3.4. Detection board Fig. 12 left shows a microphotograph of the iAQC. The overall dimensions are about 1 mm × 1 mm. In order to enable the integration of multi-pixel apparata, five iAQC were monolitically built into a single chip (Fig. 12, right). Even if they share the same silicon substrate, no electrical crosstalk was observed between channels, thanks to ground-connected guard-bars that were inserted among the iAQC and that collect any potentially armful substrate current. Then, for an easier replacement in case
Fig. 14. Complete detection electronics assembled with the SPADA detector.
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Fig. 15. Cathode’s waveform and output pulse with the minimum hold-off time (left): the overall dead-time is of only 30 ns. Same waveforms with a 200 ns hold-off time (right).
of faulty iAQC, each chip is assembled in the printed circuit board shown in Fig. 13, with dimensions of 1.5 cm × 2.5 cm. The female connector is mated to that of the SPADA holder, thus resulting in the shortest possible path between SPADs and iAQCs, whereas the male one with the connector on the Detection board, providing power supplies and signals from and to the iAQCs. A total of 12 such modules are needed to drive the 60 pixels of the SPADA, and they are arranged along a square, three for each side of the SPADA holder, as shown in Fig. 14. In order to provide access for the cold finger, the Detection board has a 4 cm × 4 cm hole in the centre. The 60 TTL outputs from the iAQCs are fed to a set of quad-differential RS-485 buffers, mounted in close proximity to the iAQC connector, thus improving noise immunity of signals. The 120 lines are then connected to two high-density HD68 SCSI connectors. The board includes a temperature controller, that drives the Peltier cooler based on the reading of the SPADA integrated thermoresistor. The temperature of both sides of the Peltier stage are also monitored for diagnostics and to prevent hazard conditions. An 8-bit microcontroller manages all settings, diagnostics, and communication
from the detection electronics to either the data-Processing Electronic board or the remote computer. Commands and readings (temperature, excess bias, hold-off duration) is transferred via RS-232 or USB interfaces. 4. Testing and characterization In the following we report the tests made on the iAQC driving thin SPADs with breakdown voltages ranging from 17 to 35 V. The applied excess bias was in the range from 5 to 10 V. Fig. 15 left shows the voltage waveform measured at the cathode, working with a thin SPAD at the shortest available hold-off time. As soon as an avalanche is triggered (at about t = −20 ns on the relative time-scale of the scope), the cathode potential drops due to the ballast resistor, then (at about t = −10 ns) the iAQC actively forces the quenching of the detector, bringing the cathode down to ground. After a negligible delay, the IN potential is restored up to Vhigh by means of the fast reset transition, forced by the iAQC (from about t = −8 ns until t = 0 ns). The quenching pulse is exactly Vhigh = 10 V. Note that when the hold-off
Fig. 16. Example of free running operation (left) and gated-mode operation (right) of the iAQC. The detector is held off when the Gate signal is low.
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cross-talk among channels, has also been fabricated, and it has been employed in the 60-pixels parallel-readout array system. References
Fig. 17. Best timing resolution obtainable with the developed iAQC and a thin SPAD with the smallest active-area (8 m diameter).
is very short (below about 50 ns), the output pulse duration is automatically reduced, in order to not superimpose pulses from subsequent avalanches. This results in a very short dead-time of only 30 ns, thus leading to a maximum saturated counting rate of 30 Mcounts/s. Fig. 16, left, shows the cathode waveforms and the corresponding output pulses obtained by illuminating the detector with a steady weak light: the detector is triggered by subsequent single photons with a 200 ns-dead-time. Fig. 16, right, shows the gated-mode operation. When the Gate level is high, the detector is free to operate and the circuit output delivers a standard TTL pulse. When the Gate is low, the SPAD is kept quenched and no avalanche can be triggered. Note that no spurious Output is provided neither on the rising nor on the falling edge of the Gate signal. The timing performance of the iAQC was measured in a time-correlated photon counting (TCPC) apparatus [14]. The remarkable value of just 27 ps-time resolution shown in Fig. 17 is easily obtained with small-area thin SPADs [1]. The iAQC was tested also with the PerkinElmer SLIKTM SPAD without encountering any problem. In order to fully exploit the intrinsic characteristics of that SPAD, whose breakdown is higher than 350 V, excess biases up to 20–30 V must be used, enabled by the new iAQC, thanks to its high-voltage design. 5. Conclusions We have discussed the role of the electronics on the performance of single photon avalanche diodes. We detailed the design and the fabrication of a new integrated active-quenching circuit, with dimensions of 1 mm × 1 mm and very low power dissipation. It enables the development of compact systems based on arrays of SPADs that are the topics of this series of two papers. The designed iAQC is able to operate both thin and thick SPADs at excess biases up to 30 V and with photon fluxes up to 30 Mcount/s. It provides standard TTL output and gatedmode operation. A monolithic five-pixel chip, with no electrical
[1] First paper of this series. [2] S. Cova, M. Ghioni, A. Lacaita, C. Samori, F. Zappa, Avalanche photodiodes and quenching circuits for single-photon detection, Appl. Opt. 35 (1996) 1956–1963. [3] P. Antognetti, S. Cova, A. Longoni, A study of the operation and performances of an avalanche diode as a single photon detector. Euratom Publication EUR 537e (1975), in: Proceedings of the Second Ispra Nuclear Electronics Symposium, Stresa, May 20–23, 1975, pp. 453–456. [4] S. Cova, A. Longoni, A. Andreoni, Towards picosecond resolution with single-photon avalanche diodes, Rev. Sci. Instrum. 52 (1981) 408–412. [5] S. Cova, US Patent #4,963,727, Italian Patent 22367A/88, Industrial Licence to SILENA S.p.A., Milano, Italy. [6] R.G. Brown, R. Jones, J.G. Rarity, K.D. Ridley, Characterization of silicon avalanche photodiodes for photon correlation measurements. 2. Active quenching, Appl. Opt. 26 (1987) 2383–2389. [7] M. Ghioni, S. Cova, F. Zappa, C. Samori, Compact active-quenching circuit for fast photon counting with avalanche photodiodes, Rev. Sci. Instrum. 67 (1996) 3440–3448. [8] H. Dautet, P. Deschampes, B. Dion, A.D. MacGregor, D. MacSween, R.J. McIntyre, C. Trottier, P. Webb, Photon counting techniques with silicon avalanche photodiodes, Appl. Opt. 32 (1993) 3894–3900. [9] F. Zappa, M. Ghioni, S. Cova, C. Samori, A.C. Giudice, An integrated active-quenching circuit for single-photon avalanche diodes, IEEE Trans. Instrum. Measur. 496 (2000) 1167–1175. [10] F. Zappa, A. Giudice, M. Ghioni, S. Cova, Fully integrated activequenching circuit for single-photon detection, in: Solid-State Circuits Conference, Proceedings of the 28th European, vols. 355–358, 2002, pp. 24–26. [11] F. Zappa, S. Cova, M. Ghioni, “Monolithic circuit of active-quenching and active reset for avalanche photodiodes”, US Patent appl. n. 09/797,974, filed March 5, 2001; European patent appl. n. 01200852.2-2217, filed March 6, 2001. [12] R.H. Haitz, Model for the electrical behaviour of a microplasma, J. Appl. Phys. 35 (1964) 1370–1376. [13] A. Lacaita, P.A. Francese, F. Zappa, S. Cova, Single photon detection beyond 1 micron: performance of commercially available germanium photodiodes, Appl. Opt. 33 (1994) 6902–6918. [14] V. O’Connor, D. Phillips, Time-correlated Single Photon Counting, Academic Press, London, 1984.
Biographies Simone TISA was born in Milano, Italy, in 1977. He received his M.Sc. degree (summa cum laude) in Electronics Engineering from Politecnico di Milano in 2001, and his Ph.D. in Electronics in 2006 from the same university. His research interests are connected with the use of single photon detectors and active-quenching circuits for ultrafast imaging applications in astrophysics, and with the design of bidimensional arrays of single photon avalanche diodes with integrated electronics for the acquisition of time resolved images at single photon level. Franco ZAPPA was born in Milano, Italy, in 1965. Since 1998 he is Associate Professor of Electronics at Politecnico di Milano. In 1989 he graduated in Electronics Engineering and in 1993 he received the Ph.D. degree in Electronics at Politecnico di Milano. His research interests are the design and applications of single photon avalanche diodes in the visible and near-infrared wavelength ranges, and the design of photodetector arrays for fast imaging and the related electronics. He is actually working on the testing of VLSI chips by means of the time-resolved measurement of hot-carrier luminescence emission and on the CAD modeling of such luminescence into MOSFETs. He was awarded by three international Patents about integrated electronics and devices for single photon detection. He coauthored about 80 technical papers.
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Alberto TOSI was born in 1975 in Borgomanero (Italy). He graduated summa cum laude in Electronics Engineering in 2001 and he received his Ph.D. degree in Information Technology Engineering in 2005 at Politecnico di Milano (Italy). Since 2006 he is an Assistant Professor at Politecnico di Milano, Italy. In 2004 he was a summer student at IBM T.J. Watson Research Center, Yorktown Heights, NY, working on the experimental investigation and testing of VLSI CMOS circuits by means of single photon detectors and imaging arrays. He currently investigates on visible and near-infrared single photon detectors (Silicon, Germanium and InGaAs detectors) and the related electronics for high-resolution timing acquisitions. Sergio COVA was born in 1938 Roma, Italy. He received his doctor degree in Nuclear Engineering in 1962 from Politecnico di Milano, Italy, where he
is Full professor of Electronics since 1976. Fellow of the IEEE, he is author of over a 140 papers in international refereed journals and conferences and of five international patents (USA and Europe). He has given innovative contributions in the research and development of detectors for optical and ionizing radiations and associated electronics, of microelectronic devices and circuits, of electronic and optoelectronic measurement instrumentation and systems. He pioneered the development of single photon avalanche diodes SPADs, inventing the active-quenching circuit AQC, which opened the way to their application, and devising new SPAD device structures. He collaborated to interdisciplinary research in physics, quantum cryptography, astronomy, cytology and molecular biology, developing dedicated electronic and optoelectronic devices and instrumentation.