Normally-off GaAs BMFET with heterojunction emitter

Normally-off GaAs BMFET with heterojunction emitter

Microelectronic Engineering 19 (1992) 409-412 Elsevier 409 Normally-off GaAs BMFET with heterojunction emitter G.Schweeger, H.L.Hartnagel Institut f...

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Microelectronic Engineering 19 (1992) 409-412 Elsevier

409

Normally-off GaAs BMFET with heterojunction emitter G.Schweeger, H.L.Hartnagel Institut fiir Hochfrequenztechnik, TH Darmstadt, W-6100 Darmstadt,Germany

Abstract Further improvements to the characteristics of vertical J F E T ' s operated in the bipolar mode (BMFET's) can be obtained when electrons entering the channel from the source are accelerated and holes in the channel are blocked from entering into the source. This is achieved by a heterojunction between highly doped source region and lowly doped channel. The fabrication technology is described and the DC characteristics for differnet temperatures are presented and explained.

1

Introduction

Vertical J F E T ' s with a very lowly doped channel can be operated like a bipolar transistor when the gate is forward biased. Then holes are injected into the channel and a virtual base is formed. Successful operation of such a device fabricated on gallium arsenide was demonstrated recently [1]. Also the theoretically predicted independence of the DC characteristics of the temperature could be shown [2]. Quite a low current amplification, a cut-off frequency of only 450 MHz, and the impossibility to switch off the drain current completely were due to the long transit time electrons need to cross the virtual base and to a large leakage between gate and source. Both effects can be improved by a heterojunction between source and channel: A higher bandgap in the source results in a barrier for holes and therefore in a reduction of the hole leakage out of the virtual base. Also, a step in the conduction band will accelerate electrons entering the channel, so that these cross the virtual base in shorter time. The source acts then as a real electron emitter. The approach is similar to the Vertical Electron Transistor presented by Mishra et al. [3], in which the channel length was chosen so that ballistic transport of electrons could have been possible. However, this mechanism was not documentated then. It was not intended to obtain ballistic transport in the presented device, so the channel length was chosen long enough to withstand a reasonable drain-source voltage. 0167-9317/92/$05.130 © 1992 - Elsevier Science Publishers B.V. All rights reserved.

410

G. Schweeger, H.L. Hartnagel / Normally-off GaAs BMFET with heterojunction emitter

2

Fabrication technology

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Figure 1: Schematical view and cross section of a heterojunction B M F E T A schematical view of the new transistor is shown in Fig. 1. The fabricated prototype transistor has only one source finger, which is completely surrounded by a p type gate. On a GaAs substrate with a doping of 101Scm-3 a 5fro thick very low doped (ND = 4 - 1014 - 1015cm -3) GaAs layer for the channel, a 100 nm thick A1GaAs layer with 30% aluminium content and a doping of 10aScm -s, a 100 nm thick layer with the same doping and a gradually decreasing aluminium content from 30% down to 0%, and finally a 100 nm thick GaAs contact layer of GaAs doped with ND = 101Scm-3 were grown by MOCVD by Epi Materials, UK. The whole wafer was covered by PECVD silicon nitride which served as a diffusion mask for the gate, which is surrounding the 5 × 100#m large source stripe. The total gate area is 50 x 150#m. To form the p-doped gate zinc was diffused into the wafer in a semi-closed graphite crucible at 620°C for one hour. A doping of NA = 3 • 1019cm -3 and a junction depth of l f m was obtained. As lateral diffusion can not be neglected an effective channel width of 3.5 - 4#m results. After the diffusion the silicon nitride was etched away, trenches were etched around the transistors to separate them electrically and a new silicon nitride layer was deposited on the top. The backside was coated with a conventional AuGeNi contact. A 3#m wide slot in the silicon nitride was etched on top of the source mesa and a AuGeNi contact was deposited. Also a T i P t A u contact was deposited onto the gate through holes in the silicon nitride. Annealing was performed at 500°C for 30 seconds, giving specific contact resistances of less than 5 . 10-69cm 2 for both p- and n-type contacts. Finally, CrAu contact pads were deposited for contacting source and gate.

G. Schweeger, H.L. Hartnagel / Normally-off GaAs BMFET with heterojunction emitter

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Figure 2: Output characteristics of a BMFET with heterojunction at the emitter at room temperature (left) and at 300oc (right) Typical output characteristics for room temperature and 300°C are given in Fig. 2. They show a remarkable steep slope in the linear operation region and fiat characteristics in the saturation regime, specially at room temperature. In contrast to homo junction BMFET's [1] the realised heterojunction BMFET is a normally-off device and shows a positive temperature coefficient of the drain current up to 300°C, which can not be observed with HBT devices [4]. This is due to the fact that up to the temperature for which a drain current flows even without minority carrier injection into the channel, the major control mechanism of the B M F E T is the potential barrier between source and drain like in a Static Induction Transistor [5]. Therefore, at low current densities and low temperatures the current gain increases with increasing drain current. At higher temperatures the thermal generation of holes creates a virtual base as if holes were injected through the gate. In this case or at high drain current levels the transistor is operated in the bipolar mode and the current gain decreases with increasing drain current, as theory predicts [6, 7]. This situation is best illustrated in Fig. 3. In spite of large variations of/3, the small signal current gain hfe has a small negative temperature coefficient in the bipolar mode. Additionally, the operation at a temperature independent bias is possible. With increasing temperature a decrease of the turn-on voltage, which is due to the barrier between source and drain, and a decrease of the avalanche breakdown voltage due to impact ionisation can be observed (cf. Fig. 2). The heterojunction between source and channel enables an improvement of the current gain compared to homo junction BMFET's. Particularly the decrease of hie with increasing drain current is less steep. This makes the near to linear amplification of larger signals

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4

Conclusion

The first realisation of a heterojunction BMFET is presented. The fabricated devices had normally-off characteristics and therefore showed a number of particularities compared to the earlier presented normally-on devices. The improvement of the current gain and specially of the high-frequency characteristics are due to the heterojunction between source and channel. As a member of the SIT family the heterojunction BMFET is ideally suited for power applications in a wide range of temperatures. Additionally to power switching, which is possible already with homojunction devices, amplification of analogue signals in a wide range of biasing conditions and up to frequencies in the low microwave range is possible. The work was supported by the Deutsche Forschungsgemeinschaft, Germany, under SFB 241.

References [1] [2] [3] [4] [5] [6] [7]

G.Schweeger et M., Electronic Letters, 27 (1991), pp.1097-98 G.Schweeger et M., 21st ESSDERC, Montreux 1991, Proc. pp. 313-316 U.Mishra et at., Electronic Letters, 20 (1984), pp.145-146 K.Fricke et M., IEEE Transa. on Electron Devices, to be published 1992 J.Nishizawa et at., IEEE Transa. on Electron Devices, 29 (1982), pp.1233-44 B.J.Baliga, IEEE Electron Device Letters, 4 (1983), pp.143-145 S.Bellone et a1., Solid-State Electronics, 26 (1983), pp.403-413