Printed circuit pack (PCP ) yield prediction

537

Applications

Printed Circuit Pack(ace) Yield Prediction T o r k y I. S u l t a n Professor, Dept. of Statistics, Kuwait University, P.O. Box 5486, Safat, Kuwait 13055

Yield prediction is important to enable prediction of full scale production, based on product design, manufacturingprocesses, and production methods. A model for yield prediction and associated cost for printed circuit pack (PCP) is given. An application for a PCP and conclusions are presented. Keywords: Yield prediction, Printed circuit pack, Productivity,

Electronic industry.

Profe~or Sultan is a Visiting Professor at Kuwait University. He was Research Scientist at Bell-Northern Research, Canada. Previous positions were in academic fields at the Teclmicai Universityof Nova Scotia, Canada, and University of Cairo, Egypt. Professor Sultan is an experienced consultant of several projects in industry. He is the author of four reference works: Information Systems, ! ~ QuantitativeMethods in Decision Making, Operations Research in Industry, and Quality Control in Industry. He is the author of many papers published in scientific journals and transactions of conferences. Professor Sultan is a Senior Member of both the American Society for Quality Control and the Institute of Industrial Engineers. He is a Professional Engineer. North-Holland Computers in Industry 7 (1986) 537-541

1. Introduction The term "yield" is widely accepted in the printed circuit pack (PCP) manufacturing industry as being the probability of acceptance of an item pass testing and to have zero or more defects. The definition does not reflect the quality of output (see Appendix 1). The definition which reflects the quality of the output is assumed. The yield in that definition is the probability of an item to pass testing and have zero defects. The objective of developing yield prediction is to establish a framework for control. Once all the factors which contribute to the yield of a product are known, and the effect which these factors have on the cost of manufacture is established, then the production process can be optimized with respect to time, cost, and quality requirements. The prediction of production yield is conceptually simple, and the relationships are not mathematically complex. The difficulty lies in obtaining valid practical input to the theoretical models developed. The predictive accuracy will depend upon this factor. Computer program is developed for use to predict the yield. In industry, after the prediction has been developed and the framework fGr control established, major emphasis will be placed on building and maintaining a database, and on correlation of process capabilities with yield fallout defect resuits in the relevant manufacturing locations.

2. Yield Prediction Process Defects in the production process can be classifted as hard or latent defects. The detection of the former depends upon the test efficiency, while the latter must be converted to hard defects by a stress screening application prior to detection. Several authors tackle the problem of stress screening [2,6-8,10].

0166-3615/86/$3.50 © 1986 Elsevier Science Publishers B.V. (North-Holland)

538

Applications

Computer~ m lnduslr~

I Component Defects I" l

Fig. 1. Defect flow diagram for yield prediction process.

The yield prediction tool is based on the values of the defects and the detection efficiency of test at each stage. Several authors attack the problem of test strategy [1,3-5,9]. The predicted yield at each stage is a function of the input defect to that stage, the generated defects by manufacturing or assembly process and the detection efficiency. Fig. 1 shows a defect flow diagram for the yield prediction process for an assembly operation with stress screening after the assembly. The remaining defects not being detected and removed will pass on to the next assembly stage.

3. PCP Yield Prediction

The PcP yield prediction model provides analysis of first pass PCP yield. A simplified flow diagram for PCP yield prediction is shown in Fig. 2. Inputs to the model are: 1. Component type and quantity 2. Component average quality level (AQL) 3. Number and type of assembly operations 4. Cost of components, assembly, rework, and scrap per PCP

5. Defect rates for PCP components 6. Defect rates for PCP assembly operations 7. Inspection efficiency 8. In-circuit test efficiency 9. Functional test efficiency. The last five parameters (5 to 9) are called control parameters, which can be varied within predefined limits to determine their sensitivity and effect on yield and costs. Outputs of the model are: 1. Predicted yield 2. Expected remaining defects for next higher assembly 3. Total cost of complete assembly for ecP. The formulation of yield expression is given in Appendix 1, while Appendix 2 is devoted to PCP yield prediction model formulation and manufacturing cost.

4. Application

Fig. 3 shows a computer printout for the yield prediction model application. The application is made to a line card.

Computers in Industry

Q1

Component 1

Q2

Component 2

T.L Sultan / PCP YieM Prediction • number and type of assembly operations • inspection efficienci3s • component and material COSt • assembly cost

I

~"

PCP Assembly

• test efficiency • test cost

• test efficiency • test cost

I I

I [

In-Circuit Test

Functional Test

+ Q3

• detected defects • rework/scrap costs

• detected defects • rework/scrap cost

Component n

f

• predicted yield • expected remaining defects • detected defects • rework/scrap cost • PCP cost

component type and quantity AQL component defect rates

Fig. 2. Yield prediction flow d i a ~ a m f o r P C P .

CIRCUIT PCP=

P&CK LIkE

TIELD

PREDICTIOI

C&RD

DEFECT

~*

EXPECTED ** COBPONENT DEFECT PER PCP

R&TR / CONPONEHTS

1000

OTY

BICROCIRCOITS TR&NSISTORS DIODES P&SSIVES TR&NSFORBEBS

~ 7 18 42 1

A0L

PARTS

0.q 1.0 1.0 1.0 1.0

b.50 0.15 1.00 0.50 13.24

~ I ~ % ~

0.0260 0.0010 0.0180 0.0210 0.0132 0.079

DEFECT RATE / 1000 OPEk.

HO. O P OPERATIONS

PROCESS

R&NU&L I N S E R T I O ~ &UTO I ~ S E R T I O m SOLDERZNG

26 46 326

1NSPECTIOH EFFICIENCY

In-CIRCUIT TEST EFFICIEHCY

80 • 80 ~ 90 ~

1.88 0.74 1.51

90 ~ 9O ~ 90 ~

**

EXPECTED ** PROCESS DEFECT PER PCP

0.0010 0.0007 O.OOq9 0.007

FOMCTIOH&L

~FFICIEJC¥

=

95

PREDICTED

YIELD

=

91

EXPECTED DEFECTS PER NEXT HIGHER &SSEBBLT

Fig. 3. PCP yield prediction.

PCP FOR = 0.0043

TOTAL

COST

PER

EXPECTED

CIRCUIT

~hLTERIAL PROCESS TEST REWORK/SCRAP

&SSEHBLT

DEFECTS

PER

PCP

PACK

= S

55.11

COST COST COST COST

= $ = $ = S = $

37.32 10.62 4.13 3.04

0.086

539

540

Applications

T h e c o m p o n e n t s of the line c a r d are microcircuits, transistors, diodes, passives, a n d transformers. T h e q u a n t i t y f r o m each c o m p o n e n t a n d the defect rate are given as i n p u t to the model. This is shown in the u p p e r section of the p r i n t o u t . T h e expected c o m p o n e n t defects p e r PeP are c a l c u l a t e d a n d given for each t y p e of c o m p o n e n t s . T o t a l figure for the e x p e c t e d c o m p o n e n t defects p e r PCP is shown as 0.079. T h e average q u a l i t y level (AQL) is also given for each t y p e of c o m p o nents. T y p e s of processes are given in the m i d d l e section of the p r i n t o u t . N u m b e r of o p e r a t i o n s , defect rate, i n s p e c t i o n efficiency a n d in-circuit test efficiency are given as i n p u t to the model. T h e e x p e c t e d process defects p e r PCP for each t y p e of process are c a l c u l a t e d from the i n p u t figures a c c o r d i n g to the model. T o t a l figure for the e x p e c t e d process defects p e r PCP is shown as 0.007. It is shown that the e x p e c t e d n u m b e r of c o m p o n e n t defects p e r PeP is m u c h higher ( a b o u t 11 times) t h a n the e x p e c t e d process defects p e r PCP. T h e last section of the p r i n t o u t shows the efficiency of the final test as input. T h e total e x p e c t e d defects p e r PeP is shown. It is the s u m of b o t h defects f r o m c o m p o n e n t s a n d processes. Also, the e x p e c t e d defects p e r PCP for the next higher a s s e m b l y stage is calculated. It is 0.0043 in this e x a m p l e , which is 5% f r o m the total e x p e c t e d defects p e r PeP. It m e a n s that 5% of the total defects is p a s s e d to the next higher a s s e m b l y stage. Also, the p r e d i c t e d yield is shown in the last sector of the p r i n t o u t as 91%. T h e cost p e r PCP is c a l c u l a t e d as $55.11. T h e cost of test, r e w o r k a n d scrap is a b o u t 13% f r o m the total cost.

Computer.~ in lndustr~

model. This d a t a b a s e should include defect rates f r o m all f a c t o r y locations relevant to the p r o d ucts b e i n g assessed.

References

[1] Allerd, A.: Why In-Circuit Is not Enough, Evaluation Engineering, November-December 1981, p. 40 ft. [2] Canfield, R.V.: Cost Effective Burn-In and Replacement Times, IEEE Transactions on Reliability, June 1975, p. 154 ff. [3] Faran, J.: Cost of Board Test and Repair for Different Testing Strategies, A T E Proceedings, January 1980, p. 59 ft. [4] Hotchkiss, J.: The Roles of In-Circuit Test and Functional Board Test in the Manufacturing Process, Annual IEEE Test Conference Proceedings, 1978, p. 296 ft. [5] Jackson, T.: Before You Buy Automatic Test Equipment: A Functional Analysis, Evaluation Engineering, November-December 1981, p. 44 ft. [6] Lawrence, M.J.: An Investigation of Bum-In Problems, Technometrics, February 1966, p. 61 ft. [7] Nguyen, D.G., and Murthy, D.N.P.: Optimal Burn-In Time to Minimize Cost for Products Sold under Warrarity, IEEE Transactions, September 1982, p. 167 ff. [8] Plesser, K.T., and Field, T.O.: Cost Optimized Bum-In Duration for Repairable Electronic Systems, IEEE Transactions on Reliability, August 1977, p. 195 ff. [9] Taschioglou, K.: Functional Board Testing: The Alternative for Increased Throughput, Electronic Packaging and Production, p. 173 ft. [10] Weiss, G.H., and Dishon, M,: Some Economic Problems Related to Bum-In Programs, IEEE Transactions on Reliability, August 1971, p. 190 ft.

Appendix 1" Formulation of Yield Expression

5. C o n c l u s i o n s T h e following conclusions m a y be d r a w n f r o m the p r e s e n t e d study. 1. P r e d i c t i o n of the m a n u f a c t u r i n g yield of new designs is p o s s i b l e given valid i n p u t s for the available models. 2. T h e yield p r e d i c t i o n m o d e l lays the f o u n d a t i o n for yield o p t i m i z a t i o n o f the p r o d u c t i o n processes, a n d a l l o c a t i o n of resources to o b t a i n m a x i m u m p a y b a c k for investment. 3. H i g h p r i o r i t y m u s t b e p l a c e d o n e s t a b l i s h i n g a d a t a b a s e for use with the yield p r e d i c t i o n

The definition of yield used by some electronic manufacturing companies is the probability of acceptance of an item. In other words, it is the probability of an item to pass tests and have zero or more defects. According to that definition, yield can be expressed as follows: Y= R + ( 1 - D), (I) where Y = Yield predication R = remaining defects after test = D ( 1 - N)

D = defects before test N ~ test efficiency. This definition does not reflect the quality of the output. Yield

Computers in Industry

T.I. Sultan / PCP Yield Prediction

90

0=0.1

where Y = predicted yield of PeP at functional test R = remaining defects per PCP after functional test D = defect rate per PCP before functional test.

80

D=0.2

R = D ( 1 - NF), o= (~+o.),

Yield %

541

(2) (3)

where D=0.3

70

Dc = expected component defects per PCP

= ~CiOi, D=0.4

(4)

i--i

60

where quantity of type i components in PCp defect rate for component i efficiency of functional test expected assembly process defects per PeP passed after in-circuit test

G= Di= Ur=

D.= D=0.6

40

60

I 70

I 80

I 90

= [i=~lP, S i ( 1 - N i ) l ( 1 - N c ) ,

(5)

Test efficiency %

Fig. 4. Relation between yield and test efficiency for different levels of defect rates. is 100% in two cases; either there is no test ( N = 0) or there are no defects. The definition which reflects the quality of the output is assumed. The yield in that definition is the probability of an item to pass tests and have zero defects. The expression of yield is as follows:

where P~ = S~ = N~ = Nc = Nv =

number of assembly operations i on PCP defect rate per assembly operation inspection efficiency for assembly operation i in-circuit test efficiency functional test efficiency.

Manufacturing Cost

PCP

y = R + ( 1 - D)e -R, where Y = Yield prediction R = remaining defects after test = D(1- N) D ffi defects before test N ffi test efficiency e = 2.718. This definition reflects the quality of the output. Yield is 100% in one case only: if there are no defects. If there is no text ( N = 0), yield will be a low figure. Fig. 4 shows a sensitivity analysis of that model. At lower defect rates, yield tends to be constant irrespective of the test efficiency. For higher defect rates, yield will decrease by increasing test efficiency.

A p p e n d i x 2: PCP Y i e l d P r e d i c t i o n M o d e l }'=R + ( 1 - D)e-~,

(1)

The PeP manufacturing cost can be estimated from the following equation:

Cpce = C,,t + Cas + Cts + DC~,,,

(6)

where

Cece = C,m Ca,

Ct~ Crw D

total cost per PcP = cost of components and material per PCP = cost of assembly process per PCP = cost of test per PCP = cost of rework/scrap per defect = total detected defects per PCP.

o=

P,S, + i =1

i--1

i=l

+ (1 = N ) ( I - N~)IN~} + D~N~.

(7)