The effect of a buried layer on the collector breakdown voltages of bipolar junction transistors

The effect of a buried layer on the collector breakdown voltages of bipolar junction transistors

274 WORLD ABSTRACTS ON MICROELECTRONICS failures. W L SCOTT P O Elec Engnrs J 65, Part 4, J a n u a r y (1973) P a r t s 1 a n d 2 of this articl...

114KB Sizes 1 Downloads 80 Views

274

WORLD

ABSTRACTS

ON

MICROELECTRONICS

failures. W L SCOTT P O Elec Engnrs J 65, Part 4, J a n u a r y (1973) P a r t s 1 a n d 2 of this article described t h e f u n d a m e n t a l p h e n o m e n a involved in contact switching, t h e general principles of q u e n c h i n g a n d t h e identification a n d e h m l n a t i o n of potential contact failures T h i s was taken to t h e stage at w h i c h t h e basic circuit configurations h a d been c o m p l e t e d , t h e types of s w i t c h i n g devices allocated a n d contact materials selected appropriate to t h e load c u r r e n t a n d t h e e s t i m a t e d n u m b e r of operations in t h e w o r k i n g life of t h e e q u i p m e n t T h i s part gives t h e d e s i g n a p p r o a c h to t h e provision of q u e n c h e s s h o w n necessary by circuit analysis a n d describes t h e progressive d e v e l o p m e n t of British Post Office (B P O ) s t a n d a r d types A d e q u a t e q u e n c h i n g is essential, a n y s h o r t c o m i n g s result in service h a z a r d s a n d m a y involve costly detection a n d remedial action A n outline of laboratory tests carried o u t on s w i t c h i n g devices a n d e q u i p m e n t m o d e l s to check a n d s u p p l e m e n t t h e designers' theoretical work D e s i g n a n d p r o d u c t i o n are inevitably s u b j e c t to constraints, a n d decisions often involve c o m p r o m i s i n g b e t w e e n conflictm g factors Service investigations are described to give s o m e indication of t h e difficulties w h i c h face t h e designer, t h e m a n u f a c t u r e r a n d t h e field e n g i n e e r m resolving ~ h a t m a y appear to be relatively simple failures

The BS 9000 s y s t e m for electronic components of assessed quality. K H CLARKSTONE P 0 Elec Engnrs J . 65, P a r t 4, J a n u a r y (1973), p 228 T h e BS 9000 s c h e m e provides a n a t l o n a l l y - r e c o g m z e d s y s t e m for t h e specification a n d quality a s s e s s m e n t of electronic c o m p o n e n t s T h e s c h e m e Is n o w b e g i n n i n g to be applied in t h e s e m i c o n d u c t o r a n d resistor industries, a n d in t h e n e a r f u t u r e to o t h e r c o m p o n e n t s as well Its national u s e s h o u l d lead to a useful r e d u c t i o n in t h e variety of specifications a n d Inspection a r r a n g e m e n t s that c o m p o n e n t m a n u f a c t u r e r s have hitherto b e e n r e q u i r e d to m e e t T h e a c c o m p a n y i n g benefits of m o r e e c o n o m i c p r o d u c t i o n a n d m o r e consistent quality are of value to b o t h e q u i p m e n t m a n u f a c t u r e r s a n d to t h e British Post Office

Epoxy package increases IC reliability at no extra cost. E R HNATEK Electron Engng, F e b r u a r y (1973), p 66 A n e w p h e n o h c - c u r e d epoxy can m a k e t h e familiar D I P - - u s e d for m o s t low-cost industrial a n d c o n s u m e r I C s - - a s reliable In c o m m e r c i a l applications as a herm e t m a l l y sealed package T h e r e is also a s t r o n g possibility t h a t t h e package could be considered for military applications

Investigations on "doping stacking fault" pyramids. F G VIEWEG-GUTBERLET S o h d S t Electron 16 (1973), p 191 So-called " d o p i n g stacking fault" p y r a m i d s discovered in S b - d o p e d Czocbralski pulled silicon single crystals have b e e n s h o w n to be invisible In t h e electron i m c r o s c o p e a n d in X - r a y t o p o g r a p h y Several h y p o t h e s e s were e x a m i n e d in order to find an explanation for t h e n a t u r e of t h e faults T h e idea t h a t planes of foreign a t o m s (Sb) m i g h t be built into t h e crystal, or t h a t a single-plane stacking fault (with R = --¼1111]) m i g h t

AND

RELIABILITY

be p r e s e n t h a d to be a b a n d o n e d T h e a s s u m p t i o n of intrinsic/extrinsic stacking fault pairs c o m p o s m ~ the p y r a r m d s appears to be m o s t likely T h e possibility of t h e occurrence of d o p i n g stacking faults together w i t h " n o r m a l " stacking fault p y r a m i d s in epttaxml wafers l~ discussed

The effect of a buried layer on the collector breakd o w n voltages of bipolar junction transistors. F W HEWLETT, J r , F A LINDHOLM anti A J BRODERSEN Solid S t Electron 16 (1973), p 453 T h e p r e s e n c e of a b u r i e d layer m a y cause t h e value of t h e collector b r e a k d o w n voltages, B V c E s a n d B V c B o , to be considerably less t h a n existing theory predicts W e descrlbe an effect t e r m e d p r e m a t u r e p u n c h - t h r o u g h that accounts for the o b s e r v e d behavior Expressions are derived for t h e p r e m a t u r e p u n c h - t h r o u g h v o l t a g e , B V p v T a n d t h e thickness, (~Vepl)opt, of t h e epltaxlal collector that m a x i m i z e s this voltage a n d h e n c e t h e usable region of device operation T h e expression for BVpp~, Is s h o w n to be consistent with m e a s u r e m e n t s taken on transistors fabricated in o u r laboratory

Avalanche breakdown voltage of multiple epitaxial p n j u n c t i o n s . R A SUNSHINE a n d J. AssouR Solid S t Electron 16 (1973), p 459 Calculation of the peak electric field at b r e a k d o w n for t w o - s i d e d step j u n c t i o n s w i t h arbitrary d o p i n g levels on each side is p r e s e n t e d T h e theoretical predictions are c o m p a r e d with t h e results of e x p e r i m e n t a l b r e a k d o w n studies of a series of carefully p r e p a r e d a n d characterized h i g h voltage diodes Calculations based u p o n t h e lomzatlon coefficients determ i n e d by V a n Overstraeten a n d D e M a n are s h o w n to be in better a g r e e m e n t with e x p e r i m e n t t h a n those based on t h e ionization coefficients of L e e et aI

Electrical effects of clustered defects in heteroepitaxial Si f i l m s . E P EERNISSE a n d C B NORRIS Sohd S t Electron 16 (1973), p 315 O u r work indicates that t h e behavior of injected majority a n d m i n o r i t y carriers in representative Sl/spmel s a m p l e s is d o m i n a t e d b y deep-level defects that are agglomerated into defect clusters rather t h a n b e i n g u n i f o r m l y distributed in t h e v o l u m e of t h e S1 layer Since these defect clusters will be s u r r o u n d e d by space-charge regions, t h e resulting trap o c c u p a n c 3 - d e p e n d e n t potential barriers result in slow, n o n - e x p o n e n t i a l majority carrier t r a p p i n g effects b u t s u b n a n o s e c o n d m i n o r i t y carrier lifetimes A c c u r a t e n u m e r i c a l calculations of t h e electrical properties of a s h e e t of clustered defects are s h o w n to agree with detailed m e a s u r e m e n t s at 90 a n d 3 0 0 ° K of t h e t r a n s i e n t cond u c t a n c e decay m p - a n d n - t y p e films following p u l s e d carrier Injection f r o m electron b o m b a r d m e n t . A signific a n t conclusion of t h e theoretical calculations is that t h e electrical behavior of a defect cluster is m s e n s m v e to a n y of t h e m o d e l p a r a m e t e r s c h o s e n as long as t h e r e are a sufficient n u m b e r of defects to completely deplete the material in t h e vlelmty of t h e defect plane O u r results s h o w t h a t t h e observed s h o r t m i n o r i t y carrier lifetimes, l o n g - t e r m majority carrier t r a p p i n g effects a n d mobility t e m p e r a t u r e d e p e n d e n c e s can all be explained b y t h e