100k gate array and chip-to-system design

Product news lOOk gate array and chip-to-system design An array logic device with 100k usable gates and a 'Modular Design Environment' allowing for the integrated design of both semicustom ICs and &SIC-based systemlevel solutions have been announced by LSI Logic. The LCA100K Compacted Array Plus series combines a 0.7pro channel length HCMOS process with three-layer metal interconnection technology. This uses a more compact version of the Channel-Free architecture introduced in 1985. Three masterslice options are available, providing a range of from 139k to 237k equivalent gates which can be configured to implement circuits up to the 100k gate complexity level. In a memory configuration, quoted static RAM access time is less than 15 ns; gate delay is 460 ps through a two-input NAND gate. Target applications for the devices include high-performance digital signal and image processing, parallel processing, artificial intelligence and speech recognition. Software tools to assist the array designer include an interactive graphics interface and floor planning tools, logic and memory compilers, libraries of functional building blocks, hardware accelerators and simulator algorithms--combined these form LSI L o g i c ' s Modular Design Environment. The Modular Design Environment allows design not only of cell-based semicustom LSI and VLSI devices, including devices with user-defined functions, but of multichip ASICbased systems with up to one million gates, says LSI Logic. The package is made up of three major elements: a 'logic integrator', a 'silicon integrator' and a 'system integrator'. The logic integrator can be thought of as an 'entry port' accommodating basic single-chip standard cell designs, says LSI Logic. The silicon integrator is an engineering software system providing design analysis and performance measurement of complex semi-

Vol 12 No 2 March 1988

VRTX extends to multiprocessors A multiprocessing version of the VRTX (virtual realtime executive) operating system, known as MPV, has been launched by Ready Systems (formerly Hunter & Ready) of the USA. MPV is an extension of VRTX designed for use in embedded microprocessor applications -instrumentation, aerospace, communications and military and factory automation etc. -- that require communication and synchronization between multiple processors. Currently processors of the 68000 family are supported. For use in shared-memory multiprocessor environments using VMEbus, Multibus or various proprietary buses, MPV provides a software interface that 'hides' the hardware boundaries between processors, says the developer, making them appear to the user as one processor. System calls include services such as interprocessor

message passingand synchronization, global object naming, global memory and resource management, remote procedure calls and initialization. Marketed as an 'off-the-shelf' software product, MPV can be used in different hardware and software configurations without modifications. Its layered architecture supports different communication protocols and physical links between nodes. Currently available versions of the operating system are MPV/68000, MPV/68010 and MPV/68020. These can be combined with other Ready Systems components including VRTX32, IOX (I/O executive) and FMX (file management executive), and are supported by the Tracer realtime debugger. (Ready Systems, 449 Sherman Avenue, Palo Alto, CA 94306, USA. Tek (415) 326-2950. Ready Systems Europe, 16 Bis Rue Grange Dame Rose, Velizy-Villacoublay, France) []

custom ICs, and can be used to design new customer-specific functional blocks; at present this package supports designs with gate densities from 10k to 70k, but it will be extended to cover the LCA100K in due course. The system integrator provides what LSI Logic describes as a 'new concept' in design modelling: a topdown methodology for designing at the systems rather than the circuit level, this process being integrated with the chip-level silicon integrator. The system-level package provides an electronic silicon breadboarding facility, with behavioural modelling and mixed-mode gate-level simulation of multichip all-semicustom or mixed semicustom-and-standard systems. Modular Design Environment sofware is written in c and runs on a variety of workstations and mainframes under Unix, VMS or VM/CMS. (LSI Logic Corp., 1551 McCarthy Blvd., Milpitas, CA, USA. Tek (408) 433-8000. LSI Logic Ltd, Grenville Place, The RinD Bracknell, Berkshire RG12 1BP, UK. Tel: (0344) 426544) []

Parallel transputers for Sun/3 workstation Parallel processing applications or transputer software development can be performed under Sun Unix with the NT1000 computing platform from Niche Technology. Up to 32 transputer modules, each with up to 16 Mbyte of local memory, can be accommodated on the system motherboard which plugs directly into the VMEbus backplane of the Sun/3 workstation. Intertransputer communication is via 20 Mbit s-1 serial links. The transputer networks are software configurable to function as a multiprocessor array of single processors. Up to eight platforms can be used with a single 12-slot Sun chassis. 'Finely tuned' device drivers, says Niche Technology, are integrated into the host operating system, enabling transparent multiboard capability. (Niche Technology Ltd, Jigsaw Business Centre, Centre Gate, Colston Avenue, Bristol BS1 4TR, UK. Tel: (0272) 298034) []

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