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4112. Direct, electron lithographic fabrication of silicon devices and circuits. (USA)
Classified abstracts 4108-4114 positioning system and a high power X-ray source with a rotary Al target operated at more than 20 kW electron-beam input power. The characteristic X-ray has been irradiated on a wafer through a contractile vacuum pipe. Using an exposure test, the system functions have been confirmed as a fine pattern replicating system.
(Japan) S Yamazaki
et al, J Vuc Sci Technol, 15 (3), 1978, 987-991.
35 4108. Alignment of X-ray lithography masks usinganewinterferometric technique-experimental results. (USA) A new interferometric alignment technique has been developed that is compatible with both photolithography and X-ray lithography, and should be capable of a superposition precision of the order of 100’. The operational features of the technique and experimental results are described. With gratings of IO pm spatial period a superposition precision 11000 A has been demonstrated, and with gratings of 1.2 pm spatial period a superposition precision of about 200 A has been achieved. S Austin et al, J Vat Sci Technol, 15 (13), 1978, 984-986.
with rapid turnaround to determine the proper exposures for the various gate lengths was employed. The pattern evaluation was confirmed by resist exposure studies in conjunction with SEM examination. Evaluation of the test pattern together with corrections for the GaAs substrate backscatter and proximity effect allowed control of the gate lengths to 510% over the entire slice. The gates were tapered at the mesa edge to prevent constriction of the resist over the step. The resist used was polymethyl methacrylate (PMMA) with a nominal thickness of 7500 8, and the developed pattern served as the liftoff mask for 4000-5000 A of aluminum gate metallization. The nominal slice size used for these runs was slightly greater than I cm* (420 x 420 mil*) and up to 588 devices were patterned in a single pumpdown. The exposure time required per slice, including stage step and alignment, was 6 min. Both small signal and power GaAs FET’s have been fabricated with e-beam defined gates. Small signal devices with 0.75 pm gate lengths had 2.0 dB minimum noise figures with 10 dB gain at 9 GHz. Power devices with 4800 pm total gate width and 1 pm gate length had up to 4.1 W output power at 8 GHz with 4 dB gain. T G Blocker et al, J Vuc Sci Technol, 15 (3), 1978, 965-968.
35 4109. Fabrication of integrated injection logic using e-beam lithography. (USA) Integrated injection logic (12L) gates have been fabricated using electron-beam lithography, ion implantation, and advanced 12L design technology. Minimum line widths of I .25 pm were used to delineate structures five times smaller in area than obtained with conventional design rules. Improved geometry control was achieved by using shallow diffusions and thin epi (-I2 pm). PBS positive resist was used to pattern and etch oxides and T1309 negative resist was used to mask etching of AljSi and AI:‘Cu metallizations. Thick PMMA was used as an implant mask for 300 keV p- intrinsic base implant. Chip-by-chip alignment of 2.5 x 2.5 mm2 fields yielded level to level registration accuracy of 0.2-0.4 pm. Using a 25-stage ring oscillator as a test vehicle, gate delays of -6 ns at 100 PA/gate have been measured on 5-collector, n+ guard ring device structures. These devices also yielded a speed-power product five times lower than that of similar conventionally sized devices. S A Evans et al, J Vat Sci Technol, 15 (3). 1978, 969-972:
53 4112. Direct, electron lithographic fabrication of silicon devices and circuits. (USA) The Bell Laboratories Electron Beam Exposure System (EBES) together with sensitive electron resists have been used to produce low-noise microwave bipolar transistors with features of 1 pm and n-channel MOS circuits, such as 4096-bit random access memories with minimum dimensions of 2 pm. Both negative and positive resists were used. The negative resist was poly (glycidyl methacrylate-coethyl acrylate) (COP) and the positive resist was poly (butene-lsulfone) (PBS). In some cases, the device processing required modification to accomodate the properties of the electron resist used. The transfer of the resist patterns into the circuit material employed wet and dry etching processes. Unlike other electron-beam lithographic systems which require chip-by-chip realignment procedure, EBES realigns the wafer at three points only. The results show a level registration of within -$ pm. L D Yau and L R Thibault, J Vnc Sci Technol, 15 (3). 1978, 960-964.
35 4110. Design of a medium-power X-ray-lithography system. (USA) A medium-power X-ray-lithography system has been developed. The system includes an inexpensive stationary water-cooled X-ray source and a modified Cobilt aligner system. The exposure system is capable of priting I pm lines with an edge accuity of 2000 8, over a 5 cm dia wafer. The alignment is compatable with this tolerance of line definition. The X-ray source uses a defocused electron beam on a water-cooled anode. For cooling purposes the anode is a thin copper plate with an evaporated aluminum film. The IO kV electron beam creates a ~1 cm dia X-ray source able to handle more than I kW of power without detrimental effects on the aluminum film. The system uses an electrostatic shield to prevent over heating a 25 pm thick beryllium vacuum window by stray electron bambardment. The Xrays pass through the beryllium window into a helium atmosphere where they expose the wafer through the X-ray mask. The wafer is printed with the mask in contact to avoid alignment problems arising from wafer warpage. In this geometry the pattern to wafer distance is kept constant at 3 pm or less which allows the use of the large X-ray source and, thus, the high X-ray flux. G P Hughes, J Vuc Sci Technol, 15 (3), 1978, 974-976.
35 4113. Two-phase high-density charge coupled devices fabricated by electron-beam lithography. (USA) One hundred and 28-bit, two-phase, high-density CCD linear shift registers with double-level polysilicon overlapping gate electrodes have been fabricated using electron-beam lithography for all levels of pattern delineation. The polysilicon gate electrodes are 0.15 mil long and the channel widths on two shift registers are 0.25 and 0.06 mil. The critical registration accuracy is + 1500 A. These represent cell sizes of 0.1 mil’ corresponding to packing densities of IO-20 million bits/in. Charge transfer efficiency with V, = 10 V and without fat zero is at least 0.9997 for 0.05 mi12 shift register. The low, uniform leakage current (I.54 nA/cm2) observed in CCD’s fabricated by electron-beam lithography compares favourably with those fabricated using optical lithography and larger geometry sizes. This indicates that no significant electron beam induced residual damage is present in these CCD structures. P K Chatterjee, J Vat Sci Technol, 15 (3), 1978, 957-959.
35 4111. Electron-beam fabrication of submicron gates for GaAs FET’s (USA) High-performance GaAs FET’s with nominal gate lengths of 0.5, 0.75 and 1 .O pm have been fabricated with electron-beam-lithography techniques. A hybrid process was developed which only required e-beam definition of the critical gate level and was otherwise compatible with the fabrication process developed for conventional optically defined gates. The source-drain metallization mask was modified to include alignment marks for the gate level and the source-drain metallization was augmented to give marks after alloying with acceptable secondary electron contrast against the GaAs background: 12000 8, registration was routinely achieved over the 80 X 80 mi1’ field. A test pattern which could be examined optically
35 4114. Chrome mask fabrication with electron-beam lithographic system. (USA) An automated electron-beam lithographic system, Vector Scan-I, was designed to fabricate devices beyond the optical limit. When the resolution requirement is only moderate; i.e. approximately 1 pm, VS-1 can be used to fabricate chrome masks for conventional optical processing. VS-l-fabricated chrome masks have better pattern defintion and extremely fast turnaround time. Furthermore, the VS-I electron-beam system can generate pattern sizes from a given design to fit different experimental needs. The capability of accommodating many different designs on a single mask greatly reduces the device fabrication effort. Examples of chrome masks fabricated by the VS-1 electron-beam system will be described. These masks are routinely used for fabricating magnetic bubble devices. Large chips can be obtained by stitching several fields together. C H Ting et al, J Vat Sri Technol, 15 (3). 1978, 948-952. 329
(Japan) S Yamazaki
et al, J Vuc Sci Technol, 15 (3), 1978, 987-991.
35 4108. Alignment of X-ray lithography masks usinganewinterferometric technique-experimental results. (USA) A new interferometric alignment technique has been developed that is compatible with both photolithography and X-ray lithography, and should be capable of a superposition precision of the order of 100’. The operational features of the technique and experimental results are described. With gratings of IO pm spatial period a superposition precision 11000 A has been demonstrated, and with gratings of 1.2 pm spatial period a superposition precision of about 200 A has been achieved. S Austin et al, J Vat Sci Technol, 15 (13), 1978, 984-986.
with rapid turnaround to determine the proper exposures for the various gate lengths was employed. The pattern evaluation was confirmed by resist exposure studies in conjunction with SEM examination. Evaluation of the test pattern together with corrections for the GaAs substrate backscatter and proximity effect allowed control of the gate lengths to 510% over the entire slice. The gates were tapered at the mesa edge to prevent constriction of the resist over the step. The resist used was polymethyl methacrylate (PMMA) with a nominal thickness of 7500 8, and the developed pattern served as the liftoff mask for 4000-5000 A of aluminum gate metallization. The nominal slice size used for these runs was slightly greater than I cm* (420 x 420 mil*) and up to 588 devices were patterned in a single pumpdown. The exposure time required per slice, including stage step and alignment, was 6 min. Both small signal and power GaAs FET’s have been fabricated with e-beam defined gates. Small signal devices with 0.75 pm gate lengths had 2.0 dB minimum noise figures with 10 dB gain at 9 GHz. Power devices with 4800 pm total gate width and 1 pm gate length had up to 4.1 W output power at 8 GHz with 4 dB gain. T G Blocker et al, J Vuc Sci Technol, 15 (3), 1978, 965-968.
35 4109. Fabrication of integrated injection logic using e-beam lithography. (USA) Integrated injection logic (12L) gates have been fabricated using electron-beam lithography, ion implantation, and advanced 12L design technology. Minimum line widths of I .25 pm were used to delineate structures five times smaller in area than obtained with conventional design rules. Improved geometry control was achieved by using shallow diffusions and thin epi (-I2 pm). PBS positive resist was used to pattern and etch oxides and T1309 negative resist was used to mask etching of AljSi and AI:‘Cu metallizations. Thick PMMA was used as an implant mask for 300 keV p- intrinsic base implant. Chip-by-chip alignment of 2.5 x 2.5 mm2 fields yielded level to level registration accuracy of 0.2-0.4 pm. Using a 25-stage ring oscillator as a test vehicle, gate delays of -6 ns at 100 PA/gate have been measured on 5-collector, n+ guard ring device structures. These devices also yielded a speed-power product five times lower than that of similar conventionally sized devices. S A Evans et al, J Vat Sci Technol, 15 (3). 1978, 969-972:
53 4112. Direct, electron lithographic fabrication of silicon devices and circuits. (USA) The Bell Laboratories Electron Beam Exposure System (EBES) together with sensitive electron resists have been used to produce low-noise microwave bipolar transistors with features of 1 pm and n-channel MOS circuits, such as 4096-bit random access memories with minimum dimensions of 2 pm. Both negative and positive resists were used. The negative resist was poly (glycidyl methacrylate-coethyl acrylate) (COP) and the positive resist was poly (butene-lsulfone) (PBS). In some cases, the device processing required modification to accomodate the properties of the electron resist used. The transfer of the resist patterns into the circuit material employed wet and dry etching processes. Unlike other electron-beam lithographic systems which require chip-by-chip realignment procedure, EBES realigns the wafer at three points only. The results show a level registration of within -$ pm. L D Yau and L R Thibault, J Vnc Sci Technol, 15 (3). 1978, 960-964.
35 4110. Design of a medium-power X-ray-lithography system. (USA) A medium-power X-ray-lithography system has been developed. The system includes an inexpensive stationary water-cooled X-ray source and a modified Cobilt aligner system. The exposure system is capable of priting I pm lines with an edge accuity of 2000 8, over a 5 cm dia wafer. The alignment is compatable with this tolerance of line definition. The X-ray source uses a defocused electron beam on a water-cooled anode. For cooling purposes the anode is a thin copper plate with an evaporated aluminum film. The IO kV electron beam creates a ~1 cm dia X-ray source able to handle more than I kW of power without detrimental effects on the aluminum film. The system uses an electrostatic shield to prevent over heating a 25 pm thick beryllium vacuum window by stray electron bambardment. The Xrays pass through the beryllium window into a helium atmosphere where they expose the wafer through the X-ray mask. The wafer is printed with the mask in contact to avoid alignment problems arising from wafer warpage. In this geometry the pattern to wafer distance is kept constant at 3 pm or less which allows the use of the large X-ray source and, thus, the high X-ray flux. G P Hughes, J Vuc Sci Technol, 15 (3), 1978, 974-976.
35 4113. Two-phase high-density charge coupled devices fabricated by electron-beam lithography. (USA) One hundred and 28-bit, two-phase, high-density CCD linear shift registers with double-level polysilicon overlapping gate electrodes have been fabricated using electron-beam lithography for all levels of pattern delineation. The polysilicon gate electrodes are 0.15 mil long and the channel widths on two shift registers are 0.25 and 0.06 mil. The critical registration accuracy is + 1500 A. These represent cell sizes of 0.1 mil’ corresponding to packing densities of IO-20 million bits/in. Charge transfer efficiency with V, = 10 V and without fat zero is at least 0.9997 for 0.05 mi12 shift register. The low, uniform leakage current (I.54 nA/cm2) observed in CCD’s fabricated by electron-beam lithography compares favourably with those fabricated using optical lithography and larger geometry sizes. This indicates that no significant electron beam induced residual damage is present in these CCD structures. P K Chatterjee, J Vat Sci Technol, 15 (3), 1978, 957-959.
35 4111. Electron-beam fabrication of submicron gates for GaAs FET’s (USA) High-performance GaAs FET’s with nominal gate lengths of 0.5, 0.75 and 1 .O pm have been fabricated with electron-beam-lithography techniques. A hybrid process was developed which only required e-beam definition of the critical gate level and was otherwise compatible with the fabrication process developed for conventional optically defined gates. The source-drain metallization mask was modified to include alignment marks for the gate level and the source-drain metallization was augmented to give marks after alloying with acceptable secondary electron contrast against the GaAs background: 12000 8, registration was routinely achieved over the 80 X 80 mi1’ field. A test pattern which could be examined optically
35 4114. Chrome mask fabrication with electron-beam lithographic system. (USA) An automated electron-beam lithographic system, Vector Scan-I, was designed to fabricate devices beyond the optical limit. When the resolution requirement is only moderate; i.e. approximately 1 pm, VS-1 can be used to fabricate chrome masks for conventional optical processing. VS-l-fabricated chrome masks have better pattern defintion and extremely fast turnaround time. Furthermore, the VS-I electron-beam system can generate pattern sizes from a given design to fit different experimental needs. The capability of accommodating many different designs on a single mask greatly reduces the device fabrication effort. Examples of chrome masks fabricated by the VS-1 electron-beam system will be described. These masks are routinely used for fabricating magnetic bubble devices. Large chips can be obtained by stitching several fields together. C H Ting et al, J Vat Sri Technol, 15 (3). 1978, 948-952. 329