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4852097 Method for forming data block protection information for serial data bit sequences by means of cyclical binary codes
F.xpcn 5"ytn,msWilh App//cat/ost, Vol. l, pp. V-VIII, 1990
09574174/90 $3.00 + L00 O 1990 Pergamon Press plc
Printed in the USA.
NEW PATENTS
This Section contains abstracts and, where appropriate, illustrations of recently issued United States patents and published patent applications filed from over 30 countries under the Patent Cooperation Treaty. This information was obtained from recent additions to the Pergamon PATSEARCH * online database in accordance with interest profiles developed by the Editors. Further information about Pergamon PATSEARCH * can be obtained from Pergamon Orbit InfoLine Inc., 8000 Westpark Drive, McLean, Virginia 22102 U.S.A. Copies of complete patents announced in this Section are available from Pergamon Orbit InfoLine Inc. for $8 per copy. Payment with order is required. Orders outside North America add $2 for air postage. Order by patent number for Pergamon Orbit InfoLine only.
4850104
4852097
SYSTEM FOR CONFIGURING, AUTOMATING AND CONTROLLING OPERATIONS PERFORMED ON PCBS AND OTHER PRODUCTS
METHOD FOR FORMING DATA BLOCK PROTECTION INFORMATION FOR SERIAL DATA BIT SEQUENCES BY MEANS OF CYCLICAL BINARY CODES
John L Matrone, Ronald L Stamp, Douglas Babcock assigned to CIMM Inc
Frithjof V Sichart, Christian Hollstein, Klaus Kirehberger, Muenchen, Federal Republic Of Germany assigned to Siemens AktiengeselIschaft
A method and apparatus for configuring, automating and controlling the various operations performed on different products, e.g. the testing and/or repair of printed circuit boards, is presented. The apparatus includes one or more work stations and conveyor units to transport products and other components required to perform the operations on such products between such stations. The products are mounted in standardized carriers which facilitate intermixing different sizes and shapes of products without requiring adjustment to the conveyor units. The other components are adapted to also be transportable by the same conveyor units. The apparatus further includes buffering stages associated with each station for temporarily storing products and other components, and a distributed control system to facilitate the parallel processing of different types of products in accordance with a dynamic priority rating system and a preemptive scheduling technique.
A data block protection information code word (BSI) is formed by division of a message polymonial representing a data bit sequence (D) by a generator polynomial representing a cyclical binary code. Registers are arranged in register chains in a coder unit provided for this purpose with a polynomial ordinal number being allocated to every register representing a member of the binary code. Given the presence of a term at the ordinal corresponding to the registers (R) of the respective register chains (RK) missing in the polynomial ordinal seris, a respective logic element (V) is inserted to which an operation information is supplied, said operation information being formed in a means for the formation of the operation information (EBV) by parallel processing of a plurality of data bits together with information at the outputs of the registers (R) corresponding to the highest polynomial ordinals. As a result thereof, the processing speed of a coder unit is reduced, and thus, making possible the use of programmable or computer-controlled coder units with high speed data transmission rates.
V
09574174/90 $3.00 + L00 O 1990 Pergamon Press plc
Printed in the USA.
NEW PATENTS
This Section contains abstracts and, where appropriate, illustrations of recently issued United States patents and published patent applications filed from over 30 countries under the Patent Cooperation Treaty. This information was obtained from recent additions to the Pergamon PATSEARCH * online database in accordance with interest profiles developed by the Editors. Further information about Pergamon PATSEARCH * can be obtained from Pergamon Orbit InfoLine Inc., 8000 Westpark Drive, McLean, Virginia 22102 U.S.A. Copies of complete patents announced in this Section are available from Pergamon Orbit InfoLine Inc. for $8 per copy. Payment with order is required. Orders outside North America add $2 for air postage. Order by patent number for Pergamon Orbit InfoLine only.
4850104
4852097
SYSTEM FOR CONFIGURING, AUTOMATING AND CONTROLLING OPERATIONS PERFORMED ON PCBS AND OTHER PRODUCTS
METHOD FOR FORMING DATA BLOCK PROTECTION INFORMATION FOR SERIAL DATA BIT SEQUENCES BY MEANS OF CYCLICAL BINARY CODES
John L Matrone, Ronald L Stamp, Douglas Babcock assigned to CIMM Inc
Frithjof V Sichart, Christian Hollstein, Klaus Kirehberger, Muenchen, Federal Republic Of Germany assigned to Siemens AktiengeselIschaft
A method and apparatus for configuring, automating and controlling the various operations performed on different products, e.g. the testing and/or repair of printed circuit boards, is presented. The apparatus includes one or more work stations and conveyor units to transport products and other components required to perform the operations on such products between such stations. The products are mounted in standardized carriers which facilitate intermixing different sizes and shapes of products without requiring adjustment to the conveyor units. The other components are adapted to also be transportable by the same conveyor units. The apparatus further includes buffering stages associated with each station for temporarily storing products and other components, and a distributed control system to facilitate the parallel processing of different types of products in accordance with a dynamic priority rating system and a preemptive scheduling technique.
A data block protection information code word (BSI) is formed by division of a message polymonial representing a data bit sequence (D) by a generator polynomial representing a cyclical binary code. Registers are arranged in register chains in a coder unit provided for this purpose with a polynomial ordinal number being allocated to every register representing a member of the binary code. Given the presence of a term at the ordinal corresponding to the registers (R) of the respective register chains (RK) missing in the polynomial ordinal seris, a respective logic element (V) is inserted to which an operation information is supplied, said operation information being formed in a means for the formation of the operation information (EBV) by parallel processing of a plurality of data bits together with information at the outputs of the registers (R) corresponding to the highest polynomial ordinals. As a result thereof, the processing speed of a coder unit is reduced, and thus, making possible the use of programmable or computer-controlled coder units with high speed data transmission rates.
V