A Microprocessor-Based Control Strategy for PWM Inverters

Copyright © IFAC Control in Power Electronics and Electrical Drives . Lausanne . Switzerla nd . 1983

PWM AND FAILURE DETECTION

A MICROPROCESSOR-BASED CONTROL STRATEGY FOR PWM INVERTERS M. G. Jayne, A. B. Williams and P. D. Davies Department of Electrical and Electronic Engineering, The Polyt echnic of Wales, Treforest, Mid. Glamorgan, UK

Abstract. This paper is particularly concerned with thelimplementation of a proven pulse-width-modulated (p.w.m.) control strategy for the speed control of induction motors, by means of microprocessor control techniques. The design philosophy adopted is software-based because it was thought that such an approach offered improved flexibility of design when compared with a hardware-based approach, which might use dedicated hardware for multiply, divide and sine in the form of a calculator chip. INTRODUCTICN

to a frequency lower than that achieved with a sinusoid modulation signal. (ii) A more definitive expression for pulse width calculation is obtained which can be simply realised using microprocessors. (iii)At high carrier/modulation frequency ratios the output spectrum will approximate to that of the preferred triangle/sine techniques.

Theoretically the most suitable method of varying the speed of an induction motor would be to vary the frequency of the a.c. supply since this does not affect the fundamental advantages of the over-all system. In achieving this aim, the benefits of pulse-width-modulation, in application to variable speed a.c'2~ixes have been expanded by several authors. ' ,

ANALYSIS OF P.W.M. WAVEFORM

In particular the p.w.m. technique achieves both frequency and voltage control in a single set of power modulators. When powered from a battery, as in electric vehicles, the system is fully regenerative without the need for additional components. Further, with the correct choice of the number of pulses per cycle, the technique can be applied at both low frequencies (below 1Hz) and high frequencies (above 100 Hz).

The asymetric p.w.m. process adopted, basically entails the comparison of an isosceles triangular carrier wave with a stepped sinusoidal modulating wave, where the steps in the modulating wave are synchronised with the apices of the triangular wave as illustrated in Fig. 1. The widths of the modulated pulses can be described by Tn

There are many differing forms of p.w.m. and each will demonstrate different characteristics. Analogue techniques relied mainly upon the comparison of two different waveforms.

= ~ [1 + (_l)n-l K(Sin9 + Sin9n-l>] 2 2' n

where the centre of the width modulated pules, 9n = !!.2: ' R

A triangular signal (the carrier) and a sinusoid signal (the modulation signal) act as the two inputs to a comparatorS. If the carrier waveform is a sawtooth waveform single sided p.w.m. is realised. This has been found to be inferior~ in practice, due to the extra modulation products present in the output waveform. Again, the modulation signal has been changed for a triangular waveform with a resulting deterioration in output spectra. However, it has been shown l that the use of a triangular carrier and a stepped sinewave modulation Signal (the steps being synchronised to the apices of the triangular waveform) can result in the following advantages: (i) Practical improvements in extending the frequency range of the analogue controller

frequency ratio, R

= !!,

Tc and modulation index, K

= ~. Vc

THE MICROPROCESSOR IMPLEMENTATICN The compromises necessitated in the design of the microprocessor have also determined that it is slower in logic execution than its TTL counterpart (logic operations being achieved in micro-seconds rather than nanoseconds). Further the microprocessor is, inherently, a serial device. That is, it operates in a sequential manner obeying a set sequence of instructions. Thus if a microprocessor was controlling a motor directly, when new data is entered, the

45 3

454

M. G. Ja yne , A. B. Williams and P . D. Dav i es

whole system would come to a halt whilst the data was being introdu ced. This severe restric tion in operati on can be simply overcom e by the use of interru pts, which give the impres sion that parall el proces sing is occurr ing, whilst the use of functio nal hardwa re module s add the parall el proces sing necess ary for comple te continu ous operat ion. The lMHz, 6800 microp rocesso r was chosen on the basis as outline d by other authors 7 althoug h, subseq uently, the memory mapped approac h to I/O proved a useful efficie nt proper ty of the system . The eight bit word size was assume d adequa te. With hindsig ht access to instruc tions for sixteen bit additio n and subtra ction would have proved advanta geous in reducin g memory require ments and improv ing speed of operat ion. It is to be noted that the use of 16 bits for the sine routine is necess ary in order to provid e 4~ decima l digits of accura cy. If only 8 bits are used it would not be possib le to disting uish betwee n sin 83.3 0 and sin 900 for exampl e. THE MICROPROCESSOR SYSTEM The host microp rocesso r unit utilize s an MSI 6800 system . An interfa ce board was designe d to couple the microp rocesso r to the motor via a McMurray bridge invert er. 8 A double isolati on techniq ue was adopted using magnet ic and opto-e lectron ic isolato rs. In this way a double fault conditi on would have to occur before the microp rocesso r system could be affecte d 'catast rophic ally' by the high voltag es presen t in the invert er. The Hardwa re The use of a program mable timer module (PTM)9, the M6840, was a key additio n to the hardwa re. This allowed a timing functio n to be continu ed whilst the proces sor was diverte d (by an interru pt) to perform ing a 'new data' input routine . This allowed a substa ntial reducti on in the output error in the pwm wavefo rm. The PTM consis ts of three indepe ndent 16 bit, binary counte rs which can be placed under program contro l. By setting individ ual bits in the contro l registe r the timer was set to perform in the 'contin uous' operat ing mode. The PTM is accesse d by load and store instruc tions in much the same manner as any memory device . The only real critici sm which can be levelle d at the PTM 6840 is that extra program mable device s are require d for setting the initia l state of the three output s of the timers . The Softwa re An operat ing system was already include d in

the MSI 6800 system . There remain ed the task of design ing the program s for implem enting Eq. (1) which describ ed the pulse widths of

the pwm wavefo rm. The multip ly, sine, divide , scaling and other routine s were all develop ed separa tely in a modula r form. The routine s were linked by a contro l program which called the subrou tines in a preset sequen ce and transfe rred the data betwee n the subroutin es. In this way, each module of code was self contain ed and indepen dent of the other module s. This approac h allowed a great deal of freedom in that separa te module s could be re-desi gned withou t affecti ng the coding of other module s. Furthe r the princip les of structu red program ming were adopted where possib le. Uncond itional branch or jump instruc tions were minimi sed. For exampl e the logic constr uct in Fig. 2 require s the use of an uncond itional branch instruc tion. This can be replace d by the logic constr uct of Fig . 3 with no increas e in memory require ment or execut ion time. The multip ly routine used a shift and add algorit hm lO and multip lied two 16 bit number s with a 32 bit result . The divide routine was based on a shift and subtra ct algorit hm lO and was capable of dividin g a twenty -four bit number by a 16 bit number . The sine routine utilize d a 16 bit co-ord ic algorit hm whilst the whole program resided in 2 kiloby tes of memory. The structu re and logic sequen ce of the program is illustr ated in Figs. 4 and 5. The Hardwa re/Soft ware Interfa ce Data is entered into the microp rocesso r system via a keyboa rd. Reques ts for data appear on a VDU as shown in Fig. 7. Once the last item of data has been registe red, the program automa tically comput es the pulse widths and stores them in a table. This table of data is then automa tically transfe rred as quickly as possib le,to the interru pt table of data. It is at this point that the output wavefor m is changed to that determ ined by the new data. The system operat es as follow s. A memory table of data contain s a set of pulse width values for a comple te half cycle of the wavefo rm. The table has a set of three pointe rs. The first pointe r marks the first pulse design ated as phase 1. The second pointe r marks the first pulse (or part of the first pulse) of the second phase. This pointe r is 1200 displac ed from the pointe r of the first phase. The last pOinte r of phase 3 is 1200 displac ed from the pointe r of phase 2 as shown in Fig. 6. At this junctu re the pulse times of the three phases are stored in the counte r registe rs of the three 16 bit timers of the PTM module . The count is started by setting the gates, simulta neousl y, for the three counte rs. The pointe rs are all updated and each is now

A Microprocessor-based Control Strate gy marking the next pulse to be transferred to the counter. When any count reaches zero an interrupt is generated and the microprocessor automatically checks the status register of the PTM to determine which timer needs updating. The next pulse, from the appropriate part of the table, is obtained and stored in the counter which automatically resets the interrupt flag. The pointer of that particular phase is then moved on to the next pulse. This process is repeated for the other two phases. In practice, a 16 bit latch is used in association with each 16 bit timer. By adopting this approach the minimum pulse width is of the order of 100 II S whilst the error in each timed pulse is of the order of 12 II S :: 10 II S for a IMHz MPU. Figure 8 shows the three phase output of the timer and the interrupt generated on the rrn[ line of the M6800. At each interrupt the appropriate timer is updated. CONCLUSIONS It has been shown that a microprocessor can be configured and, under program control, can simulate the proven asymmetric PWM technique. In addition, the increased flexibility of the design has allowed the selection of carrier/modulation frequency ratios which enable the induction motor to be controlled over a speed range of 100 : 1 without the need for any hardware design modifications.

455

to P.W.M. Speed Control System for 3-phase A.C. Motors' p.66-79, Electronic Components and Applications Vol. 2 No. 2, February 1980. 4.

Pollack, J.J., 'Advanced Pulse-WidthModulated Inverter Techniques' p. 145-154, I.E.E.E. Trans. Vol lA-8, No. 2, March/April, 1972.

5.

Schonung, A, Stemmler, H. 'Static Frequency Changes with Subharmonic Control in Conjunction with Reversible Variable Speed A.C. Drives, Brown Boveri Review, 51, p. 555-577, 1964.

6.

Takahashi and Miyairi, S. 'Relation Between Output Voltage and Gate Control Signal of Pulsewidth Modulators' p. 74-80 Elec. Eng. in Japan, Vol. 95, No. I, 1975.

7.

Waterfall, R.C. 'Choosing the Microproce ssor for the Job' Int.J.Elec.Eng. Educ., Vol. 16p. 131-137, 1979.

8.

Penkowski, L.J., Pruzinsky, K.E. 'Fundamentals of a Pulse-Width-Modulated Power Circuit' I.E.E.E. Trans. on Ind. Appns. Vol. lA-8, No.5, p. 584-592, Sept/Oct, 1972.

9.

Motorola Semiconductor Products Inc., Specification DS9802 Programmable Timer Module MC6840, 1978.

10. Motorola Semiconductor Products Inc. M6800 Microprocessor Applications Further, the hardware and software have been designed such that it is now possible to add Manual. a feedback control program to the system without the necessity of adding another micro11. Murphy, J.M.D., Hoft, R.G. ' Controlled , requ~re ' d w~'th 0 th er approach es 11. Slip Operation of an Induction Motor processor as ~s with Optimum PWM Waveforms' I.E.E. The error in the output PWM pulses is small due 2nd Int. Conf. on Electrical Variable to the incorporation of 16 bit latches in the Speed Drives, p. 157-160, 25th-27th timer module. This error can be further reduced September 1979 by using a 2MH~ CPU and by increasing the oscillator frequency to the PTM counter. If the 100 llS minimum pulse width time is considered large, this can be reduced to 5011S by using a 2MH~ CPU, to about 3011S by using an improved interrupt routine, and to about lOll S by using an Interrupt Priority Controller Type M6884. REFERENCES 1.

Jayne, M.G., Bird,B.M. and Bowes,S.R. Developments in Sinusoidal P.W.M. Invertors, Published in Proceedings of 2nd IFAC Symposium of Control in Power Electronics and Electrical Drives, Dusseldorf, October 3-5th, 1977.

2.

Huang It Bau and Lin Wei Song, 'Harmonic Reduction in Inverters by use of Sinusoidal Pulse-Width-Modulation' p. 201-207, IEEE, Trans.lndustrial Electronics and Control Instrumentation, Vol. IECI-27, No. 3, August, 1980

3. Houldsworth, J.A. and Rosink, 'Introduction

M. G. Jayne, A. B. Williams and P. D. Davies

456

FREQUENCY

RATIO = R= 1n/Te

MODULATION

INDEX = K =Vm IVe

MODULATION

WAVEFORMS

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A Microprocessor - based Control Strategy

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45 8

M. G. Jayne, A. B. Williams and P. D. Davies

ENTER FREIlUENCY RATIO

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ENTER MODULATING FREQUENCY

(Fill)

ENTER MODULATION INDEX

CALCULATE

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