A simple grounded FDNR and capacitance simulator based-on CCTA

Int. J. Electron. Commun. (AEÜ) 69 (2015) 950–957

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A simple grounded FDNR and capacitance simulator based-on CCTA Adirek Jantakun ∗ Department of Electronics and Telecommunication Engineering, Faculty of Engineering, Rajamangala University of Technology Isan, Khonkaen Campus, Khonkaen 40000, Thailand

a r t i c l e

i n f o

Article history: Received 30 January 2015 Accepted 16 March 2015 Keywords: FDNR Capacitance simulator CCTA Grounded capacitor Grounded resistor

a b s t r a c t This article purposes to present a simple grounded FDNR and capacitance simulator using CCTA. The proposed FDNR is very simple which consists of single CCTA and 2 grounded capacitors. As well, the FDNR values are easy to be adjusted by electronic tuning via DC bias current of CCTA. An application example as a low-pass filter and a quadrature oscillator are included to confirm the usability of the proposed FDNR. Moreover, the proposed FDNR can be changed to capacitance simulator by replacing a grounded capacitor with a grounded resistor. The band-pass filter as an example for using the capacitance simulator is included. The BJT technology and PSPICE simulation are designed and verified performance of the proposed circuit. The results are a good agreement to the theoretical anticipation. © 2015 Elsevier GmbH. All rights reserved.

1. Introduction The frequency-dependent negative resistance (FDNR) is useful in analog signal processing as an active filter. For example, low-pass filters used for anti-aliasing in front of ADCs or smoothing on the output of DACs [1–3] and band-pass filters used for super-heterodyne receiver [4]. Furthermore, FDNR can be applied in quadrature oscillator [5,6] for using in telecommunication for quadrature mixer, single side-band generator or measurement system purposed in vector generator, selective voltmeters [7–11]. Especially, FDNR can be replaced with the inductor due to the inductor has many disadvantage including a bulky, heavy and inconvenience to adjust the inductance [12,13]. Although it can create a spiral inductor for high frequency integrated circuits (ICs) applications, but the ICs are bulky and inconvenient to adjust the inductance [12,13]. The advantage of FDNR, which is mentioned in the above, has been regularly developed and researched in [2–4,12–24] and the details are followed: The FDNR research published by many different high performance active building blocks, such as; CCII, CFOA, OTA, DVCC, FDCCII, CBTA, OTRA, CCTA, etc. They also have advantages and disadvantages, such as; the circuits in [13] which enjoyed for electronic adjustment by the transconductance, but it is resisted from using of 2 floating capacitors that are not suitable for the integrated circuit (IC) implementations, because the IC space has increased its size [9]. The circuit presented in [6] using single OTRA but it has

∗ Tel.: +66 043336371. E-mail address: [email protected] http://dx.doi.org/10.1016/j.aeue.2015.03.002 1434-8411/© 2015 Elsevier GmbH. All rights reserved.

disadvantages, such as; lack of electronic tuning and using 2 floating capacitors and 2 floating resistors. Some circuits in [5,14–17] used CCII more than 2–4 elements and 2 floating capacitors, 1 resistor as well as lack of electronic tuning. The circuit in [18] is very compacted and good convenient for electronic tuning. It employed single FDCCII,3 grounded elements, but FDCCII requires multiple current input terminals (X port) and multiple current output terminals (Z port) which let the circuit becomes more complicated. Some circuit in [19] presented electronic tuning FDNR by reform the transconductance of CBTAs. Nevertheless, the results of circuit have not been verified. The proposed circuits in [20] used single CFOA which is compacted, but they are stilled as follows: used floating capacitor, the circuit in Fig. 3 required matching resistance (R1 = R2 ) and lack of electronic adjustment. Furthermore, an external resistor makes the IC difficult [9]. Although, the digital potentiometer can be replaced with external resistors for electronic tuning, but the circuits become complicate and difficult to implementations [21]. FDNR in [22] is enjoyed for uses single DXCCII and electronic tunable with MOSFET-C but it is suffered from uses floating capacitor which is required a large area for IC implementation [9]. The proposed FDNR in [23,24] are configured with only single CCII and without extension of output ports of CCII. Therefore, it is more smarted and compacted. However, it has some disadvantages, such as lack of tuning by using electronic method. In addition, the circuit in [24] consumes a lot of resistors. The capacitor is a common component of circuits/systems for analog signal processing, communication, measurement, instruments, etc. [25]. However, the high value of capacitor is difficulty for fabrication in integrated-circuit technology because it is required the large occupied area [25]. The technique for increment of

A. Jantakun / Int. J. Electron. Commun. (AEÜ) 69 (2015) 950–957

(a)

951

(b)

Fig. 1. CCTA (a) is schematic symbol and (b) is equivalent circuit. Fig. 2. The proposed FDNR.

capacitance value can be multiplied with active building block. They are a lot of regularly researched and published [25–38] as well as can be summarized as follow. The proposed capacitance multipliers in [25–29] are smarted and compacted which is uses single active building block. Moreover, some circuits in [25,26,29–34] are benefited from the gain of multiplier can easily to be adjusted with electronic method. Nevertheless, the circuits in [25,27–29,33] are stilled from uses floating capacitor which is vulnerability of IC technology. Also, the proposed circuits present in [27,28,32,35–38] are suffered from uses excessive active/passive elements. As well, the proposed circuits in [27,28,35–38] are defected with lack of electronic tuning. This paper presented the simple grounded FDNR using single CCTA and grounded capacitors. The FDNR values can be electronically adjusted by tuning the bias current of CCTA. Moreover, the capacitance simulator can easily be constructed by replacing a grounded capacitor of proposed FDNR by a grounded resistor. The PSPICE simulation is used to verify the performances of proposed circuit with BJT technology. In addition, the FDNR and capacitance simulator have been used as an example in low-pass filter, quadrature oscillator and band-pass filter, as well.

grounded capacitors are connected at high impedance ports which is advantage for integrated circuit implementation. There are compensated latent capacity at node and terminals of CCTA including lessening the area of IC [8–11]. From (1), an input impedance of proposed FDNR can be written as Zin =

Vin 1 gm1 = = . Iin Deq s2 C1 C2 s2

(3)

In addition, if the frequency increases, the absolute impedance of FDNR will decrease and substitute gm as (2) into (3) the absolute impedance is subsequently shown as Zin =

1 IB1 = . Deq s2 2VT C1 C2 s2

(4)

Therefore, the FDNR whose value is found to be 2VT C1 C2 . IB1

Deq =

(5)

It is evident from (5) that the FDNR values can be adjusted by electronic tuning with DC bias current IB1 of CCTA.

2. Circuit descriptions

2.3. Proposed capacitance simulator

This section describes the CCTA properties, proposed FDNR and capacitance simulator as follows.

It is interesting to notice that, the capacitance simulator can easily be configured by replacing a grounded capacitor of proposed FDNR by a grounded resistor. The proposed capacitance simulators are shown in Fig. 3(a) and (b). That has provided the single CCTA, a single grounded capacitor and a single grounded resistor. Straightforward realize on circuit in Fig. 3(a) and (b), an input impedances can be rewritten as

2.1. Current conveyor transconductance amplifier (CCTA) CCTA has been published in the year 2005 as results of research by Prokop and Musil [39]. It is suitable for the use in the analog signal processing circuits which have several advantages, including a higher slew-rate, wide bandwidth, output current control with electronic methods, etc. The associations of voltages and current of CCTA are presented by the following hybrid matrix:

⎡

Iy

⎤

⎡

0

0

⎢ ⎥ ⎢ Vx ⎥ ⎢ 0 1 ⎢ ⎥=⎢ ⎢ I ⎥ ⎣1 0 ⎣ z⎦ 0

Io

0

0 0 0 ±gm

0

⎤

⎡

Ix

⎤

⎢ ⎥ 0 ⎥ ⎢ Vy ⎥ ⎥⎢ ⎥. 0 ⎦ ⎢ Vz ⎥ ⎣ ⎦ 0

(1)

IB , 2VT

gm1 R1 Vin 1 = . = Iin Ceq s C1 s

Vin 1 IB1 R1 = = . Iin Ceq s 2VT C1 s

(2)

It can be seen that, gm can be electronically tuned by the DC bias current IB and VT is thermal voltage (approximately 26 mV at room temperature). The symbol and equivalent circuit of CCTA are depicted in Fig. 1(a) and (b), respectively. 2.2. Proposed grounded FDNR The proposed grounded FDNR is shown in Fig. 2. It is very simple provided single CCTA and 2 grounded capacitors. The both of

(7)

From (7), it can be seen that, the new capacitance has a value Ceq = kmul Ceq =

Vo

(6)

Substituting gm in (2) into (6), the input impedance is becomes Zin =

For the CCTA implemented by BJT technology and the transconductance gain (gm ) are given as gm =

Zin =

2VT C1 , IB1 R1

(8)

while, k is the gain for multiplier of the capacitance value which is equal to kmul =

2VT . IB1 R1

(9)

It can be seen that, the capacitance value can be tuned with electronic method by tuning DC bias current of CCTA and also is used single active element and grounded elements. That is, the proposed circuit is compacted and minimized of space area when fabricated the circuit [9]. However, the capacitance simulators in Fig. 3(a) and (b) can be improved the capability by modification of passive resistor. In this case, we will realize active grounded resistor based-OTA for replacement of the passive resistor R1 . When, an active grounded

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(a) Fig. 5. Quadrature oscillator.

electronic method. Then, the transfer function of Fig. 4 can be indicated as follows: T (s) =

1/Deq R VO (s) = 2 , Vi (s) s + s(1/CR) + (1/Deq R)

(14)

and the pole frequency (ωp ) of circuit can be obtained as ωp =

(b)



resistor is equal Req = 1/gm2 , the input impedance of proposed capacitance simulators are modified to gm1 Req Vin 1 gm1 = = = . Iin Ceq s C1 s gm2 C1 s

(10)

For simplification of the input impedance can be substituted the gm into (10), the input impedance, capacitance value and the gain of multiplier are represented in (11)–(13), respectively. Zin

V 1 IB1 = in = = , Iin Ceq s IB2 C1 s

Ceq = kmul Ceq =

IB2 C1 , IB1

(11) (12)

IB2 . IB1

ωp =

,

(15)

(13)

It is notable that, from (11)–(13), terms of VT is not found which is the proposed circuits are insensitively to temperature. Furthermore, the gain of multiplier can easily be tuned with DC bias current IB1 or IB2 . Besides, the capacitance values can be adjusted to very high values, when tuning DC bias IB2 greater than IB1 .

IB1 , 2VT C1 C2 R

(16)

Definitely, the ωp can easily be adjusted by using DC bias current of CCTA. 3.2. Simple quadrature oscillator An quadrature oscillator using single CCTA and grounded elements is presented in Fig. 5. The circuit is very simple and structurally generated by the grounded FDNR which is shunting with grounded resistor. The characteristic equation can be expressed as s2 +

and kmul =

Deq R

Instead of the FDNR value (5) into (15), the ωp is changed to

Fig. 3. Proposed capacitance simulator.

Zin =

1

1 = 0, Deq R1

(17)

while the frequency of oscillation (FO) is shown as ωosc =



1 Deq R1

.

(18)

Then, instead the FDNR value from (5) into (18), the FO becomes



ωosc =

IB1 . 2VT C1 C2 R1

(19)

3. An applications of proposed FDNR

From the oscillator in Fig. 5, the voltage transfer function from VO1 to VO2 is

To be confirmed, the usability of proposed FDNR has been demonstrated as follows.

gm1 VO1 (s) = . C1 s VO2 (s)

3.1. Electronically controlled low-pass filter Fig. 4 shows the realizations of low-pass filter by using FDNR, that is, the low-pass filter which is convenient to be adjusted by

For sinusoidal steady state, (20) becomes VO1 (jω) gm1 −j90 = e . C1 VO2 (jω)

(21)

The phase  difference between VO1 and VO2 is  = −90◦ ,

Fig. 4. FDNR based low-pass filter.

(20)

(22)

It ensures that the output voltages VO1 and VO2 are in quadrature. It is obviously found that the FO can be electronically tuned by adjusting the FDNR values. In addition, from (21), the amplitude of output signals depend on temperature and DC bias current of CCTA which is the largest DC bias current and the output signals may be high THD. However, the output signals maybe used buffer devices since the output impedances are high.

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Fig. 6. The 2nd band-pass filter.

4. An applications of proposed capacitance simulator One application using the capacitance simulator is shown in Fig. 6. It is 2nd band-pass filter which can tuning pole frequency with DC bias current of capacitance simulator Ceq . The band-pass filter can be realized transfer function as below: T (s) =

s(1/R1 Ceq1 ) VO (s) . = 2 Vi (s) s + s(1/R1 Ceq1 ) + (gm1 /R2 Ceq1 Ceq2 )

Fig. 7. Internal schematic of CCTA.

(23)

The pole frequency (ωp ) and quality factor (Q) are obtained as



ωp =

gm1 , R2 Ceq1 Ceq2

Q = R1

(24)

gm1 Ceq1 . R2 Ceq2

(25)

The ωp and Q are successes with substitution gm1 and Ceq in (24) and (25) which is ωp =

1 2VT

Q = R1



IB

Ceq1 IB Ceq2 R1 Ceq1 R1 Ceq2 IB1

2VT R2 C1

Ceq1 C1 Ceq2

IB1 C1 Ceq1 IB Ceq2 R1 Ceq2 . 2VT R2 C1 Ceq2 IB Ceq1 R1 Ceq1

,

(26)

(27)

Furthermore, (26) and (27) can be simplified by set Ceq1 = Ceq2 = Ceq , that is ωp =

IB Ceq R1 Ceq 2VT C1 Ceq



Q = R1



IB1 , 2VT R2

IB1 . 2VT R2

(28)

(29)

From (28) and (29), it confirmed that, the pole frequency can freely be tuned by DC bias current IB Ceq of capacitance values. The quality factor is linearity tuned by changing R1 and without effects of the pole frequency.

Fig. 8. The impedances and phase response of the FDNR for several frequencies.

the DC bias current of CCTA. The bias current is tuning by adjusting IB1 = 10 ␮A, 20 ␮A, 40 ␮A and 80 ␮A to obtain Deq = 0.052fFs, 0.026fFs, 0.013fFs and 6.5aFs, respectively. The capacitance simulator in Fig. 3(a) is chosen as an example for test the performance. The circuit is configured as follow: C1 = 0.1 nF, DC bias currents IB1 = 50 ␮A and active grounded resistor Req = 1 k (IB2 = 52 ␮A). It can be displayed the input impedances and phase versus frequencies in Fig. 10. The results in Fig. 11 depict the demonstration of the capacitance values with different DC bias current IB1 which are 25 ␮A, 50 ␮A, 100 ␮A and 200 ␮A. These bias currents are changed the Ceq from 0.208 nF, 0.104 nF, 0.052 nF and 0.026 nF, respectively, which is consistently with the theoretical analysis in (12). The confirmation of the capacitance simulator is temperature-insensitive, we will sweep the temperature of 0, 25, 50, 75 and 100 ◦ C. The simulation results in Fig. 12 are very

5. Computer simulation To prove the theoretical analysis and application of proposed FDNR and capacitance simulator, the PSPICE simulation has been used. Fig. 7 depicts schematic descriptions of the CCTA used in the simulations. The parameter of transistors NPN and PNP of proposed circuits for simulation are used the NR200N and PR200N bipolar transistors of ALA400 transistor array from AT&T. The supply voltage of CCTA in the proposed circuit is biased with ±1.5 V. The proposed FDNR has been designed with C1 = C2 = 0.1 nF, IA1 = 50 ␮A and IB1 = 10 ␮A. Fig. 8 illustrates the theory and simulation of the absolute impedances and phase of proposed FDNR for several frequencies. The simulation results were corresponds to the theoretical analysis in (4). In this condition, the proposed FDNR has total power dissipation about 542 ␮W. Fig. 9 shows the simulation results which confirm that the values of FDNR can be adjusted by

Fig. 9. The impedance values which were relative to frequency of the FDNR for different IB1 .

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Fig. 10. The impedance and phase of circuit in Fig. 3(a).

Fig. 11. The impedance value of capacitance simulator with difference IB1 .

satisfying because the curves of impedance and phase of proposed capacitance simulator are slightly affected with temperature. An application of proposed FDNR can be demonstrated as follow. The low-pass filter in Fig. 4 designed as C = 1 nF, R = 10 k and proposed FDNR with above configured. The gain and phase response of low-pass filter are shown in Fig. 13. The performance of time domain response of low-pass filter is depicted in Fig. 14 which is feeding sinusoidal signal with 200 mVp-p of 100 kHz frequency into input of circuit. Moreover, the frequency responses in Fig. 4, for

Fig. 12. The frequency and phase response of capacitor simulator with changing temperature.

Fig. 13. Gain and phase response of low-pass filter.

Fig. 14. Time domain response of low-pass filter.

different values of FDNR are demonstrated in Fig. 15 that is tuning IB1 = 12.5 ␮A, 25 ␮A, 50 ␮A, and 100 ␮A, respectively. It can be found that ωp can be controlled via DC bias current of CCTA which is well agreeable with the theoretical analysis in (16). Fig. 5 exhibits the quadrature oscillator that used single FDNR parallel with grounded resistor which the simulation requires that R1 = 1 k and proposed FDNR with IB1 = 87 ␮A. The simulation of output waveforms is shown in Fig. 16 with 1.56 MHz of frequency. It can be seen that the output signals are quadrature because it

Fig. 15. Simulated frequency response of the low-pass filter in Fig. 4 when IB1 is varied.

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Table 1 THD analysis for VO1 . Harmonic no

Frequency (Hz)

1.560E+06 1 3.120E+06 2 3 4.680E+06 4 6.240E+06 7.800E+06 5 6 9.360E+06 1.092E+07 7 1.248E+07 8 1.404E+07 9 10 1.560E+07 DC component = 2.579935E−04 Total harmonic distortion = 2.593156E−01 Percent

Fourier component

Normalized component

Phase (◦ )

Normalized phase (◦ )

1.370E−02 2.851E−05 1.614E−05 6.057E−06 6.179E−06 4.308E−06 5.578E−06 7.505E−06 1.919E−06 2.199E−06

1.000E+00 2.081E−03 1.178E−03 4.420E−04 4.509E−04 3.143E−04 4.070E−04 5.477E−04 1.400E−04 1.605E−04

−1.179E+02 1.749E+02 −1.558E+02 −1.426E+02 −1.552E+02 −1.270E+02 −8.066E+01 −1.151E+02 5.657E+01 −7.472E+00

0.000E+00 4.106E+02 1.978E+02 3.288E+02 4.341E+02 5.802E+02 7.444E+02 8.278E+02 1.117E+03 1.171E+03

Fourier component

Normalized component

Phase (◦ )

Normalized phase (◦ )

8.660E−03 1.071E−05 6.941E−06 4.883E−06 3.247E−06 3.140E−06 2.309E−06 2.119E−06 2.857E−06 2.544E−06

1.000E+00 1.236E−03 8.015E−04 5.639E−04 3.750E−04 3.625E−04 2.666E−04 2.447E−04 3.299E−04 2.938E−04

1.537E+02 1.466E+02 1.571E+02 −1.608E+02 −1.436E+02 −1.479E+02 1.734E+02 −1.348E+02 1.588E+02 −1.450E+02

0.000E+00 −1.609E+02 −3.041E+02 −7.757E+02 −9.122E+02 −1.070E+03 −9.027E+02 −1.365E+03 −1.225E+03 −1.682E+03

Table 2 THD analysis for VO2 . Harmonic no

Frequency (Hz)

1 1.560E+06 2 3.120E+06 4.680E+06 3 6.240E+06 4 7.800E+06 5 9.360E+06 6 7 1.092E+07 1.248E+07 8 9 1.404E+07 10 1.560E+07 DC component = −1.283207E−04 Total harmonic distortion = 1.756977E−01 Percent

Fig. 16. Output waveform VO1 and VO2 during steady state.

Fig. 17. The frequency spectrums of output signals.

has phase difference about 90◦ . The frequency spectrums of output waveforms are shown in Fig. 17, with the THD (total harmonic distortion) of VO1 and VO2 about 0.259% and 0.175%, respectively. Moreover, the details of THD are summarized in Tables 1 and 2, respectively. The 2nd band-pass filter in Fig. 6 was set to demonstrate application of proposed capacitance simulator. The components and bias currents of band-pass filter were chosen as: R1 = R2 = 1 k, IA1 = 50 ␮A and IB1 = 50 ␮A. The capacitance simulators were selected Fig. 3(a) and set Ceq1 = Ceq2 = Ceq . They have been detailed with C1 = 1 nF, R1 = 750 . Simultaneously, the bias currents of Ceq were chosen as: IA Ceq = 50 ␮A and IB Ceq = 50 ␮A. An above configured, the pole frequency (ωp ) and quality factor (Q) are achieved as 112.60 kHz and 0.98, respectively. Fig. 18 is displayed the simulation results of the frequency and phase response of band-pass filter which is resulting in ωp and Q of 107.15 kHz and 0.91, respectively. The time domain response is depicted in Fig. 19 when the sinusoidal signal is fed to input of circuit with 107.15 kHz

Fig. 18. Frequency and phase response of band-pass filter

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6. Conclusion

Fig. 19. Time domain response with 107.15 kHz frequency.

The simple grounded FDNR and capacitance simulator have been presented. The proposed FDNR has provided a single CCTA and 2 grounded capacitors and can be adjusted the values easily by electronic tuning via DC bias current of CCTA. Moreover, the grounded capacitors are a point of views of IC implementations. The low-pass filter and quadrature oscillator are instances of proposed FDNR that the circuits offer an electronically controlled for tuning the frequency. The capacitance simulators are obtained by change a grounded capacitor with a grounded resistor of proposed FDNR without changing the circuit configuration. Also, the capacitance simulators are temperature-insensitive, when a grounded resistor is change to active grounded resistor base-on OTA. The 2nd bandpass filter as an application of capacitance simulator which is the pole frequency can be electronically tuned with DC bias currents. The PSPICE simulation results verify that the theoretical analysis is agreeable as well.

References

Fig. 20. Band-pass response with difference IB Ceq

frequency and 50 mVp-p amplitude. In addition, the electronic tunable of the pole frequency is demonstrated with changing IB Ceq = 12.5 ␮A, 25 ␮A, 50 ␮A and 100 ␮A, that the pole frequency of band-pass filter is obtained to 26.91 kHz, 53.07 kHz, 107.15 kHz and 212.81 kHz, respectively. Also, the curves of band-pass response are plotted in Fig. 20. The simulation results of FDNR, capacitance simulator and their applications can be summarized as follows. The results of FDNR are found that the absolute impedance is decreased when increasing the frequency. The adjustment of FDNR values can be done by tuning the bias current IB1 . The results are depicted in Fig. 9. These results are accordance with theoretical analysis in (4). Moreover, the simulation results of the capacitance simulator can be seen in Figs. 10–12, which the circuit performances as well as theory are compared. The application of FDNR shows that the pole frequency of low-pass filter can easily be demonstrated by tuning the bias current IB1 as confirmed in Fig. 15. Furthermore, the output signal of quadrature oscillator is depicted in Fig. 16. It is sinusoidal signals with phase difference of 90◦ and it is desirable for the low THD. The 2nd band-pass filter is an application of capacitance simulator that is the frequency and phase responses of band-pass filter are illustrated in Figs. 18 and 19. Fig. 20 shows the pole frequency where it is varied by tuning the bias currents of capacitance simulator. These results are confirmed that the pole frequency can be adjusted by the bias current Ceq and it does not effect to the quality factor. However, some of errors of the results may be occurred from the parasitic capacitances and resistances at the nodes and ports of circuits. These parasitics are likely caused by the mistake of the internal transistors.

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