An experimental comparison of measurement techniques to extract Si-SiO2 interface trap density

Solid-State Electronics Vol. 35, No. 3, pp. 345-355, 1992 Printed in Great Britain

0038-1101/92 $5.00 + 0.00 Pergamon Press plc

INVITED PAPER AN

E X P E R I M E N T A L C O M P A R I S O N OF M E A S U R E M E N T T E C H N I Q U E S TO E X T R A C T Si-SiO2 I N T E R F A C E TRAP DENSITY

STEVENC. WITCZAK,JOHN S. SUEHLE and MICHAELGAITAN National Institute of Standards and Technology, Semiconductor Electronics Division, Gaithersburg, MD 20899, U.S.A.

(Received 31 July 1991; in revisedform 27 September 1991) Abstract--For the first time, five methods of measuring Si-SiO2 interface trap densities were compared experimentally on three otherwise identical MOSFETs which were radiation-stressed so as to induce different levels of interface trap densities. The results show that when sources of error and limitations are taken into account, these methods are capable of yielding interface trap density estimates which are in good quantitative agreement, Furthermore, the change in measured interface trap densities with radiation is independent of the method used. A comprehensive review of the methods is presented.

l. INTRODUCTION

Si-SiO2 interface traps are thought to be defects related to the chemical bonds located at the semiconductor-insulator interface in MOS devices which introduce unwanted energy levels in Si bandgap. Such defects are known to be produced through a variety of mechanisms, including processing procedures, exposure to ionizing radiation, impurities and hotcarrier effects. It has long been noted that interface traps can significantly degrade the performance of MOS devices by exchanging charge with the Si[1-3]. To understand fully the magnitude of the effect which interface traps have on the operational behavior of MOS devices, it is important to be able to quantify the traps accurately. The major purpose of this study was to compare estimates of interface trap densities obtained experimentally for the same MOS device using the following five methods: 1. 2. 3. 4. 5.

High-low frequency capacitance. Conductance. Subthreshold current. Charge pumping. Low-temperature capacitance.

describes the experimental details and presents the measurement results. A discussion of the results and the sources of error for each technique is given in Section 4. Section 5 summarizes the conclusions of the study. 2. DESCRIPTIONOF MEASUREMENTTECHNIQUES In this section, a brief description of each of the five measurement techniques used in this study is presented.

2.1. High-low frequency capacitance method A distribution of interface trap densities can be determined for a MOS device from the difference in its low- and high-frequency capacitances measured in depletion and weak inversion[4]. This technique uses the fact that the difference in measured capacitances is attributed to the inability of interface traps to respond to the small signal at high frequencies. When the measured capacitances are corrected for series resistance, the interface trap density Dit is obtained as a function of gate bias for energies not near the band edges as: Dit .

So that these methods could be performed on the same device, it was necessary to choose a large-area MOSFET for testing. In order to evaluate the five method's abilities to assess relative interface trap densities, each method was applied to three otherwise identical MOSFETs having different levels of interface trap densities induced by y-radiation. In Section 2, a brief theoretical description is given for each measurement technique. Section 3

q

.

.

C7ox

.

v

Cox

, (1)

where CLF[5] and CHF are the capacitances measured at low and high frequencies between the gate and substrate, Cox is the oxide capacitance and q is the magnitude of electronic charge. In order to ascertain a distribution of interface trap densities as a function of energy in the bandgap, the surface potential is used to relate the gate bias to the energies probed by the capacitance measurements. 345

346

STEVENC. WITCZAKet al.

The surface potential ~b~and the gate bias Vg have the relationship[6]:

where the ttatband voltage VFB is used as a reference. The flatband surface potential is obtained from: ~s(VFB) =--kT ln(@7)q

(3)

and the flatband voltage is found from the high-frequency capacitance curve via: CHF ( VFB ) =

siE-~SNB

I- - -

Cox

,

(4)

where NB is the doping of the active region, esiEoand ni are the permittivity and intrinsic carrier concentration, respectively, of Si and k T / q is the thermal voltage. 2.2. Conductance m e t h o d

Interface trap densities can be determined for a MOS device according to the estimate of conductance due to interface traps from the measured admittance of the device when biased in depletion[7-9]. The interface trap conductance averaged over band-bending variations per unit angular frequency is extracted from the measured admittance between the gate and substrate with:

(Git) co

coC2oxGc = G~ + co2(Cox - Co) 2'

(5)

where Gc and C¢ represent the measured equivalent parallel conductance and capacitance of the device corrected for series resistance. Series resistance can be calculated from the admittance measured when the device is biased in accumulation according to[9]: Rs=

Gma

: 2 2' Grna + co Cma

(6)

where Gm~ and Cm~ represent the measured device equivalent parallel conductance and capacitance in accumulation. The series resistance corrected admittance values are obtained as a function of angular frequency from the measured device equivalent parallel conductance G m and capacitance C m according to:

Cc =

(G~ + fD2C2m)Cm a2 + co2C2m

(7)

and

(6~ + co2C~m)a Go=

a2 + co2C2m

,

(8)

where

a = Gm- (GZm+ c02C2m)Rs.

function of log frequency typically exhibits a maximum corresponding to a peak frequency fp. An interface trap density can be extracted from admittance measurements made at a given gate bias in depletion from either of two regions of this curve-one corresponding to frequencies above the curve's peak and one corresponding to frequencies below the curve's peak. The standard deviation of band-bending obtained from the curve is used to find the value of the universal function fD which depends on the peak frequency and the characteristic time constant of the majority carriers. Finally, the interface trap density is calculated as:

Dit = ((Git)~ [fD(O's)q]-1, \~

(10)

/s~

where (rs is the standard deviation of band-bending. The process is repeated at gate biases within a range of a few k T / q of midgap and a few k T / q of flatband. To determine a distribution of interface trap densities in depletion, the gate bias can be related to bandgap energy with Berglund's technique used in the high-low frequency capacitance method. 2.3. S u b t h r e s h o l d current m e t h o d

A mean interface trap density located in energy about the center of the weak inversion region can be extracted from a long-channel MOSFET according to the slope of the drain current vs gate voltage characteristics at subthreshold voltages[10-12]. In weak inversion, drain current, as a function of gate voltage, can be represented as[10]: Id=

L m , f l 2 exp

] .1, where L and W represent the gate length and width, Fd the drain voltage, #, the mobility of electrons, fl the reciprocal of the thermal voltage and ~bFthe bulk potential. The depletion layer capacitance can be represented

as" =

f

(12)

/- q'sie°N---~B ,

where ~ks is the band-bending. The other parameters, n and m, are functions of the depletion layer capacitance. A subscript * signifies that the parameter is evaluated at a band-bending corresponding to midway between weak and strong inversion. Based on this expression for drain current, the mean interface trap density can be calculated as[11]:

(9)

When the frequency of the small signal is swept over a large enough range, a plot of the average interface trap conductance per unit angular frequency as a

/~it = q1 |[/ /- d ~.~T l/ ln(Id )

L\

Cox

_C~l

•

(13)

Comparison of methods for extracting interface trap densities 2.4. Charge pumping method

When the gate of a MOS transistor is biased so as to induce charge inversion of the surface, minority carriers rush from the source and drain to the gate and fill the traps at the Si-SiO2 interface. When the gate is subsequently pulsed into charge accumulation, those mobile carriers not trapped are free to return to the source and drain under the influence of a reverse bias. Depending on the geometry of the device and the shape of the pulse applied to the gate, a portion of these mobile carriers may recombine with majority carriers before they reach the source and drain, constituting a current known as the geometric component. Those carriers trapped at the interface recombine with majority carriers to constitute a measurable substrate current. It is this substrate current, known commonly as charge pumping current lop, which characterizes the interface traps and leads to the analysis of interface trap densities[ 13-17]. Interface trap densities can be extracted from measured charge pumping current with techniques developed by Groeseneken et al.[13]. One technique yields a mean interface trap density representative of values between flatband and threshold according to: /~it

logl0 e = - x

2qkTA

Aai t A logf'

(14)

where A is the gate area and f i s the pulse frequency to the gate. Qit = I¢-2 (15) f is defined as the recombined interface trap charge per cycle. The dependence of recombined charge per cycle on frequency is obtained experimentally by sweeping the frequency of a voltage pulse train applied to the gate and measuring the resultant substrate current. The pulse amplitude and offset used should be chosen such that the pulse includes the entire range of gate offset voltages for which charge pumping flows as dictated by the device's flatband and threshold voltages. A preliminary measurement of charge pumping current as a function of gate offset voltage should be made to determine the pulse amplitude and offset required and generally to indicate a device's ability to respond to charge pumping techniques. 2.5. Low-temperature capacitance method

The density of interface traps for a MOS device can be determined according to the difference in its tCommercial products and services are identified only to help describe the experimental procedure. Such identification does not constitute an endorsement by the National Institute of Standards and Technology (NIST), nor does it imply that the products or services are the best available for the purpose.

347

capacitance-voltage ( C - V ) curves when measured with and without its interface traps occupied by carriers[18,19]. A C - V measurement is first taken by sweeping the device from charge accumulation to deep depletion at a fast enough rate that interface traps in the bandgap do not have time to exchange charge with the semiconductor. The minority carrier response time associated with the generation of electron-hole pairs is related to temperature as[9]:

1

Eg

ni

2kT'

z~oc -- oc T - 3/2exp - -

(16)

where Eg represents the bandgap energy. At low enough temperatures, the minority carrier response time becomes too long to facilitate charge inversion of the surface at a given sweep rate and the surface becomes deeply depleted. Because the rate of charge capture and emission processes for traps decreases with decreasing temperature, performing this measurement at low enough temperatures effectively freezes the interface trap charge in place. When the time it takes to sweep the device from accumulation to deep depletion is on the order of a second, liquid nitrogen temperatures will freeze the vast majority of carriers in the bandgap, with the only traps fast enough to respond being those close to a band edge. Thermal generation of deficit minority carriers is negligible, and the device remains in deep depletion until it is exposed to light. At this point, the device capacitance increases sharply, and enough energy is imparted to the carriers to fill the traps. The source of light is removed, returning the device to thermal equilibrium, and the C - V measurement is repeated with the traps full by sweeping the device back to accumulation. A shift in voltage will result between a portion of the two measured C - V curves due to the difference in charge trapped at the interface predicted by: AV =~ox q de,+~ I E~-~ Dit(E)dE'

(17)

where 6 accounts for those interface traps close enough in energy to the conduction band edge E c and valence band edge E to follow the gate bias. From this, the interface trap density is calculated as: A VCox Dit = - q

(18)

3. EXPERIMENTAL RESULTS

The test device used for the comparison was an n-channel MOSFET fabricated with gate dimensions of 500pm in length by 1500pm in width over a substrate doped with 2 x 1016 acceptor impurities cm-3. The gate oxide was dry-grown to a thickness of 410 A. This device was part of a test chip which was designed at the NIST and fabricated by the MOSIS Foundry System[20].t

348

S~VEN C. WITCZAKet al.

Interface trap densities were changed in the test devices by using the NIST 6°Co-y-source with a dose rate of 40.1 Gy(Si) m i n - m.Three exposures were performed at doses of 1, 2 and 3 kGy(Si). To enhance the speed and accuracy of the comparison, all measurements made in the application of these fives methods were initiated with the help of a microcomputer through an IEEE-488 generalpurpose interface bus[21]. Similarly, all data obtained in the measurements were transferred from the instrumentation over the interface bus into a file on the microcomputer. There computer software performed the interface trap analysis for each method according to the procedure described in Section 2. To reduce noise, coaxial connections from the instrumentation to the probes were made near the probe tips. 3.1. High-low frequency capacitance method High-frequency C - V curves were measured for the three test devices using an HP 4275A multi-frequency LCR meter at a small signal voltage of 50 mV and a small signal frequency of 10 kHz. This frequency was shown experimentally to be suitable for the highfrequency measurement, because it was slow enough to allow for negligible degradation of the measured accumulation capacitance due to series resistance. Low-frequency (or quasi-static) curves were measured with an HP 4140B pA meter/d.c, voltage source at a ramp rate of 50 mV s-m. To minimize the effects of noise on the measurements, the capacitance displacement current was measured at the gate electrode, and the ramp was applied to the substrate. Sources and drains were left floating and were not found to influence the measurements. The measured C - V curves showed several effects as a result of radiation damage, as shown in Fig. 1. The entire high-frequency curve was translated along the gate bias-axis in the negative direction with increasing doses of radiation. This is explained by the build-up of fixed oxide charge induced by the irradiation process and is not a factor in determining interface trap densities with this method. In addition, the slope of the high-frequency curve in depletion was less severe with increasing doses of radiation. This is a direct consequence of interface traps and is commonly referred to as "stretch-out". This phenomenon occurs because the amount of charge on the gate needed to produce a given surface potential is dependent on interface traps. The measured low-frequency curves were increasingly distorted with radiation damage, with the most severely irradiated sample showing a great deformity in the depletion and weak inversion portions of the curve. This deformation of the low-frequency curve and consequent difference in low- and high-frequency capacitances at gate biases between flatband and threshold is a direct indication of the presence of interface traps. To simplify the analysis for determining the energy dependence of the calculated interface trap densities,

70

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~ - High-Frequency =

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Fig. 1. The influenceof radiation stress on the C V characteristics of an n-channel MOSFET. The dotted lines represent the low- and high-frequency C-V curves of a pre-radiation-stressed test device. The solid lines respresent the low- and high-frequency C-V curves of an identical device which has been irradiated with 3 kGy(Si). a constant doping for the test devices was estimated by solving[22]: F 4kT /'NB \-] 1/2 Cox = 1 "+"Cox/EsiE~-TN B + lnL--~-i) j , Cin---~ _

(19)

where Ci,v is the inversion capacitance. Because the test device doping profiles obtained from the measured capacitances showed little nonuniformity and agreed well with this approximation, little accuracy was lost in the analysis. The interface trap distributions calculated with the high-low frequency capacitance method indicate that the density of interface traps is relatively flat over midgap and increases sharply near the band edges, with the trap density being greater in the upper half of the bandgap than in the lower half. Consistent with the observations made regarding the measured C - V curves, the interface trap densities show a clear dependence on radiation damage. 3.2. Conductance method Equivalent parallel conductance and capacitance measurements were made on the test devices using an HP4194A impedance analyzer. Although, in principle, measurements at only three frequencies are needed in the application of the conductance method for a given gate bias, it was necessary to measure these devices for admittance over a wide range of frequencies, because the frequencies of interest were unknown. One sample point per measurement made with a long integration time setting on the impedance analyzer provided acceptable signal-to-noise ratios for frequencies above 1 kHz, but, for frequencies below 1 kHz, it was necessary to average up to four sample points per measurement. Thus, as the device

Comparison of methods for extracting interface trap densities was biased closer to weak inversion, more care was required in measuring the admittances accurately due to the dependence of substrate current on frequency. Sources and drains were left floating and were not found to influence the measurements. Because series resistance can significantly alter the calculated conductive portion of the interface trap admittance, it was necessarily included in the analysis. The series resistances calculated for the test devices irradiated to 1, 2 and 3 kGy were 655, 612 and 610 f~, respectively. These very significant values demanded that special attention be given to the effects of series resistance in the application of the admittance-based measurement techniques used in this study. The measured interface trap conductance curves corrected for series resistance for the three test devices when biased so as to probe the same bandgap energy exhibited peaks at the same frequency. As the devices were biased closer to accumulation, the peaks of the curves moved upward in frequency. Furthermore, the data demonstrated that the conductive component of interface trap admittance extracted from the measurements increased with radiation stress, as shown in Fig. 2. This increase in interface trap conductance was due to higher interface trap densities as revealed by the analysis. Distributions of interface trap densities were obtained by averaging the densities determined from analyses using the high-side frequency and low-side frequency conductances. The results clearly demonstrate the method's ability to assess the relative, interface trap densities between the devices. Since the devices were fabricated with p-type substrates, the range of energies probed was limited by the method to energies below midgap and above flatband. Fur17

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thermore, because the data proved unreliable at high frequencies, even when corrected for series resistance, points less than 0.24 eV below midgap were excluded, while poor signal-to-noise ratios constrained measurements to energies less than 0.12 eV below midgap.

3.3. SubthreshoM current method Each test device was measured for drain current vs gate voltage characteristics at five different drain-tosource voltages between 50 and 250 mV. The electric field in the channel was kept low so as not to affect the mobility of the carriers. The doping concentration used in the subthreshold current analysis was estimated from eqn (19). The slope of each curve was determined by matching a polynomial fit to the subthreshold portion of the curve, leading to a distinct estimate of the mean interface trap density about the region of the bandgap corresponding to the center of weak inversion. Figure 3 shows that the slopes of the curves become less with increasing radiation damage, with the drain currents exhibiting an increase at more negative gate voltages. This is a direct consequence of interface trap charge. The calculated mean interface trap densities showed no dependence on the drain voltage used, reflecting well on the consistency of the method, except at the lowest drain voltage, where the measured d ln(Id)/d Vg was constant over a very small range of voltages. In addition, the results exhibit a clear correlation of interface trap densities to radiation damage, as expected.

3.4. Charge pumping method Preliminary charge pumping currents were measured for each device upon sweeping the offset of

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Vg =-1.21 v 3 kGy

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~"2" 13 •

349

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10 3 104 FREQUENCY (Hz)

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Fig. 2. The influenceof radiation stress on the interface trap conductance extracted from the measured admittance of a MOSFET. Each curve represents the average interface trap conductance per unit angular frequency of an identical test device stressed with a different dose of radiation and biased so as to probe the same bandgap energy.

10-11 -1.0

iiiIJlllllllll

0.2 0.6 1.0 1.4 GATE VOLTAGE (V)

-0.6 -0.2

1.8

Fig. 3. The influence of radiation stress on the draincurrent-gate-voltage characteristics of an n-channel MOSFET. The curves correspond to identical devices radiation-stressed with different doses and measured at a common drain-source voltage.

STEVENC. ~VV]TCZAKet al.

350

a 5-V peak-to-peak 50% duty cycle triangular waveform at 10kHz applied to the gate. To stimulate charge accumulation at the surface during the negative portions of the waveform, a reverse bias of 1 V was applied to the source and drain. The curves provided a clear indication of the gate offset voltages for which charge pumping was present and, consequently, the optimum gate offset voltage to use when the dependence of charge pumping current on frequency was measured. Since charge pumping current is proportional to the mean interface trap density, the effect of the radiation on interface trap densities was immediately apparent given the dependence of measured charge pumping current on radiation stress shown in Fig. 4. The devices were subsequently measured for the recombined interface trap charge per cycle as a function of frequency. The logarithmic curves were linear for frequencies approaching the zero charge frequency. The data points measured were fit to a first-order polynomial in order to best approximate the slopes. The slopes of the curves increased with increased radiation stress, confirming a proportional increase in interface trap densities and demonstrating the method's ability to assess relative interface trap densities among the devices. 3.5. Low-temperature capacitance method

Low-temperature C - V curves were taken on each device with and without its traps occupied. To maintain the devices at temperatures at which the vast majority of interface traps could not follow the signal applied to the gate, the devices were situated in an insulated box on top of a chuck through which gas from evaporated liquid nitrogen was continuously passed. As the nitrogen gas cooled the devices down from room temperature, C - V measurements were ~" 28 o x

24

~Z

20

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periodically taken over the course of 20 min until it was determined that, at a temperature of 90 K, the effect of further temperature decreases would be negligible on the extraction of interface trap densities. The temperature of the chuck was monitored with a thermocouple. In order to be consistent with the high-low frequency capacitance method and to allow for negligible series resistance effects, the small-signal frequency was chosen to be 10 kHz. As with the other methods requiting only two terminals, the sources and drains were left floating and were not found to influence the measurements. In order to include as many of the interface traps as possible, the devices were swept from accumulation to deep depletion in about a second with an HP 4194A impedance analyzer by sampling only one capacitance at a short integration time per gate bias measured. The speed of the sweep accounted for poor signal-to-noise ratios relative to those of the highfrequency curves measured for the high-low frequency capacitance method. A representative set of these curves is shown in Fig. 5. Further comparison of the C - V curves measured for the two methods verified the inability of each device to create an inversion layer at low temperatures, as the surface deep depleted and the capacitances dropped in inversion. The magnitude of the hysteresis in the curves measured with and without occupied interface traps was dependent on radiation stress. The C - V curves were used to obtain the voltage shifts due to trapped charged differences which, in turn, were used to calculate the interface trap densities. The results show a quantitative dependence of interface trap densities on radiation damage. In contrast to other methods, which yield interface trap in dimensions of cm -2 e V - ' , the low-temperature capacitance method yields densities in dimensions of 70

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Fig. 4. The influence of radiation stress on the measured charge pumping current of a MOSFET. Each curve represents the measured charge pumping current of an identical MOSFET radiation-stressed with a different dose.

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Fig. 5. Example of hysteresis in the C - V characteristics of an n-channel MOSFET when measured with and without its interface traps occupied. This particular curve corresponds to the test device irradiated with 3 kGy(Si).

Comparison of methods for extracting interface trap densities cm-2. The interface trap densities measured with this method were compared with those measured with the other techniques employed in this study under the reasonable assumption that 1 eV of the bandgap was included in the measurements and that the densities were uniform over the bandgap.

351

sented. Each figure provides an easily understood comparison of how well these methods measure interface trap densities relative to one another. The figures also serve to put into perspective the relative ranges of energies probed by each method. The magnitudes of these densities are consistent with values considered typical of those found in MOS devices subjected to similar stress[12]. Taking into consideration the wide range of interface trap densities and the effects which they cause in MOS devices, these figures indicate a good

3.6. Comparison of results Figures 6a, b and c show the measured interface trap densities for the devices irradiated to 1, 2 and 3 kGy(Si), respectively, using the five methods pre-

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Fig. 6. Comparison of the interface density estimates determined with fivedifferent measurement methods on the same n-channel MOSFET. The distributions of interface trap densities measured with the high-low frequency capacitance and conductance methods are represented with a solid line and a series of circles, respectively. The cross represents a mean intvrfac* trap density located about the center of weak inversion measured with the subthreshold current method. The long dash©sand short dashes, respectively,represent the mean interface trap densities measured with the charge pumping and low-temperature capacitance methods. Each method was applied to three otherwise identical n-channel MOSFETs stressed by 7-radiation with a total dose in the Si of: (a) 1 kGy; (b) 2 kGy; and (c) 3 kGy.

STEVE~C. WITCZAKet al.

352

quantitative agreement of the estimates of the interface trap densities derived from the five methods discussed. Furthermore, comparison of these figures shows that the increase in interface trap densities with increasing radiation is uniform across the bandgap and independent of the method used.

ductor at an energy between flatband and threshold as[9]:

cs=

__(q2NAEsiEo'~I/2 \

2kr

j

[ e x p ( - V s ) - ( n2\~--£] ' ~ exp v ~ - l ] 4. DISCUSSION Much study has focused on the physical principles on which these various methods are based, the assumptions made in their derivations and the validity of the mathematical equations used in their analyses. To put these results into perspective, a discussion of the major sources of error and limitations in each method follows.

4.1. High-lowfrequency capacitanceand conductance methods The accuracies of the high-low frequency capacitance and conductance methods have been studied in greater detail and are generally better understood than the other methods presented in this study. Because they both require only two-terminal structures and are based on admittance measurements, many comparisons have been made between the two. Application of these methods is constrained to large area devices commonly used as test devices on commercial integrated circuits. At the expense of the tedious process of relating the gate bias to bandgap energy, the high-low frequency capacitance method is the only technique presented here which is capable of providing an interface trap distribution across the majority of the bandgap. The accuracy of the estimated trap densities is greatest near midgap and falls off near the band edges. When biased near the minority carrier band edge, a capacitance due to the inversion layer appears in parallel with the semiconductor and interface trap capacitances of the method's model. This inversion layer capacitance is included in the estimated interface trap capacitance and distorts the interface trap density predicted by eqn (1). Since this method uses the difference in the low- and high-frequency capacitances to estimate the interface trap capacitance, round-off errors in estimating the interface trap capacitance increase as the semiconductor capacitance becomes larger than the interface trap capacitance, This occurs as the device is biased closer to the majority band edge and also results in greater error in the predicted interface trap density. In addition, this constraint limits the accuracy of this method when interface trap densities are low. If it is assumed that the resolution of the highlow frequency capacitance method is determined as that value of the trap density for which interface trap capacitance is a certain fraction of the semiconductor capacitance, then the resolution is a function of energy within the bandgap. The semiconductor capacitance can be calculated for a p-type semicon-

×

(20)

Iv,-1 +exp(--v,)+(ni X~EexpL] where vs = q~ks/kT and N A is the acceptor concentration. Using the criterion that Cit > 0.1Cs for this study's test devices, representative resolutions at the landmark energies of flatband, midgap and threshold are respectively calculated to be 2,2 x 10 ~', 4.4 x 101° and 1.6 x 1011cm-2eV -1. Other sources of error include the measurement of the low- and high-frequency capacitances. Even at frequencies as high as i MHz, a small number of interface traps present in a MOS device can respond to the a.c. gate signal, resulting in slightly higher than ideal high-frequency capacitances, especially at gate biases near the band edges, where the response time of interface traps is smallest. The error at highfrequency is compounded at room temperature when thermal energy imparted to carriers enhances generation-recombination processes, leading to an increase in measured capacitances. Analogously, a small percentage of interface traps can fail to respond to the slow ramps typically used in quasi-static techniques, resulting in slightly lower than ideal low-frequency capacitances in weak inversion and depletion. These errors lead to an underestimation of interface trap densities predicted in the analysis. In general, the error in low-frequency capacitance measurement is more significant for devices with small interface trap densities, while the highfrequency capacitance error is more significant for devices with large interface trap densities. A source of error common to both the high-low frequency capacitance and conductance method is the estimation of the doping in the device's active region. An error in the doping parameter leads to a shift in the energy axis of the energy distribution plot of interface trap densities, since doping is used to relate the gate bias to surface potential in eqn (2) through the flatband voltage and flatband surface potential. An error in the estimated doping of + 1 x 1016c m - 3 used for this study's test devices results in a shift of about 20 meV in energy. For MOS devices with nonuniform doping profiles, more complex techniques exist for determining the energy dependence of interface traps[23]. Series resistance is a major source of error for the high-low frequency capacitance and conductance methods, as well. To account for the debilitating effects of series resistance on admittance measurements, either of two approaches is taken. The admittance measurements can be mathematically corrected for series resistance once the magnitude of the series

Comparison of methods for extracting interface trap densities resistance is determined, or the admittance measurements can be performed at low enough frequencies that the effects of series resistance are negligible. To avoid the extra step entailed in the mathematical correction, it is often more convenient to do the latter when applying the high-low frequency capacitance method, while it is usually necessary to do the former in the application of the conductance method, since the method typically requires making measurements at frequencies at which series resistance cannot be neglected. Since the error in the conductance method is determined by the ability to measure the device admittance and not by the difference in two admittance measurements, it is thought to be generally more accurate than the high-low frequency capacitance method. The round-off errors which limit the accuracy of the high-low frequency capacitance method at small interface trap capacitances relative to the semiconductor capacitance do not play a role in the analysis of the conductance method. As a result, the conductance method is thought to be capable of estimating interface trap densities of any magnitude more accurately and of measuring interface trap densities of roughly an order of magnitude smaller than the high-low frequency capacitance method. The trade-off for accuracy in the conductance method is the limit on the range of energies that can be covered and the added time required for implementation. The portion of the bandgap covered by the conductance method is limited to those energies probed when the device is biased to depletion. As with the high-low frequency capacitance method, the conductance requires the laborious task of relating the surface potential to the gate bias. While a conductance method exists which predicts interface trap distributions in weak inversion, it is more complicated to implement, thought to be less accurate, and is far less understood than its counterpart[9]. The conductance method is time-consuming, because it requires measuring separate admittance curves as a function of frequency for each gate bias at which an interface trap density is desired.

4.2. Subthreshold current method The subthreshold current method is the fastest, most easily performed of the methods presented. Although convenience of measurement and analysis in the laboratory is important, the subthreshold current method incurs limitations and sources of error which should be taken into account. Because the derivation of the drain current in eqn (11) involves a linear expansion of surface potential about the center of weak inversion for MOSFETs with long-channel characteristics, this method is limited in applicability to transistors with channel lengths greater than 20 #m. The parameters m and n in this equation assume a constant surface potential over the entire weak inversion region equal to the

353

value at the center of weak inversion. Since the values of these parameters actually vary with surface potential through the depletion capacitance, eqn (11) loses accuracy and the relationship of In Id and Vg becomes nonlinear away from the center of weak inversion. This, coupled with the fact that the depletion capacitance used in eqn (13) is evaluated at this same constant surface potential, means that the subthreshold current method yields a mean interface trap density estimate which is only accurate near the center of weak inversion. Attempts have been made to extract a distribution of interface trap density estimates over the entire region of weak inversion given by the transistor ld--Vd characteristics, but the resulting densities also lose accuracy away from the center of weak inversion[10]. The accuracy of the subthreshold current method suffers when applied to devices with nonuniformities in doping, oxide charge or interface trap densities across the weak inversion region. A nonuniform distribution of oxide charge or dopant impurities near the semiconductor-insulator interface causes surface potential fluctuations with positions which influence the slope of the In Id--Vg characteristic. For nonuniform interface trap densities in weak inversion, the relationship of In ld and Vg can become nonlinear throughout all of the weak inversion region, leading to ambiguities in the resulting mean interface trap density. Otherwise, the accuracy of this method is limited by the ability to estimate the doping, since the calculated depletion layer capacitance and, hence, the predicted interface trap density are dependent on doping. From eqn (13), the relative error in the estimate of doping is related to the predicted mean interface trap density by:

~, -Cg ONB- 2qN,

[ x

3kT(C~) 2] 1

~ j .

(21)

A doping overestimate of 1 x 10~6cm -3 for the test devices in this study corresponds to an underestimate of trap densities by about 9 x 101°cm -2 eV-~, while a doping underestimate of 1 x 1016cm-3 corresponds to an overestimate of trap densities by about 7 x 101°cm-ZeV -1. Since the error in estimating doping disappears when subtracting two interface trap densities, the subthreshold current method is best used to assess relative interface trap densities in devices with a common doping concentration.

4.3. Charge pumping method Since the charge pumping method requires measuring recombined trapped charge originating from a source and drain, this technique is limited in use to three-terminal transistor structures. However, because of its applicability to small transistors, the charge pumping method uniquely lends itself to special uses. Charge pumping is the only reliable tool available for measuring interface trap densities in submicrometer devices found on state-of-the-art

354

STEVENC. WXTCZAKet al.

VLSI circuits. Stray capacitance from interconnection wires typically dominates the capacitance Of small devices, rendering the measurements meaningless. Charge pumping current measured as a function of drain voltage can also be used to profile interface trap densities as a function of position in short channels damaged by hot-carriers[24]. When determining a mean interface trap density according to eqn (14), error in the relationship of measured charge pumping current and frequency can result when the time for which the surface is inverted becomes less than the trapping time constant. This is typically a problem for small devices pulsed with a triangular waveform at high frequencies. To increase the inversion time of the surface, the amplitude of the waveform can be increased. Alternatively, if the gate width is sufficiently greater than the length so as not to distort the measured current with a geometric component due to the recombination of untrapped charge, a similar analysis can be applied using a square waveform[13]. A distribution of interface trap densities can also be obtained by measuring charge pumping current when pulsing the gate with a trapezoidal waveform with varying rise and fall times[12-14]. Both charge pumping techniques include only those traps with energies between threshold and flatband. Outside of this region, the charge pumping analysis is invalid, as interface traps can follow the slow time rate of change in surface potential in equilibrium. Within this region, the distribution is further limited by how accurately charge pumping current can be measured at the large transition times needed to probe energies near midgap in the presence of device leakage current and noise inherent in the measurement instruments. Energies close to midgap can be probed more accurately by measuring charge pumping current at increased temperatures. Because trap emission times decrease with increased temperature, a given trap energy can be measured at a higher frequency, resulting in increased charge pumping current. The resolution of the mean interface trap density determined by charge pumping is limited by the ability to estimate the gate area. From eqn (14), the error in estimated gate area is inversely proportional to the mean trap density as: t~it Bit 8--A-= - -A-

(22)

An error of 7.5 x 10-4cm = in the gate area used for this study's test devices results in a trap density error of about 10%. 4.4. Low-temperature capacitance method The low-temperature capacitance method is the newest of the techniques employed in this study. One source of error in this method is the measurement of the hysteresis due to the difference in trapped charge in the C - V curves. The largest source of error inherent in this method, however, is the estimation of

the energy range of traps included in the integration of eqn (17). In contrast to the other methods, the low-temperature capacitance method measures the total number of interface traps per unit area. With knowledge of the energy range of traps included in the measurement, a mean interface trap density over the energy range is known. When the sweep rate of the C - V measurement is on the order of 1 s at liquid nitrogen temperatures, it is reasonable to assume that this range includes all traps to within a few k T of the band edges. An error of +4kT in the energy range assumed in this study results in an interface trap density error of about + 10.4%. Although it has not been demonstrated before, a distribution of interface trap densities across the bandgap is achievable in principle by measuring the hysteresis of the C - V curve as a function of temperature, since the response time of interface traps depends on energy and temperature. 5. CONCLUSION

The following five measurement techniques for determining Si-SiO 2 interface trap densities were compared experimentally on each of three identically fabricated MOSFETs: 1. 2. 3. 4. 5.

High-low frequency capacitance. Conductance. Subthreshold current. Charge pumping. Low-temperature capacitance.

In order to evaluate the techniques' abilities to assess relative interface trap densities, the MOSFETs were stressed with y-radiation so as to induce different levels of trap densities. The high-low frequency capacitance method uses the difference in high- and low-frequency C - V characteristics measured in depletion and weak inversion to estimate a distribution of interface trap densities between flatband and threshold. The accuracy of this method depends on the ability to extract the interface trap capacitance from the measurements. Errors are greatest near the majority carrier band edge, where the depletion capacitance is large compared to the interface trap capacitance, and near the minority carrier band edge, where a capacitance due to the inversion layer complicates the analysis. The conductance method uses the interface trap conductance extracted from device capacitance and equivalent parallel conductance measurements made in depletion to estimate a distribution of interface trap densities between flatband and midgap. Although it also uses device admittance measurements, the conductance method is thought to be more accurate than the high-low frequency capacitance method, since the error in the conductance method is determined by the ability to measure a single admittance and not by the difference in two admittance measurements.

Comparison of methods for extracting interface trap densities The subthreshold current method uses the slope in the subthreshold portion of the measured draincurrent-gate-voltage characteristic of a long-channel M O S F E T to estimate a mean interface trap density centered in weak inversion. The accuracy of the method is limited by the ability to estimate the doping used to calculate the device depletion capacitance. The charge pumping method uses a measurable substrate current due to recombined trapped charge induced by repeatedly pulsing the gate from accumulation to inversion to characterize interface traps in M O S F E T s . Because the method does not rely on admittance measurements, it is well-suited for use on small transistors. A mean interface trap density representative of values between flatband and threshold is determined according to measured charge pumping current as a function of gate pulse frequency. Its accuracy is determined by the ability to estimate the gate area. A distribution of interface trap densities between flatband and threshold can also be obtained by measuring charge pumping current as a function of gate pulse rise and fall times. The low-temperature capacitance method uses the difference in measured device C - V curves with and without its interface traps occupied by carriers to estimate a density of interface traps. The accuracy of the method is limited by the ability to estimate the energy range of interface traps unable to respond to the sweep of the gate bias at low temperatures. A comparison of the results shows a good quantitative agreement of the interface trap density estimates determined from the five methods over the appropriate energy ranges. Furthermore, the results indicate that the increase in estimated interface trap densities with increasing radiation stress is independent of the method used. Therefore, it is concluded that, when sources of error and limitations are taken into account, these five methods are capable of yielding comparable interface trap density estimates in M O S devices. Acknowledgements--We thank C. H. Yang of the Depart-

ment of Electrical Engineering of the University of Maryland for his valuable guidance and motivating discussions in

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this work. Additionally, we thank J. J. Kopanski of NIST for his critical review of this paper and E. J. Waiters for her help in preparation of the manuscript. REFERENCES

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