Microelectronics Journal 44 (2013) 315–320
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An inductorless high linear UWB Cascode LNA with tunable active resistance feedback and post-linearization technique Chunbao Ding, Wanrong Zhang n, Dongyue Jin, Hongyun Xie, Yanxiao Zhao, Qiang Fu, Jiaxin Ju School of Electronic Information and Control Engineering, Beijing University of Technology, Beijing 100124, China
a r t i c l e i n f o
abstract
Article history: Received 11 July 2012 Received in revised form 19 December 2012 Accepted 3 January 2013 Available online 12 February 2013
An inductorless Cascode SiGe low noise amplifier (LNA) that achieves high linearity using tunable active feedback and post-linearization technique is proposed for ultra-wideband (UWB) application. Tunable active feedback composed of NMOS and parallel resistor is adopted to improve the linearity instead of the resistor feedback. The tunablity of active feedback can compensate the gain and bandwidth degradation due to the process variation and parasitic parameters. The post-linearization technique by the use of resistance-capacitance (RC) parallel network with an additional diode connected transistor further improves the linearity. Theoretical analysis is performed using Volterra series to obtain an insight into the linearity behavior over the UWB frequency range. The LNA is implemented using TSMC 0.35 mm SiGe BiCMOS technology. Compared with the conventional Cascode LNA, IIP3 of the proposed LNA is improved by 51 dBm. Meanwhile, the novel LNA exhibits superior variation of group delay 1 ps, and achieves the noise figure of 3.8 4.9 dB, the gain of 8.8 10.2 dB, gain flatness of 70.7 dB, good input and output impedances matching, and unconditional stablity in the whole band. & 2013 Elsevier Ltd. All rights reserved.
Keywords: Tunable active resistance feedback Post-linearization Ultra-wideband Low noise amplifier
1. Introduction The standard of Ultra-Wideband (UWB) was defined and approved 7.5 GHz band (3.1–10.6 GHz) for UWB applications by Federal Communications Commission (FCC) in 2002 [1]. Growing research on UWB transceivers has propelled increased interest in UWB LNAs design. UWB LNAs must provide good input matching, high linearity, and low noise figure (NF) over a multi-GHz bandwidth (BW). The sufficient linearity requirement over a wide frequency range is a design challenge for UWB LNAs to suppress the large numbers of in-band interferences in the UWB system. In order to achieve high linearity, several methods have been proposed. Optimizing the overdrive voltage of Field-Effect Transistor (FET) [2,3] is a linearization method for high-frequency wideband applications, where FET biased at the zero crossing point has high linearity, but the linear region is very narrow and the bias point is sensitive to the process variations. The feed-forward distortion cancellation technique has been used to improve the linearity of the LNA [4], but the accurate power splitting is required and not feasible for practical applications. The derivative superposition (DS) method [5,6] improves the linearity using two MOS transistors connected in parallel, one is biased in triode or weak inversion region [7], the other is biased in strong inversion region. Although, the third order derivative is close to zero by the two parallel transistors, it is n
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[email protected] (W. Zhang).
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not effective at RF frequencies due to the effect of frequency dependent second order nonlinearity. The post-distortion method [8,9] uses all MOS transistors in saturation region and avoids the input matching degradation; however, more inductors will be needed to avoid gain roll off at high frequency. In this paper, a single-stage inductorless highly linear UWB SiGe LNA with linearization improvement technique is proposed, and linearity analysis using Volterra-series is performed. To the authors’ knowledge, this is the first demonstration of the linearization methods at UWB in SiGe technology. A tunable active feedback is adopted to improve the linearity and achieve the wideband impedance matching. The tunability of active feedback can be used to suppress the sensitivity of gain and bandwidth to the process variation. Furthermore, an inductorless bipolar postlinearization technique is implemented to further improve the linearity of LNA without affecting the wideband input matching, and increases minimum area due to without any passive inductor. The proposed methods are verified by the post-layout simulation using TSMC 0.35 mm SiGe BiCMOS process design kit (PDK).
2. Linearization technique 2.1. Tunable active resistance feedback Negative feedback is the simplest method to achieve wideband impedance matching and improve the linearity of the amplifier,
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where T¼gmb is the linear open loop gain with b the linear feedback factor. The third intermodulation distortion (IMD3) is derived as 3b 12g 22 =g 1 g 3 T=1 þ T 3g 3 jIMD3 j ¼ 3 ¼ ð3Þ 4b1 4g m ð1 þT Þ3 Hence, negative feedback reduces the amount of IMD3 by a factor of (1þT)3 when g2 ¼0 at low frequency. At high frequency, Volterra-series analysis is employed to gain an insight into the SiGe HBT LNA’s linearity behavior in wide bandwidth. In this analysis, it is assumed that the input signal is very weak so that nonlinearities of the order higher than three are negligible [12]. The nonlinear output current with Volterra-series is expressed as follows: Ic ¼ A1 ðsÞ3V s þ A2 ðs1 ,s2 Þ3V 2s þ A3 ðs1 ,s2 ,s3 Þ3V 3s þ . . .
ð4Þ
where Vs is the voltage source signal, and An (n¼1,2,3y.) is the Volterra-series coefficient. si ( ¼jwi) is the Laplace variable [13]. The operator ‘‘o’’ indicates that each frequency component of Vs is changed by the magnitude and phase of An [14]. The Volterraseries coefficients are derived as A1 ðsÞ ¼
Z g 2 g 1=rp2 þsC p f m m Z f þ Z L f1 þZ s ½1=r p þs C dif þC je þ Z s =Z f g g m þ1=r p2 þ sC p þ Z s Z L =Z f Z f g 2m g m 1=r p2 sC p
ð5Þ
Fig. 1. Schematic of resistive feedback Cascode LNA.
A2 ðs1 ,s2 Þ ¼ A1 ðs1 þs2 ÞA1 ðs1 ÞA1 ðs2 Þ
VT 1 þ ðs1 þs2 ÞC je Z ðs1 þ s2 Þ
2I2C
A2 ðs1 ,s2 ,s3 Þ ¼ A1 ðs1 þ s2 þ s3 ÞA1 ðs1 ÞA1 ðs2 Þ
VT 3I3C
½A1 ðs1 ÞA1 ðs2 ÞA1 ðs3 Þ þ3IC A1 A2 ½1 þ ðs1 þ s2 þ s3 ÞC je Z ðs1 þ s2 þ s3 Þ
Fig. 2. Nonlinear equivalent model of the resistive feedback Cascode LNA.
which reduces the distortion of input signal. The schematic and nonlinearity model of SiGe Cascode LNA with resistive feedback are shown in Figs. 1 and 2, respectively. In the Fig. 2, Cdiff is the diffusion capacitance, which is proportional to the collector current and the forward transit time tF. Cje is the baseemitter junction capacitance. Common base transistor Q2 in the Cascode is assumed as a linear transistor. The main factors that affect the nonlinearity of the SiGe HBT LNA under the low dc bias are the Cdiff, base current Ib and the collector current Ic [10]. At low frequency, the memory elements such as capacitance and inductor do not play a role, which are not considered in the following analysis. According to the representation of timeinvarying memoryless nonlinear system, the collector current of the common emitter LNA without feedback is expressed as ic ðvbe Þ ¼ g m vbe þ g 2 v2be þ g 3 v3be
ð1Þ
where gm is the small signal transconductance, g2 is the first order derivative of gm, g3 is the second order derivative of gm. When the negative feedback is employed, the collector current is obtained as [11] g g2 ¼ m vbe þ v2be 1þT ð1 þ T Þ3 2g 2 T 1 v3 þ g3 2 4 g 1 1þ T be ð1 þT Þ
ic ðvbe Þ ¼ b1 vbe þ b2 v2be þb3 v3be
ð2Þ
ð6Þ
ð7Þ
where Zs and ZL are the source impedance and load impedance, Zf is the feedback impedance, VT is the thermal voltage. The third intermodulation distortion is derived as 3A ðs ,s ,s2 Þ V T A1 ðsÞ2 ¼ jIMD3 j ¼ 3 1 1 4A1 ð2s1 s3 Þ IC 3 Zs A1 ðDsÞ 1 þsC je Z s þ 1 þ 2g m Z f ðsÞ þ Z L Zs A1 ð2sÞ 1 þ DsC je Z s þ þ 2g m Z f ðDsÞ þ Z L Zs 1 þ2sC je Z s þ ð8Þ Z f ð2sÞ þZ L In general, the impedance of feedback Zf is much larger than ZS and ZL, IMD3 can be reduced by Zf. Therefore the resistor feedback improves the linearity of LNA. Nevertheless, the gain and stability of LNA are sensitive to the variation of feedback resistance. In order to solve these problems, a tunable active resistor (TAR) feedback composed of a passive poly resistor in parallel with an N-Metal-Oxide-Semiconductor (NMOS) Field-Effect Transistor (FET) is employed to replace the resistor feedback. The schematic and equivalent model of tunable active resistor are shown in Figs. 3 and 4, respectively. The equivalent impedance of the TAR is derived as Z TAR ¼
C gs þ C gd
sC gs C gd þ C gs þ C gd R1f þ R1ds g m C gd
g m ¼ mn C ox
W ðV GS V TH Þ L
ð9Þ
where Cox is the oxide capacitance per unit area from gate to channel. According to Eq. (9), the effective impedance ZTAR can be tuned by adjusting the gate voltage Vtune and ratio of channel width to length with minimum parasitic capacitance.
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The schematic of Cascode LNA with TAR is shown in Fig. 5. Fig. 6 presents the IIP3 under different VGS, which is shown that the IIP3 of the Cascode LNA can be tuned by the VGS, it is in agreement with Eqs. (8) and (9). The tunable active feedback not only can improve the linearity of the LNA, but also can recover from the gain and stability degeneration due to the process variation and parasitics compared with traditional passive resistance.
Fig. 6. IIP3 at VGS ¼ 0.56 V, 1.06 V and 1.36 V.
Fig. 3. Tunable active resistor schematic.
Fig. 7. Cascode LNA with post-linearization.
3. Post-linearization technique
Fig. 4. The equivalent model of tunable active resistor.
In order to further improve the linearity of the LNA, the postlinearization topology is proposed, which is composed of resistance-capacitance (RC) parallel network with an additional diode connected transistor, as shown in Fig. 7. Resistance Ra maintains the initial bias of Cascode to restrain the bias effects of Qa, capacitance ca decouples the AC interaction between Cascode and auxiliary transistor Qa over the frequencies of interesting. The conceptual equivalent circuit model is shown in Fig. 8. At low frequency, the collector current of Q1 and Qa are expressed by the following power series: ic ¼ g m vbe1 þg 2 v2be1 þ g 3 v3be1 ia ¼ g ma v2 þ g 2a v22 þg 3a v32
ð10Þ
where gm and gma are the small signal transconductance of Q1 and Qa, g2 and g3 are the first order and second derivative of gm, respectively. Assuming that Q2 is linear, the nonlinearity baseemitter voltage v2 of Qa is obtained as v2 ¼
Fig. 5. The schematic of Cascode LNA with TAR.
i1 g m2
ð11Þ
where gm2 is the small signal transconductance of Q2. The output current io is derived as ! g g g g g2 io ¼ g m ma v1 þ g 2 ma 2 þ 2a2 m v21 g m2 g2 g m2
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! g ma g 3 2g 2a g m g 2 g 3m g 3a 3 þ g3 þ 3 v1 g m2 g 2m2 g m2
ð12Þ
Since transconductance and its derivatives are proportional to the bias current, the coefficients of second order and third order can be close to zero by adjusting the bias current. Though Qa partially cancels the linear term, it does not appreciably degrade the gain, because its bias current adjusted by the resistance Ra is much less than that of Q1. At high frequency, according to Eqs. (4) and (11) the third order distortion of the output current can be calculated as AðSÞ 3 V T g GðDÞ GðsÞ 1 ma io,3rd ¼ 1þ IC gm 4 g m2 " # ) VT g ma g 2a V T g 3a GðsÞ 1 þGð2sÞ 3 4 g m2 g m2 2g 2m2 I2C Zs GðsÞ ¼ AðSÞ 1 þ sC je Z s þ ð13Þ Z F ðsÞ þZ L Since the linearity is proportional to the ratio of first order current and third order output current, it can be improved by reducing the third order current. According to the Eqs. (12) and (13), the third order output current is reduced by the auxiliary path, the linearity of the LNA is improved.
4. LNA topology with tunable active feedback and post-linearization technique The topology of the proposed UWB LNA with tunable active feedback and post-linearization technique is shown in Fig. 9.
Fig. 10. Chip layout of the proposed UWB LNA.
The current source bias provides stable bias current for transistor Q1, resistance RB is used for self-biasing Q2. The tunable active feedback composed of NMOS transistor M1 with parallel resistance Rf is adopted for impedance matching and improve the linearity. The linearity can be tuned by adjusting Vtune. The inductorless auxiliary path composed of the RC parallel network and diode connected transistor Qa further improve the linearity, which can absorb the nonlinear current generated by the common emitter Q1. The chip layout of the proposed UWB LNA is shown in Fig. 10, and size is 0.26 0.27 mm2.
5. Verification and result analysis
Fig. 8. Conceptual equivalent model.
Fig. 9. The topology of the proposed UWB LNA.
The proposed UWB LNA is post-layout simulated with Spectre of Cadence’s EDA using TSMC 0.35 mm SiGe BiCMOS process design kit(PDK) [14], the following figures show the post-layout simulation results. To show effectiveness of the linearity improvement methods, Fig. 11 plots the input power versus the output power of the fundamental and third output signals with and without the linearization technologies. The linearization approach improves IIP3 more than 50 dBm compared with the traditional LNA. The linearization approach lightly reduces the fundamental signal by 0.8 dBm and increase the power dissipation only 1.6 mW, the variation of third order output power is more slow than the traditional Cascode LNA. Fig. 12 presents the IIP3 under different Vtune. IIP3 can be tuned by varying Vtune, which verified Volterraseries analysis for linearity behavior tunability by tunable active resistance feedback. As shown in Fig. 12, the IIP3 of proposed LNA is 40–50 dBm from 3.1 GHz to 10.6 GHz. The results and the theoretical calculations reveal that the linearization techniques improve the linearity of the LNA. Group delay is defined as the derivation of the phase of transfer function, which is used to evaluate phase nonlinearity, any resonance in the signal path will contribute distortion in the group delay. Fig. 13 presents the results of group delay comparison between the traditional Cascode LNA and Cascode LNA with linearization technique. Group delay variation of the proposed LNA is 1 ps better than the traditional LNA, achieving good phase linearity. Fig. 14 depicts the S21 and NF of the proposed UWB LNA. The gain S21 is 8.8–10.2 dB, gain flatness is 70.7 dB with the power dissipation of 26 mW from 3.1 to 10.6 GHz. In addition, the
C. Ding et al. / Microelectronics Journal 44 (2013) 315–320
Fig. 11. IIP3 of proposed LNA at 6 GHz.
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Fig. 14. NF and S21 and stability factor K of proposed LNA.
Fig. 12. IIP3 of proposed LNA versus Vtune at 6 GHz.
Fig. 15. S11, S22 and S12 of proposed LNA.
9D9¼9S11S22 S12S219o0.5 as shown in Fig. 14. All the results indicate this LNA has good impedance matching, reverse isolation, and is absolute stability from 3.1 to 10.6 GHz. Table 1 shows the summary of the proposed LNA and comparison with the recently reported SiGe and CMOS UWB LNAs. The proposed LNA has higher linearity compared with the previously published UWB LNAs [15–19]. In addition, the proposed LNA achieves better gain flatness and small area.
6. Conclusion
Fig. 13. Group delay and IIP3 of proposed LNA.
proposed UWB LNA has good noise performance, the noise figure is 3.8–4.9 dB. The input return loss S11, output return loss S22 and reverse isolation S12 versus frequency are shown in Fig. 15. The S11 and S22 are all lower than 10 dB while S12 is lower than 16 dB. The stable factor K is larger than 1.6 and
A linearization scheme for Cascode UWB LNA is presented and verified with the TSMC 0.35 mm SiGe BiCMOS process. The tunable active feedback is adopted to improve the linearity and achieve impedance matching. It can be used to recover from the gain and bandwidth degeneration due to the process variation and parasitics. An inductorless auxiliary bipolar path is also employed to further improve the linearity. Linearity analysis using Volterra-series is provided and shows good agreement with post-layout simulation results. The proposed linearization method improves the IIP3 by 50 dBm and achieves good group delay variation of 1 ps. The linearization technique can be further extended to other high-frequency amplifier design.
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Table 1 Summary of the proposed SiGe UWB LNA and comparison with the recently reported SiGe and CMOS UWB LNAs. Ref.
Bandwidth (dB)
s11 (dB)
Gain (dB)
NF (dB)
IIP3 (dB)
Area (mm2)
Technology
This work [15] [16] [17] [18] [19]
3.1–10.6 3–11 1.2–11.9 1.3–10.7 3.1–10.6 2–10
o 10 o 7.5 o 11 o 6 o 9.9 o 7
8.8–10.2 7–10 6.7–9.7 6.1–8.5 13.7–16.5 13
3.8–4.9 2.9–3.6 4.5–5.1 4.4–5.3 2.1–2.9 2.9–3.3
40 45 6.5 9.5 4.9 6.2 7.4 8.3 8.5 5.1 7.5 4.5
0.07 0.38 0.59 1.0 0.87 0.88
0.35 mm 0.13 mm 0.18 mm 0.18 mm 0.13 mm 0.18 mm
Acknowledgment This work was supported in part by National Natural Science Foundation of China (Contract nos. 60776051, 61006044, 61006059), Beijing Municipal Natural Science Foundation, (Contract no. 4082007, 4122014), Beijing Municipal Education Committee (Contract nos. KM200710005015, KM200910005001).
References [1] Revision of Part 15 of the Commission’s Rules Regarding Ultra-Wideband Transmission Systems Federal Communications Commission, Tech. Rep. ETDocket 98–153, FCC02-48, 2002. [2] S. Shekhar, J.S Walling, D.J. Allstot, Bandwidth extension techniques for CMOS amplifiers, IEEE J. Solid-State Circuits 41 (11) (2006) 2424–2438. [3] V. Aparin, G. Brown, L.E. Larson, Linearization of CMOS LNAs via optimum gate biasing, in: Proceedings of the International Symposium on Circuits and Systems (ISCAS), 4 (2004), pp. 748–751. [4] Y. Ding, R. Harjani, A þ 18 dBm IIP3 LNA in 0.35 mm CMOS, In: IEEE International Solid-State Circuits Conference (ISSCC) Digest of Technical Papers, 162–163, San Francisco, CA, 2001. [5] V. Aparin, L.E. Larson, Modified derivative superposition method for linearizing FET low-noise amplifiers, IEEE Trans. Microwave Theory Tech. 53 (2) (2005) 571–581. [6] C. Xin, E. Sanchez-Sinecio, A linearization technique for RF low noise amplifier, in: Proceedings of International Symposium on Circuits and Systems (ISCAS), 4 (2004), pp. 313–316.
SiGe BiCMOS CMOS CMOS CMOS CMOS SiGe HBT
[7] Y.S. Youn, J.H. Chang, K.J. Koh, Y.J. Lee, H.K. Yu, A 2 GHz 16 dBm IIP3 low noise amplifier in 0.25 mm CMOS technology, in: Proceedings of IEEE International Solid-State Circuits Conference (ISSCC), 1 (2003), pp. 452-507. [8] N. Kim, V. Aparin, K. Barnett, C. Persico, A cellular-band CDMA 0.25 mm CMOS LNA linearized using active post-distortion, IEEE J. Solid-State Circuits 41 (7) (2006) 1530–1534. [9] X. Fan, H. Zhang, E. Sa´nchez-Sinencio, A noise reduction and linearity improvement technique for a differential cascode LNA, IEEE J. Solid-State Circuits 43 (3) (2008) 588–599. [10] K.L. Fong, R.G. Meyer, High-frequency nonlinearity analysis of commonemitter and differential pair transconductance stages, IEEE J. Solid-State Circuits 33 (4) (1998) 548–555. [11] Donald O. Pederson, Kartikeya Mayaram, Analog Integrated Circuits for Communication Principles, Simulation and Design, New York, 2007, Spring. [12] J.D. Cressler, G. Niu, Silicon–Germanium Heterojunction Bipolar Transistors, Artech House, Norwood, MA, 2003. [13] P. Wambacq, W.M.C. Sansen, Distortion Analysis of Analog Integrated Circuits, Kluwer, London, U.K., 1998. [14] J. Antonio, S. Lopez Martin, Tutorial Cadence Design Environment. 2002. [15] Heng Zhang, Xiaohua Fan, Edgar Sa´nchez Sinencio, A Low-Power, Linearized, Ultra-Wideband LNA Design Technique, IEEE J. Solid-State Circuits 44 (2) (2009) 320–330. [16] C.F. Liao, S.I. Liu, A broadband noise-canceling MOS LNA for 3.1–10.6-GHz UWB receiver, IEEE J. Solid-State Circuits 42 (2) (2007) 329–339. [17] S. Shekhar, J.S. Walling, D.J. Allstot, Bandwidth extension techniques for CMOS amplifiers, IEEE J. Solid-State Circuits 41 (11) (2006) 2424–2438. [18] M.T. Reiha, J.R. Long, A 1.2 V reactive-feedback 3.1–10.6 GHz low-noise amplifier in 0.13 mm CMOS, IEEE J. Solid-State Circuits 42 (5) (2007) 1023–1033. [19] Y. Park, C.-H. Lee, J.D. Cressler, J. Laskar, A. Joseph, A very low power SiGe LNA for UWB application, in: Proceedings of IEEE MTT-S International Microwave Symposium Digest, 2005, pp. 1041–1044.